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TEM.h File Reference

TEM Utilities, Interface. More...

#include <time.h>
#include "BTU/TEM_ids.h"
#include "BTU/TEM_temInt.h"
#include "BTU/TEM_temTrg.h"

Data Structures

struct  _TEM_fpga
 This defines the physical properties of a FPGA. More...

struct  _TEM_fpgaLog
 Logging structure to record information about a particular operation on an FPGA. More...

struct  _TEM_tem
 This defines the physical properties of a TEM. More...


Typedefs

typedef enum _TEM_temState TEM_temState
 Typedef for enum _TEM_temState.

typedef enum _TEM_fpgaState TEM_fpgaState
 Typedef for enum _TEM_fpgaState.

typedef _TEM_tem TEM_tem
 Typedef for struct _TEM_tem. More...

typedef _TEM_fpgaLog TEM_fpgaLog
 Typedef for struct _TEM_fpgaLog. More...

typedef enum _TEM_fpgaLogId TEM_fpgaLogId
 Typedef for struct _TEM_fpgaLogId. More...

typedef _TEM_fpga TEM_fpga
 Typedef for struct _TEM_fpga.

typedef unsigned int(* TEM_fpgaAction )(TEM_fpga *fpgas, unsigned int fpgaList)
 Defines the signature of a generic TEM FPGA action routine. More...


Enumerations

enum  _TEM_temState {
  TEM_C_TEM_STATE_IGNORE = -1,
  TEM_C_TEM_STATE_EXCLUDED = 0,
  TEM_C_TEM_STATE_INCLUDED = 1,
  TEM_C_TEM_STATE_PRESENT = 2,
  TEM_C_TEM_STATE_PRESET = 3,
  TEM_C_TEM_STATE_LOADED = 4,
  TEM_C_TEM_STATE_RESET = 5,
  TEM_C_TEM_STATE_READY = 6
}
 Enumerates names of all the states that a TEM can be in. More...

enum  _TEM_fpgaState {
  TEM_C_FPGA_STATE_EXCLUDED = 0,
  TEM_C_FPGA_STATE_INCLUDED = 1,
  TEM_C_FPGA_STATE_PRESENT = 2,
  TEM_C_FPGA_STATE_LOADED = 3
}
 Enumerates names of all the states that a FPGA can be in. More...

enum  _TEM_fpgaLogId {
  TEM_C_FPGA_LOGID_ADD = 0,
  TEM_C_FPGA_LOGID_CLEAR_LOGIC = 1,
  TEM_C_FPGA_LOGID_CLEAR_REGS = 2,
  TEM_C_FPGA_LOGID_CLEAR_L1T_TIMER = 3,
  TEM_C_FPGA_LOGID_CLEAR_L1T_COUNTER = 4,
  TEM_C_FPGA_LOGID_CLEAR = 5,
  TEM_C_FPGA_LOGIC_RESET = 6,
  TEM_C_FPGA_LOGID_UNLOAD = 7,
  TEM_C_FPGA_LOGID_LOAD = 8,
  TEM_C_FPGA_LOGID_CNT = 9
}
 Enumerates the various actions on an FPGA which are logged. More...


Functions

unsigned int TEM_temsAdd (TEM_tem *tems, unsigned int temList, const unsigned int vmeAdrs[TEM_C_CNT], const struct _TEM_temDsc *const temDscs[TEM_C_CNT])
 Completes a high level description of each active TEM. More...

unsigned int TEM_temsAdrsGet (const TEM_tem *tems, unsigned int temList, unsigned int vmeAdrs[TEM_C_CNT], volatile unsigned int *lclAdrs[TEM_C_CNT])
 Fills in arrays of the VME and LOCAL addresss of the specified TEMs. More...

unsigned int TEM_temsDetsReset (TEM_tem *tems, unsigned int temList)
 Issues a reset to the detector specific registers on the specified TEMs. More...

unsigned int TEM_temsFifosReset (TEM_tem *tems, unsigned int temList)
 Issues a reset to the all FIFOs on the specified TEMs. More...

unsigned int TEM_temsFpgasGet (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of the FPGAs associated with the requested set of TEMs. More...

unsigned int TEM_temsFpgasReset (TEM_tem *tems, unsigned int temList)
 Issues a reset to the all FPGAs on the specified TEMs. More...

unsigned int TEM_temsPreset (TEM_tem *tems, unsigned int temList)
 Puts the TEM control registers in a known state so the TEM's FPGAs can be loaded. More...

unsigned int TEM_temsProbe (TEM_tem *tems, unsigned int temList)
 Probes the VME bus for the present of the specified list of. More...

unsigned int TEM_temsReady (TEM_tem *tems, unsigned int temList)
 Toggles the RESET FPGA and RESET FIFOs bit in the control register. More...

unsigned int TEM_temsReset (TEM_tem *tems, unsigned int temList)
 Resets all FPGAs, FIFOs and DETs on the specified TEMs. More...

unsigned int TEM_temsScopeBitClear (TEM_tem *tems, unsigned int temList)
 Clears the scope bit on the specified TEMs. More...

unsigned int TEM_temsScopeBitSet (TEM_tem *tems, unsigned int temList)
 Sets the scope bit on the specified TEMs. More...

unsigned int TEM_temsScopeBitToggle (TEM_tem *tems, unsigned int temList)
 Toggles the scope bit on the specified TEMs. More...

unsigned int TEM_temsUnreadied (const TEM_tem *tems, unsigned int temList)
 Simply query routine to learn which TEMs are not ready. More...

unsigned int TEM_fpgasAdd (TEM_fpga *fpgas, unsigned int fpgaList, const struct _TEM_fpgaDsc *const fpgaDscs[TEM_C_FPGA_CNT], const struct _FPGA_ttcHdr *const fpgaTtcs[TEM_C_FPGA_CNT], const TEM_tem *tem)
 Adds the specified FPGAs to the internal database. More...

unsigned int TEM_fpgasAdrsGet (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int vmeAdrs[TEM_C_FPGA_CNT], volatile unsigned int *lclAdrs[TEM_C_FPGA_CNT])
 Fills in arrays of the VME and LOCAL addresss of the specified FPGAs. More...

unsigned int TEM_fpgasClear (TEM_fpga *fpgas, unsigned int fpgaList)
 Clears the specified list of FPGAs. More...

unsigned int TEM_fpgasL1tCounterClear (TEM_fpga *fpgas, unsigned int fpgaList)
 Does a L1T COUNTER CLEAR on the specified list of FPGAs. More...

unsigned int TEM_fpgasL1tTimerClear (TEM_fpga *fpgas, unsigned int fpgaList)
 Does a CLEAR L1T TIMER on the specified list of FPGAs. More...

unsigned int TEM_fpgasLoad (TEM_fpga *fpgas, unsigned int fpgaList)
 Loads the specified list of FPGAs. More...

unsigned int TEM_fpgasLogicClear (TEM_fpga *fpgas, unsigned int fpgaList)
 Does a CLEAR LOGIC on the specified list of FPGAs. More...

unsigned int TEM_fpgasRegsClear (TEM_fpga *fpgas, unsigned int fpgaList)
 Does a CLEAR REGS on the specified list of FPGAs. More...

unsigned int TEM_fpgasTemsGet (const TEM_fpga *fpgas, unsigned int fpgaList)
 Returns a bit mask of the TEMs associated with the requested set of FPGASs. More...

unsigned int TEM_fpgasUnload (TEM_fpga *fpgas, unsigned int fpgaList)
 Unloads the specified list of FPGAs. More...

unsigned int TEM_fpgasBistClear (const TEM_fpga *fpgas, unsigned int fpgaList)
 Clears the self test bit for the selected FPGAs. More...

unsigned int TEM_fpgasBistGet (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int *bistList)
 Returns the state of the Self Test for the specified fpgas. More...

unsigned int TEM_fpgasBistSet (const TEM_fpga *fpgas, unsigned int fpgaList)
 Sets the Self Test for the specified FPGAs. More...

unsigned int TEM_fpgasBistSupported (const TEM_fpga *fpgas, unsigned int fpgasList)
 Returns which of the specified FPGAs support a self-test mode. More...

unsigned int TEM_fpgasBistWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int bistList)
 Writes the Self Test for the specified FPGAs. More...

unsigned int TEM_fpgasHfullEnbClear (const TEM_fpga *fpgas, unsigned int fpgaList)
 Clears the FIFO Half Full Throttle for the selected FPGAs. More...

unsigned int TEM_fpgasHfullEnbGet (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int *hfullList)
 Returns the state of the FIFO Half Full Throttle for the specified fpgas. More...

unsigned int TEM_fpgasHfullEnbSet (const TEM_fpga *fpgas, unsigned int fpgaList)
 Sets the FIFO Half Full Throttle for the specified FPGAs. More...

unsigned int TEM_fpgasHfullEnbWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int hfullList)
 Writes the Half Full Throttle mode for the specified FPGAs. More...

unsigned int TEM_fpgasHfullClrClear (const TEM_fpga *fpgas, unsigned int fpgaList)
 Clears the FIFO Half Full Throttle Manual Clear for the selected FPGAs. More...

unsigned int TEM_fpgasHfullClrGet (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int *hfullList)
 Returns the state of the FIFO Half Full Throttle Manual Clear. for the specified fpgas. More...

unsigned int TEM_fpgasHfullClrSet (const TEM_fpga *fpgas, unsigned int fpgaList)
 Sets the FIFO Half Full Throttle for the specified FPGAs. More...

unsigned int TEM_fpgasHfullClrWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int hfullList)
 Writes the Half Full Throttle Manual Clear mode for the specified FPGAs. More...

unsigned int TEM_fpgasRdoModeClear (const TEM_fpga *fpgas, unsigned int fpgaList)
 Clears the Readout Mode for the selected FPGAs. More...

unsigned int TEM_fpgasRdoModeGet (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int *rdoList)
 Returns the state of the Readout Mode for the specified FPGAs. More...

unsigned int TEM_fpgasRdoModeSet (const TEM_fpga *fpgas, unsigned int fpgaList)
 Sets the Readout Mode to 1, for the specified FPGAs. More...

unsigned int TEM_fpgasRdoModeSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
 Returns a bit list indicating which FPGAs support an alternative Readout Mode. More...

unsigned int TEM_fpgasRdoModeWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int rdoList)
 Writes the Readout Mode for the specified FPGAs. More...

unsigned int TEM_fpgasRdoBsyMinMaxClear (const TEM_fpga *fpgas, unsigned int fpgaList)
 Clears the Readout Min/MaxMode for the selected FPGAs. More...

unsigned int TEM_fpgasRdoBsyMinMaxGet (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int *rdoList)
 Returns the state of the Readout Min/MaxMode for the specified FPGAs. More...

unsigned int TEM_fpgasRdoBsyMinMaxSet (const TEM_fpga *fpgas, unsigned int fpgaList)
 Sets the Readout Busy Min/Max 1, for the specified FPGAs. More...

unsigned int TEM_fpgasRdoBsyMinMaxSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
 Returns a bit list indicating which FPGAs support the Readout Busy Min/Max mode. More...

unsigned int TEM_fpgasRdoBsyMinMaxWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int rdoList)
 Writes the Readout Busy Min/Max mode for the specified FPGAs. More...

unsigned int TEM_fpgasRdoToGet (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int *rdoToList)
 Returns the state of the Readout Timeout status bit for the specified FPGAs. More...

unsigned int TEM_fpgasRdoToSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
 Returns a bit list indicating which FPGAs support the Readout Timeout status bit. More...

int TEM_temIntsMinEventsGet (const TEM_tem *tems, unsigned int temList, unsigned int *nevts)
 Returns the minimum number of events pending from the specified list of TEMs. More...

unsigned int TEM_temIntsEnable (const TEM_tem *tems, unsigned int temList, unsigned int irpts)
 Enables the specified list of interrupts on all specified TEMs. More...

unsigned int TEM_temIntsDisable (const TEM_tem *tems, unsigned int temList, unsigned int irpts)
 Disables the specified list of interrupts on all specified TEMs. More...

unsigned int TEM_temIntsMasterEnable (const TEM_tem *tems, unsigned int temList)
 Enables the master interrupt on the specified list of TEMs. More...

unsigned int TEM_temIntsMasterDisable (const TEM_tem *tems, unsigned int temList)
 Disables the master interrupt on the specified list of TEMs. More...

unsigned int TEM_temIntsMasterReset (const TEM_tem *tems, unsigned int temList)
 Resets the master interrupt on the specified list of TEMs. More...

unsigned int TEM_temIntsIscsGet (const TEM_tem *tems, unsigned int temList, const struct _TEM_temInt *iscs[])
 Returns a pointer to an array of TEM interrupt structures. More...

unsigned int TEM_temIntsInit (const TEM_tem *tems, unsigned int temList, const unsigned int *levels, const unsigned int *bases)
 Initializes the TEM interrupt registers. More...

int TEM_temIntConnect (const TEM_tem *tems, TEM_temId temId, unsigned int vector, TEM_temIntCbRtn cb_rtn, TEM_temIntCbPrm cb_prm)
 Connects the interrupt vector on a individual TEM basis. The TEM must be at least in the PRESENT state. More...

unsigned int TEM_temIntsVmeEnable (const TEM_tem *tems, unsigned int temList)
 Enables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled. More...

unsigned int TEM_temIntsVmeDisable (const TEM_tem *tems, unsigned int temList)
 Disables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled. More...

unsigned int TEM_temIntsThresholdSet (const TEM_tem *tems, unsigned int temList, const unsigned int *thresholds)
 Sets the event threshold on the specified list of TEMs. More...

unsigned int TEM_temTrgsTcssGet (const TEM_tem *tems, unsigned int temList, const struct _TEM_temTrg *trgs[])
 Returns a pointer to an array of TEM trigger structures. More...

unsigned int TEM_temTrgsCpuBsyClr (const TEM_tem *tems, unsigned int temList)
 Clears the CPU BSY bit for the selected TEMs. More...

unsigned int TEM_temTrgsCpuBsyGet (const TEM_tem *tems, unsigned int temList, unsigned int *cpuBsy)
 Gets the state of the CPU BSY bit for the selected TEMs. More...

unsigned int TEM_temTrgsCpuBsySet (const TEM_tem *tems, unsigned int temList)
 Sets the CPU BSY bit for the selected TEMs. More...

unsigned int TEM_temTrgsCpuBsySupported (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of TEMs which support the CPU BSY bit. More...

unsigned int TEM_temTrgsCpuBsyWrite (const TEM_tem *tems, unsigned int temList, unsigned int cpuBsy)
 Writes the CPU BSY bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tEnbClr (const TEM_tem *tems, unsigned int temList)
 Clears the L1T ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tEnbGet (const TEM_tem *tems, unsigned int temList, unsigned int *l1tEnb)
 Gets the state of the L1T ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tEnbSet (const TEM_tem *tems, unsigned int temList)
 Sets the L1T ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tEnbSupported (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of TEMs which support the L1T ENABLE bit. More...

unsigned int TEM_temTrgsL1tEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tEnb)
 Writes the L1T ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tTmrClr (const TEM_tem *tems, unsigned int temList)
 Clears the L1T TMR bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tTmrGet (const TEM_tem *tems, unsigned int temList, unsigned int *l1tTmr)
 Gets the state of the L1T TMR bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tTmrSet (const TEM_tem *tems, unsigned int temList)
 Sets the L1T TMR bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tTmrSupported (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of TEMs which support the L1T TMR bit. More...

unsigned int TEM_temTrgsL1tTmrWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tTmr)
 Writes the L1T TMR bit for the selected TEMs. More...

unsigned int TEM_temTrgsTreqEnbClr (const TEM_tem *tems, unsigned int temList)
 Clears the TREQ ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsTreqEnbGet (const TEM_tem *tems, unsigned int temList, unsigned int *treqEnb)
 Gets the state of the TREQ ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsTreqEnbSet (const TEM_tem *tems, unsigned int temList)
 Sets the TREQ ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsTreqEnbSupported (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of TEMs which support the TREQ ENABLE bit. More...

unsigned int TEM_temTrgsTreqEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int treqEnb)
 Writes the TREQ ENABLE bit for the selected TEMs. More...

unsigned int TEM_temTrgsExtTreqEnbClr (const TEM_tem *tems, unsigned int temList)
 Clears the EXT TREQ ENB bit for the selected TEMs. More...

unsigned int TEM_temTrgsExtTreqEnbGet (const TEM_tem *tems, unsigned int temList, unsigned int *l1tEnb)
 Gets the state of the EXT TREQ ENB bit for the selected TEMs. More...

unsigned int TEM_temTrgsExtTreqEnbSet (const TEM_tem *tems, unsigned int temList)
 Sets the EXT TREQ ENB bit for the selected TEMs. More...

unsigned int TEM_temTrgsExtTreqEnbSupported (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of TEMs which support the EXT TREQ ENB bit. More...

unsigned int TEM_temTrgsExtTreqEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tEnb)
 Writes the EXT TREQ ENB bit for the selected TEMs. More...

unsigned int TEM_temTrgsL1tInGet (const TEM_tem *tems, unsigned int temList, unsigned int *l1tIn)
 Gets the state of the L1T IN mask for the selected TEMs. More...

unsigned int TEM_temTrgsL1tInWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tIn)
 Writes the L1T IN mask for the selected TEMs. More...

unsigned int TEM_temTrgsL1tOutGet (const TEM_tem *tems, unsigned int temList, unsigned int *l1tOut)
 Gets the state of the L1T OUT mask for the selected TEMs. More...

unsigned int TEM_temTrgsL1tOutWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tOut)
 Writes the L1T OUT mask for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tArmClr (const TEM_tem *tems, unsigned int temList)
 Clears the Global L1t Arm bit for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tArmGet (const TEM_tem *tems, unsigned int temList, unsigned int *l1tArm)
 Gets the state of the Global L1t Arm bit for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tArmSet (const TEM_tem *tems, unsigned int temList)
 Sets the Global L1t Enable bit for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tArmSupported (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of TEMs which support a Global L1t Arm. More...

unsigned int TEM_temTrgsGblL1tArmWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tArm)
 Writes the Global L1t Enable bit for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tEnbClr (const TEM_tem *tems, unsigned int temList)
 Clears the Global L1t Enable bit for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tEnbGet (const TEM_tem *tems, unsigned int temList, unsigned int *l1tEnb)
 Gets the state of the Global L1t Enable bit for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tEnbSet (const TEM_tem *tems, unsigned int temList)
 Sets the Global L1t Enable bit for the selected TEMs. More...

unsigned int TEM_temTrgsGblL1tEnbSupported (const TEM_tem *tems, unsigned int temList)
 Returns a bit mask of TEMs which support a Global L1t Enable. More...

unsigned int TEM_temTrgsGblL1tEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tEnb)
 Writes the Global L1t Enable bit for the selected TEMs. More...

Detailed Description

TEM Utilities, Interface.

Author:
JJRussell - russell@slac.stanford.edu
Provides utilities to perform operations on TEMs and their FPGAs in a generic fashion.

Typedef Documentation

TEM_fpgaAction
 

Defines the signature of a generic TEM FPGA action routine.

Many of the TEM FPGA routines have the same form 

       unsigned int TEM_fpgas<SomeAction> (TEM_fpgas      *fpgas,
                                           unsigned int fpgaList);

       where
         fpgas: Is the array FPGA descriptions
      fpgaList: Is the list of FPGAs to perform the action on

This typedef allows the user to construct generic TEM FPGA manipulation routines on a list of FPGAs which not only have their FPGA properties parameterized by the FPGA description, but also the actions, in the form of a callback routine with this signature.

TEM_fpgaLog
 

Typedef for struct _TEM_fpgaLog.

Information about each operation performed on a FPGA is logged in this structure. See the enumeration, TEM_fpgaLogId, for a list of all logged operations.

TEM_fpgaLogId
 

Typedef for struct _TEM_fpgaLogId.

Information about each operation performed on a FPGA is logged in this structure. See the structure, TEM_fpgaLog, for what information is logged.

TEM_tem
 

Typedef for struct _TEM_tem.

Enumeration Type Documentation

enum _TEM_fpgaLogId
 

Enumerates the various actions on an FPGA which are logged.

Enumeration values:
TEM_C_FPGA_LOGID_ADD  Added FPGA to database
TEM_C_FPGA_LOGID_CLEAR_LOGIC  Clear Logic operation
TEM_C_FPGA_LOGID_CLEAR_REGS  Clear Register operation
TEM_C_FPGA_LOGID_CLEAR_L1T_TIMER  Clear L1t timer operation
TEM_C_FPGA_LOGID_CLEAR_L1T_COUNTER  Clear L1t counter operation
TEM_C_FPGA_LOGID_CLEAR  FPGA clear operation
TEM_C_FPGA_LOGIC_RESET  FPGA reset operation
TEM_C_FPGA_LOGID_UNLOAD  FPGA unload operation
TEM_C_FPGA_LOGID_LOAD  FPGA load operation
TEM_C_FPGA_LOGID_CNT  Count of all FPGA ops

enum _TEM_fpgaState
 

Enumerates names of all the states that a FPGA can be in.

Enumeration values:
TEM_C_FPGA_STATE_EXCLUDED  Deliberately excluded
TEM_C_FPGA_STATE_INCLUDED  FPGA is included
TEM_C_FPGA_STATE_PRESENT  FPGA is on a TEM that is present
TEM_C_FPGA_STATE_LOADED  FPGA is loaded

enum _TEM_temState
 

Enumerates names of all the states that a TEM can be in.

Enumeration values:
TEM_C_TEM_STATE_IGNORE  Dummy state
TEM_C_TEM_STATE_EXCLUDED  Is excluded from the system
TEM_C_TEM_STATE_INCLUDED  Is described to the database
TEM_C_TEM_STATE_PRESENT  Is physically present
TEM_C_TEM_STATE_PRESET  Is in a known initialization state
TEM_C_TEM_STATE_LOADED  All FPGAs are loaded, if failure need to check FPGA list for which FPGA failed to load
TEM_C_TEM_STATE_RESET  Has been reset
TEM_C_TEM_STATE_READY  Is ready to take data

Function Documentation

unsigned int TEM_fpgasAdd (  TEM_fpga *    fpgas,
unsigned int    fpgaList,
const struct _TEM_fpgaDsc *const    fpgaDscs[TEM_C_FPGA_CNT],
const struct _FPGA_ttcHdr *const    fpgaTtcs[TEM_C_FPGA_CNT],
const TEM_tem *    tem
) 
 

Adds the specified FPGAs to the internal database.

Parameters:
fpgas  An array to be filled in with the information about the requested FPGAs.
fpgaList  A list of FPGAs to add, expressed as a bit mask. Only FPGAs selected by this bit mask and which are are also part of the system can eventually be loaded.
fpgaDscs  An array of pointers to the FPGA descriptors. This gives the static properties of each FPGA. It is an array indexed by the TEM FPGA ID. FPGAs not present in fpgaList may be represented by a NULL pointer.
fpgaTtcs  An array of pointers to FPGA TTC programs. It is an array indexed by the TEM FPGA ID. FPGAs not present in fpgaList may be represented by a NULL pointer.
tem  The TEM database. To properly enter an FPGA, the parent TEM must have already been added to the TEM database.
Returns:
A bit mask of FPGAs which failed to be added. A value of 0 indicates all requested FPGAs were added.
Note that this routine only adds the FPGAs to the FPGA database. Do operations are performed on the FPGAs. For example, the actual loading is done with TEM_loadFpgas. The TEM that the FPGAs reside on must be at least to the state INCLUDED.

unsigned int TEM_fpgasAdrsGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int    vmeAdrs[TEM_C_FPGA_CNT],
volatile unsigned int *    lclAdrs[TEM_C_FPGA_CNT]
) 
 

Fills in arrays of the VME and LOCAL addresss of the specified FPGAs.

Parameters:
fpgas  The FPGAs database array.
fpgaList  The list of TEMs to get the addresses of.
vmeAdrs  Array to receive the VME addresses.
lclAdrs  Array to receive the LCL addresses.
Returns:
A bit mask indicating which FPGAs did not have addresses.
Only FPGAs which have been INCLUDED have addresses. Addresses which are requested but not present are filled with NULL.

unsigned int TEM_fpgasBistClear (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Clears the self test bit for the selected FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask, to clear.
Returns:
The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasBistSupported(), to get a list of the FPGAs which support a self-test and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasBistGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int *    bistList
) 
 

Returns the state of the Self Test for the specified fpgas.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask, to get.
bistList  Returned as a bit mask of the state of the self test, one bit per FPGA.
Returns:
The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasBistSupported(), to get a list of the FPGAs which support a self-test and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasBistSet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Sets the Self Test for the specified FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The list of FPGAs to set the self-test mode.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasBistSupported(), to get a list of the FPGAs which support a self-test and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasBistSupported (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Returns which of the specified FPGAs support a self-test mode.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs to check.
Returns:
Returned as a bit mask of which FPGAs support a self-test. This is a proper subset of fpgaList.
Note that this is purely a static test of whether the FPGA supports a self test mode. It does not in any way indicate that the self-test mode can be set. For example, if the FPGA is not loaded, the self-test mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasBistWrite (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int    bistList
) 
 

Writes the Self Test for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The list of FPGAs to write the self-test mode.
bistList  The value of the self-test bit to write, expressed as a bit mask, 1 bit per FPGA.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasBistSupported(), to get a list of the FPGAs which support a self-test and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasClear (  TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Clears the specified list of FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask to clear.
Returns:
A bit mask indicating which FPGAs failed to properly clear.
Does a clear of the specified FPGAs. For most FPGAs this consists of toggling the CLEAR LOGIC, CLEAR REGISTER, CLEAR L1T TIMER and CLEAR L1T COUNTER. The TKR FPGA does not have a CLEAR TIMER.

The return value is a bit mask indicating which FPGAs failed to properly clear. The corresponding status of each TEM_fpga structure must be examined for details of what went wrong.

unsigned int TEM_fpgasHfullClrClear (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Clears the FIFO Half Full Throttle Manual Clear for the selected FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask, to clear.
Returns:
The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support a this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullClrGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int *    hfullList
) 
 

Returns the state of the FIFO Half Full Throttle Manual Clear. for the specified fpgas.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask, to get.
hfullList  Returned as a bit mask of the state of the FIFO Half Full Throttle Manual Clear,one bit per FPGA.
Returns:
The FPGAs for which the FIFO Half Full Throttle Manual Clear is set. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullClrSet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Sets the FIFO Half Full Throttle for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The list of FPGAs to set the FIFO Half Full Throttle Manual Clear
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullClrWrite (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int    hfullList
) 
 

Writes the Half Full Throttle Manual Clear mode for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The list of FPGAs to write the bits to.
hfullist  The value of the HFULL Clr bit to write, expressed as a bit mask, 1 bit per FPGA.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support this mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbClear (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Clears the FIFO Half Full Throttle for the selected FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask, to clear.
Returns:
The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support a this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int *    hfullList
) 
 

Returns the state of the FIFO Half Full Throttle for the specified fpgas.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask, to get.
hfullList  Returned as a bit mask of the state of the FIFO Half Full Throttle,one bit per FPGA.
Returns:
The FPGAs for which the FIFO Half Full Throttle mode could not be read. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support a FIFO Half Full Throttle and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbSet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Sets the FIFO Half Full Throttle for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The list of FPGAs to set the FIFO Half Full Throttle.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support a FIFO Half Full Throttle Enable and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbWrite (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int    hfullList
) 
 

Writes the Half Full Throttle mode for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The list of FPGAs to write the self-test mode.
hfullist  The value of the HFULL enable bit to write, expressed as a bit mask, 1 bit per FPGA.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support this mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasL1tCounterClear (  TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Does a L1T COUNTER CLEAR on the specified list of FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask to do the CLEAR L1T COUNTER to.
Returns:
A bit mask indicating which FPGAs failed to properly clear there L1T counters.

unsigned int TEM_fpgasL1tTimerClear (  TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Does a CLEAR L1T TIMER on the specified list of FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask to do the CLEAR L1T TIMER to.
Returns:
A bit mask indicating which FPGAs failed to properly clear there L1T timers.

unsigned int TEM_fpgasLoad (  TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Loads the specified list of FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask to load
Returns:
A bit mask indicating which FPGAs failed to properly load.
The FPGA code to load was set when the FPGA was added to the FPGA database. Note also that this is a time consuming activity, taking on the order on 1/2 second per FPGA.

unsigned int TEM_fpgasLogicClear (  TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Does a CLEAR LOGIC on the specified list of FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask to do the CLEAR LOGIC to.
Returns:
A bit mask indicating which FPGAs failed to properly clear.

unsigned int TEM_fpgasRdoBsyMinMaxClear (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Clears the Readout Min/MaxMode for the selected FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask, to clear.
Returns:
The FPGAs for which the Readout Busy Min/Max Mode could not be cleared. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a Readout Min/Max mode or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support the Readout Busy MIN/MAX mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoBsyMinMaxGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int *    rdoBsyMinMaxList
) 
 

Returns the state of the Readout Min/MaxMode for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask, to get.
rdoList  Returned as a bit mask of the state of the readout Min/Max mode, one bit per FPGA.
Returns:
The FPGAs for which the Readout Min/Max mode could not be read. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a Readout Min/Max mode or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support a Min/Max mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoBsyMinMaxSet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Sets the Readout Busy Min/Max 1, for the specified FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The list of FPGAs to set the Readout Busy Min/Max mode.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a readout Min/Max or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support a readout Min/Max mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoBsyMinMaxSupported (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Returns a bit list indicating which FPGAs support the Readout Busy Min/Max mode.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs to check.
Returns:
Returned as a bit mask of which FPGAs support the Readout Busy Min/Max mode. This is a proper subset of fpgaList.
Note that this is purely a static test of whether the FPGA supports a Readout Busy Min/Max mode. It does not in any way indicate that the Readout Busy Min/Max mode can be set. For example, if the FPGA is not loaded, the Readout Busy Min/Max Mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasRdoBsyMinMaxWrite (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int    rdoBsyMinMaxList
) 
 

Writes the Readout Busy Min/Max mode for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The list of FPGAs to write the Readout Busy Min/Max mode.
rdoBsyMinMaxList  The value of the Readout Busy Min/Max mode to write, expressed as a bit mask, 1 bit per FPGA.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support the Readout Busy Min/Max or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support an the Readout Busy Min/Max mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoModeClear (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Clears the Readout Mode for the selected FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask, to clear.
Returns:
The FPGAs for which the Readout Mode could not be cleared. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a Readout mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoModeSupported(), to get a list of the FPGAs which support an alternative readout mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoModeGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int *    rdoList
) 
 

Returns the state of the Readout Mode for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask, to get.
rdoList  Returned as a bit mask of the state of the readout mode, one bit per FPGA.
Returns:
The FPGAs for which the Readout Mode mode could not be read. This is proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support a Readout mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoModeSupported(), to get a list of the FPGAs which support an alternative readout mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoModeSet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Sets the Readout Mode to 1, for the specified FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The list of FPGAs to set the readout mode.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support an alternate mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoModeSupported(), to get a list of the FPGAs which support an alternative readout mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoModeSupported (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Returns a bit list indicating which FPGAs support an alternative Readout Mode.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs to check.
Returns:
Returned as a bit mask of which FPGAs support an alternative Readout mode. This is a proper subset of fpgaList.
Note that this is purely a static test of whether the FPGA supports an alternate Readout Mode. It does not in any way indicate that the self-test mode can be set. For example, if the FPGA is not loaded, the alternative Readout Mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasRdoModeWrite (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int    rdoList
) 
 

Writes the Readout Mode for the specified FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The list of FPGAs to write the Readout Mode.
rdoList  The value of the Readout Mode to write, expressed as a bit mask, 1 bit per FPGA.
Returns:
The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.
A non-0 return value indicates either the FPGA does not support an alternative mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoModeSupported(), to get a list of the FPGAs which support an alternative Readout Mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoToGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList,
unsigned int *    rdoToList
) 
 

Returns the state of the Readout Timeout status bit for the specified FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs
rdoList  Returned as a bit mask of the state of the Readout Timeout status bit, one bit per FPGA.
Returns:
The FPGAs for which the Readout Busy Bit could not be read.
A non-0 return value indicates either the FPGA does not support a Readout Busy Bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoToSupported(), to get a list of the FPGAs which support a readout timeout status bit and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoToSupported (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Returns a bit list indicating which FPGAs support the Readout Timeout status bit.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs to check.
Returns:
Returned as a bit mask of which FPGAs support the Readout Timeout status bit. This is a proper subset of fpgaList.
Note that this is purely a static test of whether the FPGA supports a Readout Timeout status bit. If the FPGA is not loaded, the Readout Timeout status bit cannot be read. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasRegsClear (  TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Does a CLEAR REGS on the specified list of FPGAs.

Parameters:
fpgas  The FPGA database
fpgaList  The set of target FPGAs, expressed as a bit mask to do the CLEAR REGS to.
Returns:
A bit mask indicating which FPGAs failed to properly clear.

unsigned int TEM_fpgasTemsGet (  const TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Returns a bit mask of the TEMs associated with the requested set of FPGASs.

Parameters:
fpgas  The FPGA database array.
fpgaList  Which FPGAs to check for TEMs, expressed as a bit mask.
Returns:
A bit mask of the associated TEMs.
This routine translate a list of FPGAs to the their parent list of TEMs. See TEM_temsFpgasGet() for the opposite direction of the translation.

unsigned int TEM_fpgasUnload (  TEM_fpga *    fpgas,
unsigned int    fpgaList
) 
 

Unloads the specified list of FPGAs.

Parameters:
fpgas  The FPGA database.
fpgaList  The set of target FPGAs, expressed as a bit mask to unload.
Returns:
A bit mask indicating which FPGAs failed to properly unload.
In reality, there is no real way to unload an FPGA. All this routine really does it to make the FPGA forget that it was loaded.

int TEM_temIntConnect (  const TEM_tem *    tems,
TEM_temId    temId,
unsigned int    vector,
TEM_temIntCbRtn    cb_rtn,
TEM_temIntCbPrm    cb_prm
) 
 

Connects the interrupt vector on a individual TEM basis. The TEM must be at least in the PRESENT state.

Parameters:
tems  The TEM database.
temId  The target TEM.
vector  The interrupt vector, sans the base address.
cb_rtn  The interrupt callback routine.
cb_prm  The interrupt callback parameter.
Returns:
Status

unsigned int TEM_temIntsDisable (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    irpts
) 
 

Disables the specified list of interrupts on all specified TEMs.

Parameters:
tem  The TEM database.
temList  The list of TEMs to enable the interrupts on
irpts  The interrupts to enable. Note that this is not an array, but one for all TEMs.
Returns:
A bit mask indicating which TEMs failed to have their interrupts enabled.
Disables the specified list of interrupts. The TEMs must be at least in the PRESENT state. This is a weaker condition than demanding that they are READY. This condition is imposed when setting the MASTER ENABLE. So one can set the interrupt sources, on TEMs that are present, but one can not use them unless in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their interrupts disabled. The only known failure mode that the TEM is not at least in the PRESENT state.

unsigned int TEM_temIntsEnable (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    irpts
) 
 

Enables the specified list of interrupts on all specified TEMs.

Parameters:
tem  The TEM database.
temList  The list of TEMs to enable the interrupts on
irpts  The interrupts to enable. Note that this is not an array, but one for all TEMs.
Returns:
A bit mask indicating which TEMs failed to have their interrupts enabled.
Enables the specified list of interrupts. The TEMs must be at least in the PRESENT state. This is a weaker condition than demanding that they are READY. This condition is imposed when setting the MASTER ENABLE. So one can set the interrupt sources, on TEMs that are present, but one can not use them unless in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their interrupts enabled. The only known failure mode that the TEM is not at least in the PRESENT state.

unsigned int TEM_temIntsInit (  const TEM_tem *    tems,
unsigned int    temList,
const unsigned int *    levels,
const unsigned int *    bases
) 
 

Initializes the TEM interrupt registers.

Parameters:
tem  The TEM database TEMs.
temList  The list of TEMs to setup.
levels  The array of VME levels. Must be in the range 1-7.
bases  The array of VME bases. These must be unique and must be selected from the set 0x60, 0x80, 0xC0, 0xA0.
Returns:
A bit mask of those TEMs which could not be properly initialized.
Sets the VME interrupt level and the vector base offset for each of the specified TEMs. Since this requires VME operations to the TEM, the TEM must be at least PRESENT in the system.

The return value is a bit mask indicating those TEMs which were requested to be initialized but which failed. Common errors are 

       a. TEM   is not PRESENT
       b. LEVEL is out of range or duplicated.
       c. BASE  is out of range or duplicated.

Warning:
PROGRAMMERS NOTE: One should also check whether there are any TEMs which are present on the bus but which also have the same base vector and/or same VME level. Unfortunately this is almost impossible to do correctly since technically, unless the software is told, it cannot discover either which modules are on the bus (there is no BUS map facility) or what the interrupt structure of the encountered modules is (there is no MODULE ID).
One could kludge this by claiming the only VME modules of interest are the TEMs and the interrupt structure is the same and we know what the addresses are. This is all a house-of-cards. I think I'd rather have no protection than halfway measure.

unsigned int TEM_temIntsIscsGet (  const TEM_tem *    tems,
unsigned int    temList,
const struct _TEM_temInt *    isc[]
) 
 

Returns a pointer to an array of TEM interrupt structures.

Parameters:
tems  The TEM database.
temList  The list of TEMs.
isc  An array, indexed by TEM ID, which will be filled with pointers to the TEM interrupt control structure.
Returns:
A mask of those TEMs for which an address was requested, but could not provided.
Returns a pointer to an array of TEM interrupt structures. This breaks the modularity, but the gain in efficiency dictates this strategy.

This operation requires no VME operations and, so, does not depend on the module actually existing. It only depends on the TEM being included in the system.

The return value is a mask of those TEMs for which an address was requested, but was not provided. These are usually TEMs which are not at least in the INCLUDED state.)

unsigned int TEM_temIntsMasterDisable (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Disables the master interrupt on the specified list of TEMs.

Parameters:
tem  The TEM database.
temList  The list of TEMs to enable the master interrupt on.
Returns:
A bit mask indicating which TEMs of the requested set failed to have their master interrupts disabled.
Disables the master interrupt on the specified list of tems. The TEMs must be in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts disabled. The only known failure mode that the TEM is not at least in the READY state.

unsigned int TEM_temIntsMasterEnable (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Enables the master interrupt on the specified list of TEMs.

Parameters:
tem  The TEM database.
temList  The list of TEMs to enable the master interrupt on.
Returns:
A bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled.
Enables the master interrupt on the specified list of tems. The TEMs must be in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled. The only known failure mode that the TEM is not at least in the READY state.

unsigned int TEM_temIntsMasterReset (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Resets the master interrupt on the specified list of TEMs.

Parameters:
tem  The TEM database.
temList  The list of TEMs to reset the master interrupt on.
Returns:
A bit mask indicating which TEMs of the requested set failed to have their master interrupts reset.
Resets the master interrupt on the specified list of tems. The TEMs must be in the READY state. This operation is typically used at initialization time or when in an error state to clear all pending interrupts.

The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled. The only known failure mode that the TEM is not at least in the READY state.

int TEM_temIntsMinEventsGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    nevts
) 
 

Returns the minimum number of events pending from the specified list of TEMs.

Parameters:
tem  The TEM database.
temList  The list of TEMs to check
nevts  Returned as the number of events in each TEM. Maybe specified as NULL.
Returns:
The minimum number of pending events.
Returns the minimum number of events pending from the specified list of TEMS. It is assumed that the list of tems has been properly trimmed to reflect those TEMs which are present and ready to go. Reading TEMs which are not PRESENT should return a -1, leaving the EVTS to be the maximum, thus not affecting the result. Given this and the small efficiency hit to do the check, it was decided not to make it.

Technically this is not a TEM interrupt routine, but, since it is almost exclusively used in that context, it was included with them.

unsigned int TEM_temIntsThresholdSet (  const TEM_tem *    tems,
unsigned int    temList,
const unsigned int *    thresholds
) 
 

Sets the event threshold on the specified list of TEMs.

Parameters:
tems  The TEM database
temList  The list of TEMs to set the event threshold on.
thresholds  The array of thresholds, indexed by TEM id.
Returns:
The list of TEMs requested to be, but not set.
Sets the event threshold for the specified set of TEMS. In most cases it makes no sense to set the thresholds at different values. This interface is provided more in the sense of uniformity, than for than the increase functionality one gets with an array of thresholds.

The return value is a list of TEMs requested but not set. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system.

unsigned int TEM_temIntsVmeDisable (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Disables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled.

Parameters:
tems  The TEM database
temList  The list of TEMs to disable the master interrupt on.
Returns:
The list of TEMs requested to be, but not disabled.
The return value is the list of TEMs requested but not disabled. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system. The only other possibility is that the interrupt DISABLE routine fails. This is highly unlikely since the only failure mode listed in the documentation is if one requested interrupt level is out of range. This is very hard to do, since the level is always read from the hardware (it is not cached) and only 3 bits are valid, automatically limiting the return value to the legitimate level.

unsigned int TEM_temIntsVmeEnable (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Enables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled.

Parameters:
tems  The TEM database
temList  The list of TEMs to enable the master interrupt on.
Returns:
The list of TEMs requested to be, but not enabled.
The return value is the list of TEMs requested but not enabled. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system. The only other possibility is that the interrupt ENABLE routine fails. This is highly unlikely since the only failure mode listed in the documentation is if one requested interrupt level is out of range. This is very hard to do, since the level is always read from the hardware (it is not cached) and only 3 bits are valid, auto-matically limiting the return value to the legitimate level.

unsigned int TEM_temsAdd (  TEM_tem *    tem,
unsigned int    temList,
const unsigned int    vmeAdrs[TEM_C_CNT],
const struct _TEM_temDsc *const    temDscs[TEM_C_CNT]
) 
 

Completes a high level description of each active TEM.

Parameters:
tem  Pointer to the high level description of the TEM to be completed. Only active TEMs are entered, so the TEM ID must be contained within this structure.
temList  A bit mask representing the list of TEMs to be added.
vmeAdrs  An array of the VME base addresses of the TEMs. These must be in the canonical order, ie ACD, TKR, CAL, LTC, L1T.
temDscs  An array of pointers to the TEM descriptors. These descriptors give the static properties of a TEM such as the offsets of key registers and bits.
Returns:
A bit mask of exclude TEMs.
Completes a high level description of each active TEM. This describes only the TEM section. The FPGA section is described by another routine.

The return value is a bit mask of the excluded TEMs. These are TEMs which where requested to be in the system, but where rejected because they could not be included. At this point only a configuration inconsistency would led to a rejection.

A value of 0 indicates that all TEMs requested have been added to the system.

unsigned int TEM_temsAdrsGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    vmeAdrs[TEM_C_CNT],
volatile unsigned int *    lclAdrs[TEM_C_CNT]
) 
 

Fills in arrays of the VME and LOCAL addresss of the specified TEMs.

Parameters:
tems  The TEM database array.
temList  The list of TEMs to get the addresses of.
vmeAdrs  Array to receive the VME addresses.
lclAdrs  Array to receive the LCL addresses.
Returns:
A bit mask indicating which TEMs did not have addresses.
Only TEMs which have been INCLUDED have addresses. Addresses which are requested but not present are filled with NULL.

unsigned int TEM_temsDetsReset (  TEM_tem *    tem,
unsigned int    temList
) 
 

Issues a reset to the detector specific registers on the specified TEMs.

Parameters:
tem  The TEM database array.
temList:  The list of TEMs to issue a RESET TEM DETECTORS.
Returns:
A bit mask indicating which TEMs detector registers failed to properly reset.
Issues a resets to the detector specific registers on the specified TEMs. This usually corresponds to toggling bit 2 of the board control registers. Not all TEMs have this capability.

The return value is bit mask indicating which TEMs detector registers failed to properly reset. The corresponding status of each TEM_tem structure must be examined for details of what went wrong.

unsigned int TEM_temsFifosReset (  TEM_tem *    tem,
unsigned int    temList
) 
 

Issues a reset to the all FIFOs on the specified TEMs.

Parameters:
tem  The TEM database array.
temList:  The list of TEMs to issue a RESET FIFO.
Returns:
A bit mask indicating which TEMs FIFOs failed to properly reset.
Issues a resets to all FIFOs on the specified TEMs.

The return value is bit mask indicating which TEMs had FIFOs which failed to properly reset. The corresponding status of each TEM_tem structure must be examined for details of what went wrong.

Practically speaking, the board FIFOs must come to their empty state. If not, they are in error.

unsigned int TEM_temsFpgasGet (  const TEM_tem *    tem,
unsigned int    temList
) 
 

Returns a bit mask of the FPGAs associated with the requested set of TEMs.

Parameters:
tem  The TEM database array.
temList  Which TEMs to check for FPGAs, expressed as a bit mask.
Returns:
A bit mask of the associated FPGAs.
This routine translate a list of TEMs to the their a list of FPGAs. See TEM_fpgasTemsGet() for the opposite direction of the translation.

unsigned int TEM_temsFpgasReset (  TEM_tem *    tem,
unsigned int    temList
) 
 

Issues a reset to the all FPGAs on the specified TEMs.

Parameters:
tem  The TEM database array.
temList:  The list of TEMs to issue a RESET FPGA.
Returns:
A bit mask indicating which TEMs had FPGAs whic failed to properly reset.
The return value is a bit mask indicating which TEMs had FPGAs which failed to properly reset. The corresponding status of each TEM_tem structure must be examined for details of what went wrong.

unsigned int TEM_temsPreset (  TEM_tem *    tem,
unsigned int    temList
) 
 

Puts the TEM control registers in a known state so the TEM's FPGAs can be loaded.

Parameters:
tem  The TEM database array.
temList:  The list of TEMs to issue a RESET FPGA.
Returns:
A bit mask of which TEMs failed to ready themselves. A value of 0 indicates all TEMs are ready.
This puts the TEM control registers in a know state so that the TEM's FPGAs can be loaded. Currently this consists of doing a READY, but if this proves insufficient...

unsigned int TEM_temsProbe (  TEM_tem *    tem,
unsigned int    temList
) 
 

Probes the VME bus for the present of the specified list of.

Parameters:
tem  The TEM database array.
temList  The list of TEMs to be probed.
Returns:
The list of TEMs in the requested set, but not present on the bus.
Probes the VME bus for the present of the specified list of TEM modules. If the module is present, the state of the TEM is set to present. The TEM must be in the INCLUDED state.

Warning:
Note that the return value is the set of TEMs not on the bus. This return value may seem strange, but is in keeping with the TEM routines returning a non-zero value only when something goes wrong. Here wrong is defined as looking for a non-existent TEM.

unsigned int TEM_temsReady (  TEM_tem *    tem,
unsigned int    temList
) 
 

Toggles the RESET FPGA and RESET FIFOs bit in the control register.

Parameters:
tem  The TEM database array.
temList  The list of TEMs to be readied.
Returns:
A bit mask of which TEMs failed to ready themselves. A value of 0 indicates all TEMs are ready.
Toggles the RESET FPGA and RESET FIFOs bit in the control register. This must be done after the FPGAs are loaded. This allows the FPGA registers to be seen by the external world.

unsigned int TEM_temsReset (  TEM_tem *    tem,
unsigned int    temList
) 
 

Resets all FPGAs, FIFOs and DETs on the specified TEMs.

Parameters:
tem  The TEM database array.
temList  The list of TEMs to be readied.
Returns:
A bit mask of which TEMs failed to reset themselves. A value of 0 indicates all TEMs are ready.

unsigned int TEM_temsScopeBitClear (  TEM_tem *    tem,
unsigned int    temList
) 
 

Clears the scope bit on the specified TEMs.

Parameters:
tem  The TEM database array.
temList  The list of TEMs to have clear the scope bit on.
Returns:
A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.
Not all TEMs have a scope bit. It is not considered a failure to attempt to toggle a non-existent scope bit. So, practically speaking, there is no way (except for a corruption error) for this routine to fail. The interface is keep this way for consistency with the other TEM routines.

unsigned int TEM_temsScopeBitSet (  TEM_tem *    tem,
unsigned int    temList
) 
 

Sets the scope bit on the specified TEMs.

Parameters:
tem  The TEM database array.
temList  The list of TEMs to have set the scope bit on.
Returns:
A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.
Not all TEMs have a scope bit. It is not considered a failure to attempt to toggle a non-existent scope bit. So, practically speaking, there is no way (except for a corruption error) for this routine to fail. The interface is keep this way for consistency with the other TEM routines.

unsigned int TEM_temsScopeBitToggle (  TEM_tem *    tem,
unsigned int    temList
) 
 

Toggles the scope bit on the specified TEMs.

Parameters:
tem  The TEM database array.
temList  The list of TEMs to have toggle the scope bit on.
Returns:
A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.
Not all TEMs have a scope bit. It is not considered a failure to attempt to toggle a non-existent scope bit. So, practically speaking, there is no way (except for a corruption error) for this routine to fail. The interface is keep this way for consistency with the other TEM routines.

unsigned int TEM_temsUnreadied (  const TEM_tem *    tem,
unsigned int    temList
) 
 

Simply query routine to learn which TEMs are not ready.

Parameters:
tem  The TEM database array.
temList  The list of TEMs to query.
Returns:
A bit mask of which TEMs are not ready.

unsigned int TEM_temTrgsCpuBsyClr (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Clears the CPU BSY bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to clear.
Returns:
The TEMs for which the CPU BSY bit could not be cleared. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsCpuBsySupported(), to get a list of the TEMs which support a CPU BSY and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsCpuBsyGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    cpuBsy
) 
 

Gets the state of the CPU BSY bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
cpuBsy  Returned as the state of the CPU BSY bits.
Returns:
The TEMs for which the CPU BSY bit could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsCpuBsySupported(), to get a list of the TEMs which support a CPU BSY and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsCpuBsySet (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Sets the CPU BSY bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to sets.
Returns:
The TEMs for which the CPU BSY bit could not be set. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsCpuBsySupported(), to get a list of the TEMs which support a CPU BSY and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsCpuBsySupported (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Returns a bit mask of TEMs which support the CPU BSY bit.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to check.
Returns:
The TEMs for which support the CPU BSY bit. This is proper subset of temList.
Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsCpuBsyWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    cpuBsys
) 
 

Writes the CPU BSY bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to write.
cpuBsys  The value to the CPU BSY bits, expressed as a bit mask.
Returns:
The TEMs for which the CPU BSY bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsCpuBsySupported(), to get a list of the TEMs which support a CPU BSY and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsExtTreqEnbClr (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Clears the EXT TREQ ENB bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to clear.
Returns:
The TEMs for which the EXT TREQ ENB bit could not be cleared. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a EXT TREQ ENB bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsExtTreqBitSupported(), to get a list of the TEMs which support a EXT TREQ ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsExtTreqEnbGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    extTreq
) 
 

Gets the state of the EXT TREQ ENB bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
cpuBsy  Returned as the state of the EXT TREQ ENB bits.
Returns:
The TEMs for which the EXT TREQ ENB bit could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a EXT TREQ ENB bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsExtTreqEnbSupported(), to get a list of the TEMs which support EXT TREQ ENB, and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsExtTreqEnbSet (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Sets the EXT TREQ ENB bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to sets.
Returns:
The TEMs for which the EXT TREQ ENB bit could not be set. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a EXT TREQ ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsExtTreqEnbSupported(), to get a list of the TEMs which support a EXT TREQ ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsExtTreqEnbSupported (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Returns a bit mask of TEMs which support the EXT TREQ ENB bit.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to check.
Returns:
The TEMs for which support the EXT TREQ ENB bit. This is proper subset of temList.
Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsExtTreqEnbWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    extTreq
) 
 

Writes the EXT TREQ ENB bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to write.
cpuBsys  The value to the EXT TREQ ENB bits, expressed as a bit mask.
Returns:
The TEMs for which the EXT TREQ ENB bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a EXT TREQ ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsExtTreqEnbSupported(), to get a list of the TEMs which support a EXT TREQ ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tArmClr (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Clears the Global L1t Arm bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to clear.
Returns:
The TEMs for which the GBL L1T ARM bit could not be cleared. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1TArmSupported(), to get a list of the TEMs which support GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tArmGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    gblL1tArm
) 
 

Gets the state of the Global L1t Arm bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
cpuBsy  Returned as the state of the GBL L1T ARM bits.
Returns:
The TEMs for which the GBL L1T ARM bit could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tArmSupported(), to get a list of the TEMs which support GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tArmSet (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Sets the Global L1t Enable bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to sets.
Returns:
The TEMs for which the GBL L1T Arm bit could not be set. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tArmSupported(), to get a list of the TEMs which support a GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tArmSupported (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Returns a bit mask of TEMs which support a Global L1t Arm.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to check.
Returns:
The TEMs for which support the GBL L1T ARM bit. This is proper subset of temList.
Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsGblL1tArmWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    gblL1tArm
) 
 

Writes the Global L1t Enable bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to write.
cpuBsys  The value to the GBL L1T ARM bits, expressed as a bit mask.
Returns:
The TEMs for which the GBL L1T bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ARM mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tArmSupported(), to get a list of the TEMs which support a GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbClr (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Clears the Global L1t Enable bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to clear.
Returns:
The TEMs for which the GBL L1T ENB bit could not be cleared. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1TEnbSupported(), to get a list of the TEMs which support GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    gblL1tEnb
) 
 

Gets the state of the Global L1t Enable bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
gblL1tEnb  Returned as the state of the GBL L1T ENB bits.
Returns:
The TEMs for which the GBL L1T ENB bit could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ENB or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tEnbSupported(), to get a list of the TEMs which support GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbSet (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Sets the Global L1t Enable bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to sets.
Returns:
The TEMs for which the GBL L1T ENB bit could not be set. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ENB or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tEnbSupported(), to get a list of the TEMs which support a GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbSupported (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Returns a bit mask of TEMs which support a Global L1t Enable.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to check.
Returns:
The TEMs for which support the GBL L1T ENB bit. This is proper subset of temList.
Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsGblL1tEnbWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    gblL1tEnb
) 
 

Writes the Global L1t Enable bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to write.
gblL1tEnb  The value to the GBL L1T ENB bits, expressed as a bit mask.
Returns:
The TEMs for which the GBL L1T bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a GBL L1T ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tEnbSupported(), to get a list of the TEMs which support a GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tEnbClr (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Clears the L1T ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to clear.
Returns:
The TEMs for which the L1T ENABLE bit could not be cleared. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tEnbSupported(), to get a list of the TEMs which support a L1T ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tEnbGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    l1tEnb
) 
 

Gets the state of the L1T ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
enbL1t  Returned as the state of the L1T ENABLE bits.
Returns:
The TEMs for which the L1T ENABLE bit could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tEnbSupported(), to get a list of the TEMs which support a L1T ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tEnbSet (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Sets the L1T ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to sets.
Returns:
The TEMs for which the L1T ENABLE bit could not be set. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tEnbSupported(), to get a list of the TEMs which support a L1T ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tEnbSupported (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Returns a bit mask of TEMs which support the L1T ENABLE bit.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to check.
Returns:
The TEMs for which support the L1T ENABLE bit. This is proper subset of temList.
Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsL1tEnbWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    l1tEnbs
) 
 

Writes the L1T ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to write.
l1tEnbs  The value of the L1T ENABLE bits, expressed as a bit mask.
Returns:
The TEMs for which the L1T ENABLE bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tEnbSupported(), to get a list of the TEMs which support a L1T ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tInGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    l1tIn
) 
 

Gets the state of the L1T IN mask for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
enbL1t  Returned as the state of the L1T TMR bits. The mask is densely packed, 3 bit per TEM, by TEM.
Returns:
The TEMs for which the L1T IN mask could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM is incapable of having the L1T IN mask read. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tInWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    l1tIn
) 
 

Writes the L1T IN mask for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask to write.
l1tIn  The value of the L1T IN mask , expressed as a bit mask. 3 bits/per TEM. This limits the number of TEMs that can be supported to 10.
Returns:
The TEMs for which the TREQ ENABLE bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM is incapable of having the L1T IN mask written to it. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tOutGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    l1tOut
) 
 

Gets the state of the L1T OUT mask for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
l1tOut  Returned as the state of the L1T OUT bits. The mask is densely packed, 3 bit per TEM, by TEM.
Returns:
The TEMs for which the L1T OUT mask could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM is incapable of having the L1T OUT mask read. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tOutWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    l1tOut
) 
 

Writes the L1T OUT mask for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask to write.
l1tOut  The value of the L1T OUT mask , expressed as a bit mask. 3 bits/per TEM. This limits the number of TEMs that can be supported to 10.
Returns:
The TEMs for which the TREQ OUT mask could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM is incapable of having the L1T OUT mask written to it. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tTmrClr (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Clears the L1T TMR bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to clear.
Returns:
The TEMs for which the L1T TMR bit could not be cleared. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tTmrSupported(), to get a list of the TEMs which support a L1T TMR and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tTmrGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    l1tTmr
) 
 

Gets the state of the L1T TMR bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
enbL1t  Returned as the state of the L1T TMR bits.
Returns:
The TEMs for which the L1T TMR bit could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tTmrSupported(), to get a list of the TEMs which support a L1T TMR and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tTmrSet (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Sets the L1T TMR bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to sets.
Returns:
The TEMs for which the L1T TMR bit could not be set. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tTmrSupported(), to get a list of the TEMs which support a L1T TMR and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tTmrSupported (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Returns a bit mask of TEMs which support the L1T TMR bit.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to check.
Returns:
The TEMs for which support the L1T TMR bit. This is proper subset of temList.
Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsL1tTmrWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    l1tTmrs
) 
 

Writes the L1T TMR bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to write.
l1tEnbs  The value of the L1T TMR bits, expressed as a bit mask.
Returns:
The TEMs for which the L1T TMR bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tTmrSupported(), to get a list of the TEMs which support a L1T TMR and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsTcssGet (  const TEM_tem *    tems,
unsigned int    temList,
const struct _TEM_temTrg *    trg[]
) 
 

Returns a pointer to an array of TEM trigger structures.

Parameters:
tems  The TEM database.
temList  The list of TEMs.
isc  An array, indexed by TEM ID, which will be filled with pointers to the TEM trigger control structure.
Returns:
A mask of those TEMs for which an address was requested, but could not provided.
Returns a pointer to an array of TEM trigger control structures. This breaks the modularity, but the gain in efficiency dictates this strategy.

This operation requires no VME operations and, so, does not depend on the module actually existing. It only depends on the TEM being included in the system.

The return value is a mask of those TEMs for which an address was requested, but was not provided. These are usually TEMs which are not at least in the INCLUDED state.)

unsigned int TEM_temTrgsTreqEnbClr (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Clears the TREQ ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to clear.
Returns:
The TEMs for which the TREQ ENABLE bit could not be cleared. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsTreqEnbSupported(), to get a list of the TEMs which support a TREQ ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsTreqEnbGet (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int *    treqEnb
) 
 

Gets the state of the TREQ ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to get.
treqEnb  Returned as the state of the TREQ ENABLE bits.
Returns:
The TEMs for which the TREQ ENABLE bit could not be read. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsTreqEnbSupported(), to get a list of the TEMs which support a REQ ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsTreqEnbSet (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Sets the TREQ ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to sets.
Returns:
The TEMs for which the TREQ ENABLE bit could not be set. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsTreqEnbSupported(), to get a list of the TEMs which support a TREQ ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsTreqEnbSupported (  const TEM_tem *    tems,
unsigned int    temList
) 
 

Returns a bit mask of TEMs which support the TREQ ENABLE bit.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to check.
Returns:
The TEMs for which support the TREQ ENABLE bit. This is proper subset of temList.
Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsTreqEnbWrite (  const TEM_tem *    tems,
unsigned int    temList,
unsigned int    treqEnb
) 
 

Writes the TREQ ENABLE bit for the selected TEMs.

Parameters:
tems  The TEM database.
temList  The set of target TEMs, expressed as a bit mask, to write.
treqEnb  The value of the TREQ ENABLE bits, expressed as a bit mask.
Returns:
The TEMs for which the TREQ ENABLE bit could not be written. This is proper subset of temList.
A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsTreqEnbSupported(), to get a list of the TEMs which support a TREQ ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

Generated on Tue Mar 5 14:04:15 2002 by doxygen1.2.14 written by Dimitri van Heesch, © 1997-2002