CMX Generated Documentation

#include <stdlib.h>
#include <intLib.h>
#include <iv.h>
#include <sysLib.h>
#include "BBC/SPIN.h"
#include "BBC/TIMERS.h"
#include "BVME/VME.h"
#include "BFPGA/FPGA_bs.h"
#include "BFPGA/FPGA_ttc.h"
#include "BTU/TEM.h"
#include "BTU/FPGA_vme.h"
#include "BTU/TEM_temDsc.h"
#include "BTU/TEM_fpgaDsc.h"

Defines
#define	OFFSET_OF(_type, _member)
	Macro to get the byte offset of a structure member. More...
#define	CNT_OF(array) (sizeof(array)/sizeof(*array))
	Macro to get the number of elements in an array.
#define	TEM_REGADR(lcl, offset) (volatile unsigned int )((char )lcl+offset)
	Converts a base address and offset to an address. More...
#define	BASE_K_SHIFT 5
	Used in verifying that a VME BASE INTERRUPT VECTOR is valid.
#define	BASE_M_MBZ_BITS ((1 << BASE_K_SHIFT) - 1)
	Used in verifying that a VME BASE INTERRUPT VECTOR is valid.
#define	BASE_M_CHECK(_base) (_base >> BASE_K_SHIFT)
	Used in verifying that a VME BASE INTERRUPT VECTOR is valid.
#define	BASE_M_VALID
	Used in verifying that a VME BASE INTERRUPT VECTOR is valid. More...
#define	LVL_M_VALID 0xFE
	Mask of allowable VME interrupt levels( 1-7).
#define	TEM_M_EVT_NEVTS 0x7ff
	Bit mask used to extract the number of events. More...
Typedefs
typedef enum _ToggleAndCheckOpts	ToggleAndCheckOpts
	Typedef for enum _ToggleAndCheckOpts. More...
Enumerations
enum	_ToggleAndCheckOpts { OPT_M_SET = (1 << 0), OPT_M_CLR = (1 << 1), OPT_M_TOGGLE, OPT_M_CHECK = (1 << 2), OPT_M_SET_AND_CHECK, OPT_M_CLR_AND_CHECK, OPT_M_TOGGLE_AND_CHECK }
	Enumerates all the action options to the toggleAndCheck() routine. More...
Functions
int	getMaxSize (TEM_fpga *fpgas, unsigned int fpgaList)
	Finds the maximum size of a set of FPGA download files. More...
void	initLogs (TEM_fpgaLog *logs, int cnt)
	Initializes an array of TEM_fpgaLog structures. More...
unsigned int	toggleAndCheck (TEM_tem *tem, unsigned int temList, unsigned int capabilities, TEM_temActionId which, ToggleAndCheckOpts opts, TEM_temState newState)
	Sets, clears, toggles or checks some bits in the TEM registers. More...
unsigned int	doFpgaAction (TEM_fpga *fpga, unsigned int fpgaList, FPGA_vmeAction action, TEM_fpgaLogId logId)
	Performs simple actions on a set of FPGAs. More...
unsigned int	fpgasAuxCtlGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int which, unsigned int retList)
	Returns the state of the specified bit. More...
unsigned int	fpgasAuxCtlSupported (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int which)
	Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs. More...
unsigned int	fpgasAuxCtlWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int which, unsigned int list)
	Writes the bit for the specified FPGAs. More...
unsigned int	fpgasCtlGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int which, unsigned int retList)
	Returns the state of the specified bit. More...
unsigned int	fpgasCtlSupported (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int which)
	Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs. More...
unsigned int	fpgasCtlWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int which, unsigned int list)
	Writes the bit for the specified FPGAs. More...
unsigned int	fpgasStatGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int which, unsigned int retList)
	Returns the state of the specified bit. More...
unsigned int	fpgasStatSupported (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int which)
	Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs. More...
unsigned int	temTrgsCtlGet (const TEM_tem tems, unsigned int temList, unsigned int which, unsigned int retList)
	Returns the state of the specified bit. More...
unsigned int	temTrgsCtlSupported (const TEM_tem *tems, unsigned int temList, unsigned int which)
	Returns a bit list indicating whether the TEMs support the specified bit. More...
unsigned int	temTrgsCtlWrite (const TEM_tem *tems, unsigned int temList, unsigned int which, unsigned int list)
	Writes the bit for the specified TEMs. More...
unsigned int	temTrgsMskGet (const TEM_tem tems, unsigned int temList, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int retList)
	Returns the state of the specified msk. More...
unsigned int	temTrgsMskSupported (const TEM_tem *tems, unsigned int temList, unsigned int which)
	Returns a bit list indicating whether the TEMs support the specified bit. More...
unsigned int	temTrgsMskWrite (const TEM_tem *tems, unsigned int temList, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int list)
	Writes the bit for the specified TEMs. More...
unsigned int	temTrgsTstGet (const TEM_tem tems, unsigned int temList, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int retList)
	Returns the state of the specified msk. More...
unsigned int	temTrgsTstSupported (const TEM_tem *tems, unsigned int temList, unsigned int which)
	Returns a bit list indicating whether the TEMs support the specified bit. More...
unsigned int	temTrgsTstWrite (const TEM_tem *tems, unsigned int temList, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int list)
	Writes the bit for the specified TEMs. More...
unsigned int	TEM_temsAdd (TEM_tem tem, unsigned int temList, const unsigned int vmeAdrs[TEM_C_CNT], const struct _TEM_temDsc const temDscs[TEM_C_CNT])
	Completes a high level description of each active TEM. More...
unsigned int	TEM_temsAdrsGet (const TEM_tem tems, unsigned int temList, unsigned int vmeAdrs[TEM_C_CNT], volatile unsigned int lclAdrs[TEM_C_CNT])
	Fills in arrays of the VME and LOCAL addresss of the specified TEMs. More...
unsigned int	TEM_temsDetsReset (TEM_tem *tem, unsigned int temList)
	Issues a reset to the detector specific registers on the specified TEMs. More...
unsigned int	TEM_temsFifosReset (TEM_tem *tem, unsigned int temList)
	Issues a reset to the all FIFOs on the specified TEMs. More...
unsigned int	TEM_temsFpgasGet (const TEM_tem *tem, unsigned int temList)
	Returns a bit mask of the FPGAs associated with the requested set of TEMs. More...
unsigned int	TEM_temsFpgasReset (TEM_tem *tem, unsigned int temList)
	Issues a reset to the all FPGAs on the specified TEMs. More...
unsigned int	TEM_temsPreset (TEM_tem *tem, unsigned temList)
	Puts the TEM control registers in a known state so the TEM's FPGAs can be loaded. More...
unsigned int	TEM_temsProbe (TEM_tem *tem, unsigned int temList)
	Probes the VME bus for the present of the specified list of. More...
unsigned int	TEM_temsReady (TEM_tem *tem, unsigned temList)
	Toggles the RESET FPGA and RESET FIFOs bit in the control register. More...
unsigned int	TEM_temsReset (TEM_tem *tem, unsigned int temList)
	Resets all FPGAs, FIFOs and DETs on the specified TEMs. More...
unsigned int	TEM_temsScopeBitClear (TEM_tem *tem, unsigned int temList)
	Clears the scope bit on the specified TEMs. More...
unsigned int	TEM_temsScopeBitSet (TEM_tem *tem, unsigned int temList)
	Sets the scope bit on the specified TEMs. More...
unsigned int	TEM_temsScopeBitToggle (TEM_tem *tem, unsigned int temList)
	Toggles the scope bit on the specified TEMs. More...
unsigned int	TEM_temsUnreadied (const TEM_tem *tem, unsigned int temList)
	Simply query routine to learn which TEMs are not ready. More...
unsigned int	TEM_fpgasAdd (TEM_fpga fpgas, unsigned int fpgaList, const struct _TEM_fpgaDsc const fpgaDscs[TEM_C_FPGA_CNT], const struct _FPGA_ttcHdr const fpgaTtcs[TEM_C_FPGA_CNT], const TEM_tem tem)
	Adds the specified FPGAs to the internal database. More...
unsigned int	TEM_fpgasAdrsGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int vmeAdrs[TEM_C_FPGA_CNT], volatile unsigned int lclAdrs[TEM_C_FPGA_CNT])
	Fills in arrays of the VME and LOCAL addresss of the specified FPGAs. More...
unsigned int	TEM_fpgasBistClear (const TEM_fpga *fpgas, unsigned int fpgaList)
	Clears the self test bit for the selected FPGAs. More...
unsigned int	TEM_fpgasBistGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int bistList)
	Returns the state of the Self Test for the specified fpgas. More...
unsigned int	TEM_fpgasBistSet (const TEM_fpga *fpgas, unsigned int fpgaList)
	Sets the Self Test for the specified FPGAs. More...
unsigned int	TEM_fpgasBistSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
	Returns which of the specified FPGAs support a self-test mode. More...
unsigned int	TEM_fpgasBistWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int bistList)
	Writes the Self Test for the specified FPGAs. More...
unsigned int	TEM_fpgasHfullClrClear (const TEM_fpga *fpgas, unsigned int fpgaList)
	Clears the FIFO Half Full Throttle Manual Clear for the selected FPGAs. More...
unsigned int	TEM_fpgasHfullClrGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int hfullList)
	Returns the state of the FIFO Half Full Throttle Manual Clear. for the specified fpgas. More...
unsigned int	TEM_fpgasHfullClrSet (const TEM_fpga *fpgas, unsigned int fpgaList)
	Sets the FIFO Half Full Throttle for the specified FPGAs. More...
unsigned int	TEM_fpgasHfullClrSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
	Returns which of the specified FPGAs support a FIFO Half Full Throttle Manual Clear mode. More...
unsigned int	TEM_fpgasHfullClrWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int hfullList)
	Writes the Half Full Throttle Manual Clear mode for the specified FPGAs. More...
unsigned int	TEM_fpgasHfullEnbClear (const TEM_fpga *fpgas, unsigned int fpgaList)
	Clears the FIFO Half Full Throttle for the selected FPGAs. More...
unsigned int	TEM_fpgasHfullEnbGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int hfullList)
	Returns the state of the FIFO Half Full Throttle for the specified fpgas. More...
unsigned int	TEM_fpgasHfullEnbSet (const TEM_fpga *fpgas, unsigned int fpgaList)
	Sets the FIFO Half Full Throttle for the specified FPGAs. More...
unsigned int	TEM_fpgasHfullEnbSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
	Returns which of the specified FPGAs support a FIFO Half Full Throttle mode. More...
unsigned int	TEM_fpgasHfullEnbWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int hfullList)
	Writes the Half Full Throttle mode for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoModeClear (const TEM_fpga *fpgas, unsigned int fpgaList)
	Clears the Readout Mode for the selected FPGAs. More...
unsigned int	TEM_fpgasRdoModeGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int rdoList)
	Returns the state of the Readout Mode for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoModeSet (const TEM_fpga *fpgas, unsigned int fpgaList)
	Sets the Readout Mode to 1, for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoModeSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
	Returns a bit list indicating which FPGAs support an alternative Readout Mode. More...
unsigned int	TEM_fpgasRdoModeWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int rdoList)
	Writes the Readout Mode for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoBsyMinMaxClear (const TEM_fpga *fpgas, unsigned int fpgaList)
	Clears the Readout Min/MaxMode for the selected FPGAs. More...
unsigned int	TEM_fpgasRdoBsyMinMaxGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int rdoMinMaxList)
	Returns the state of the Readout Min/MaxMode for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoBsyMinMaxSet (const TEM_fpga *fpgas, unsigned int fpgaList)
	Sets the Readout Busy Min/Max 1, for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoBsyMinMaxSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
	Returns a bit list indicating which FPGAs support the Readout Busy Min/Max mode. More...
unsigned int	TEM_fpgasRdoBsyMinMaxWrite (const TEM_fpga *fpgas, unsigned int fpgaList, unsigned int rdoBsyMinMaxList)
	Writes the Readout Busy Min/Max mode for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoToGet (const TEM_fpga fpgas, unsigned int fpgaList, unsigned int rdoToList)
	Returns the state of the Readout Timeout status bit for the specified FPGAs. More...
unsigned int	TEM_fpgasRdoToSupported (const TEM_fpga *fpgas, unsigned int fpgaList)
	Returns a bit list indicating which FPGAs support the Readout Timeout status bit. More...
unsigned int	TEM_fpgasClear (TEM_fpga *fpgas, unsigned int fpgaList)
	Clears the specified list of FPGAs. More...
unsigned int	TEM_fpgasL1tCounterClear (TEM_fpga *fpgas, unsigned int fpgaList)
	Does a L1T COUNTER CLEAR on the specified list of FPGAs. More...
unsigned int	TEM_fpgasL1tTimerClear (TEM_fpga *fpgas, unsigned int fpgaList)
	Does a CLEAR L1T TIMER on the specified list of FPGAs. More...
unsigned int	TEM_fpgasLoad (TEM_fpga *fpgas, unsigned int fpgaList)
	Loads the specified list of FPGAs. More...
unsigned int	TEM_fpgasLogicClear (TEM_fpga *fpgas, unsigned int fpgaList)
	Does a CLEAR LOGIC on the specified list of FPGAs. More...
unsigned int	TEM_fpgasRegsClear (TEM_fpga *fpgas, unsigned int fpgaList)
	Does a CLEAR REGS on the specified list of FPGAs. More...
unsigned int	TEM_fpgasTemsGet (const TEM_fpga *fpga, unsigned int fpgaList)
	Returns a bit mask of the TEMs associated with the requested set of FPGASs. More...
unsigned int	TEM_fpgasUnload (TEM_fpga *fpga, unsigned int fpgaList)
	Unloads the specified list of FPGAs. More...
unsigned int	TEM_temIntsIscsGet (const TEM_tem tems, unsigned int temList, const struct _TEM_temInt isc[])
	Returns a pointer to an array of TEM interrupt structures. More...
unsigned int	TEM_temIntsInit (const TEM_tem tems, unsigned int temList, const unsigned int levels, const unsigned int *bases)
	Initializes the TEM interrupt registers. More...
int	TEM_temIntsMinEventsGet (const TEM_tem tems, unsigned int temList, unsigned int nevts)
	Returns the minimum number of events pending from the specified list of TEMs. More...
unsigned int	TEM_temIntsDisable (const TEM_tem *tems, unsigned int temList, unsigned int irpts)
	Disables the specified list of interrupts on all specified TEMs. More...
unsigned int	TEM_temIntsEnable (const TEM_tem *tems, unsigned int temList, unsigned int irpts)
	Enables the specified list of interrupts on all specified TEMs. More...
unsigned int	TEM_temIntsMasterDisable (const TEM_tem *tems, unsigned int temList)
	Disables the master interrupt on the specified list of TEMs. More...
unsigned int	TEM_temIntsMasterEnable (const TEM_tem *tems, unsigned int temList)
	Enables the master interrupt on the specified list of TEMs. More...
unsigned int	TEM_temIntsMasterReset (const TEM_tem *tems, unsigned int temList)
	Resets the master interrupt on the specified list of TEMs. More...
int	TEM_temIntConnect (const TEM_tem *tems, TEM_temId temId, unsigned int vector, TEM_temIntCbRtn cb_rtn, TEM_temIntCbPrm cb_prm)
	Connects the interrupt vector on a individual TEM basis. The TEM must be at least in the PRESENT state. More...
unsigned int	TEM_temIntsVmeDisable (const TEM_tem *tems, unsigned int temList)
	Disables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled. More...
unsigned int	TEM_temIntsVmeEnable (const TEM_tem *tems, unsigned int temList)
	Enables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled. More...
unsigned int	TEM_temIntsThresholdSet (const TEM_tem tems, unsigned int temList, const unsigned int thresholds)
	Sets the event threshold on the specified list of TEMs. More...
unsigned int	TEM_temTrgsTcssGet (const TEM_tem tems, unsigned int temList, const struct _TEM_temTrg trg[])
	Returns a pointer to an array of TEM trigger structures. More...
unsigned int	TEM_temTrgsCpuBsyClr (const TEM_tem *tems, unsigned int temList)
	Clears the CPU BSY bit for the selected TEMs. More...
unsigned int	TEM_temTrgsCpuBsyGet (const TEM_tem tems, unsigned int temList, unsigned int cpuBsy)
	Gets the state of the CPU BSY bit for the selected TEMs. More...
unsigned int	TEM_temTrgsCpuBsySet (const TEM_tem *tems, unsigned int temList)
	Sets the CPU BSY bit for the selected TEMs. More...
unsigned int	TEM_temTrgsCpuBsySupported (const TEM_tem *tems, unsigned int temList)
	Returns a bit mask of TEMs which support the CPU BSY bit. More...
unsigned int	TEM_temTrgsCpuBsyWrite (const TEM_tem *tems, unsigned int temList, unsigned int cpuBsys)
	Writes the CPU BSY bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tEnbClr (const TEM_tem *tems, unsigned int temList)
	Clears the L1T ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tEnbGet (const TEM_tem tems, unsigned int temList, unsigned int l1tEnb)
	Gets the state of the L1T ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tEnbSet (const TEM_tem *tems, unsigned int temList)
	Sets the L1T ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tEnbSupported (const TEM_tem *tems, unsigned int temList)
	Returns a bit mask of TEMs which support the L1T ENABLE bit. More...
unsigned int	TEM_temTrgsL1tEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tEnbs)
	Writes the L1T ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tTmrClr (const TEM_tem *tems, unsigned int temList)
	Clears the L1T TMR bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tTmrGet (const TEM_tem tems, unsigned int temList, unsigned int l1tTmr)
	Gets the state of the L1T TMR bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tTmrSet (const TEM_tem *tems, unsigned int temList)
	Sets the L1T TMR bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tTmrSupported (const TEM_tem *tems, unsigned int temList)
	Returns a bit mask of TEMs which support the L1T TMR bit. More...
unsigned int	TEM_temTrgsL1tTmrWrite (const TEM_tem *tems, unsigned int temList, unsigned int tmrEnbs)
	Writes the L1T TMR bit for the selected TEMs. More...
unsigned int	TEM_temTrgsTreqEnbClr (const TEM_tem *tems, unsigned int temList)
	Clears the TREQ ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsTreqEnbGet (const TEM_tem tems, unsigned int temList, unsigned int treqEnb)
	Gets the state of the TREQ ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsTreqEnbSet (const TEM_tem *tems, unsigned int temList)
	Sets the TREQ ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsTreqEnbSupported (const TEM_tem *tems, unsigned int temList)
	Returns a bit mask of TEMs which support the TREQ ENABLE bit. More...
unsigned int	TEM_temTrgsTreqEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int treqEnbs)
	Writes the TREQ ENABLE bit for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tInGet (const TEM_tem tems, unsigned int temList, unsigned int l1tIn)
	Gets the state of the L1T IN mask for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tInWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tIn)
	Writes the L1T IN mask for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tOutGet (const TEM_tem tems, unsigned int temList, unsigned int l1tOut)
	Gets the state of the L1T OUT mask for the selected TEMs. More...
unsigned int	TEM_temTrgsL1tOutWrite (const TEM_tem *tems, unsigned int temList, unsigned int l1tOut)
	Writes the L1T OUT mask for the selected TEMs. More...
unsigned int	TEM_temTrgsExtTreqEnbClr (const TEM_tem *tems, unsigned int temList)
	Clears the EXT TREQ ENB bit for the selected TEMs. More...
unsigned int	TEM_temTrgsExtTreqEnbGet (const TEM_tem tems, unsigned int temList, unsigned int extTreq)
	Gets the state of the EXT TREQ ENB bit for the selected TEMs. More...
unsigned int	TEM_temTrgsExtTreqEnbSet (const TEM_tem *tems, unsigned int temList)
	Sets the EXT TREQ ENB bit for the selected TEMs. More...
unsigned int	TEM_temTrgsExtTreqEnbSupported (const TEM_tem *tems, unsigned int temList)
	Returns a bit mask of TEMs which support the EXT TREQ ENB bit. More...
unsigned int	TEM_temTrgsExtTreqEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int extTreq)
	Writes the EXT TREQ ENB bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tArmClr (const TEM_tem *tems, unsigned int temList)
	Clears the Global L1t Arm bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tArmGet (const TEM_tem tems, unsigned int temList, unsigned int gblL1tArm)
	Gets the state of the Global L1t Arm bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tArmSet (const TEM_tem *tems, unsigned int temList)
	Sets the Global L1t Enable bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tArmSupported (const TEM_tem *tems, unsigned int temList)
	Returns a bit mask of TEMs which support a Global L1t Arm. More...
unsigned int	TEM_temTrgsGblL1tArmWrite (const TEM_tem *tems, unsigned int temList, unsigned int gblL1tArm)
	Writes the Global L1t Enable bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tEnbClr (const TEM_tem *tems, unsigned int temList)
	Clears the Global L1t Enable bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tEnbGet (const TEM_tem tems, unsigned int temList, unsigned int gblL1tEnb)
	Gets the state of the Global L1t Enable bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tEnbSet (const TEM_tem *tems, unsigned int temList)
	Sets the Global L1t Enable bit for the selected TEMs. More...
unsigned int	TEM_temTrgsGblL1tEnbSupported (const TEM_tem *tems, unsigned int temList)
	Returns a bit mask of TEMs which support a Global L1t Enable. More...
unsigned int	TEM_temTrgsGblL1tEnbWrite (const TEM_tem *tems, unsigned int temList, unsigned int gblL1tEnb)
	Writes the Global L1t Enable bit for the selected TEMs. More...

Detailed Description

     TEM_tems<XXX>   - Routines that act on a collection of TEMs
     TEM_fpgas<XXX>  - Routines that act on a collection of FPGAs
     TEM_temInt<XXX> - Routines that act on a collection of TEMs,
                       addressing the interrupt structure.

Define Documentation

#define BASE_M_VALID

Value:

((1 << (0x60 >> BASE_K_SHIFT)) |  \
                             (1 << (0x80 >> BASE_K_SHIFT)) |  \
                             (1 << (0xA0 >> BASE_K_SHIFT)) |  \
                             (1 << (0xC0 >> BASE_K_SHIFT)))

Used in verifying that a VME BASE INTERRUPT VECTOR is valid.

These macros are used to determine whether a base interrupt vector is legitimate. Legitimate base interrupt vectors must be drawn from the set, 0x60, x080, 0xA0 and 0xC0. The verification routines first verify that the least significant 5 bits, are zero using BASE_M_MBZ_BITS as a mask. After verifying this, these bits are shifted off and leaving the numbers 3,4,5,6. This number is converted to a bit mask and checked against BASE_M_VALID, which is a mask of all the valid numbers.

#define OFFSET_OF	(	_type,
		_member		)

Value:

((int) \
                        ((char *)&((_type *)0)->_member - (char *)(_type *)0))

Macro to get the byte offset of a structure member.

#define TEM_M_EVT_NEVTS 0x7ff

Bit mask used to extract the number of events.

The number of events field in all TEMs has 11 valid bits. What differs is the actual range of these bits. Some only count to 9 bits, others to 11 bits. However, in those that do not reach 11 bits, the unused bits are guaranteed to be 0.

#define TEM_REGADR	(	lcl,
		offset		)	(volatile unsigned int )((char )lcl+offset)

Converts a base address and offset to an address.

Simple macro to get the address of a register from its base and offset. This really just hides all the ugly casting that's going on.

Typedef Documentation

ToggleAndCheckOpts

Typedef for enum _ToggleAndCheckOpts.

The toggleAndCheck() is a low-performance but very convenient routine used to perform various operations on a TEM register. This enumerates all the possible actions.

Enumeration Type Documentation

enum _ToggleAndCheckOpts

Enumerates all the action options to the toggleAndCheck() routine.

Enumeration values:

OPT_M_SET	Perform only the set operation
OPT_M_CLR	Perform only the clr operation
OPT_M_TOGGLE	Perform only a toggle operation
OPT_M_CHECK	Perform only a check operation
OPT_M_SET_AND_CHECK	Perform a set and check operation
OPT_M_CLR_AND_CHECK	Perform a clr and check operation
OPT_M_TOGGLE_AND_CHECK	Perfrom a toggle and chk operation

Function Documentation

unsigned int doFpgaAction	(	TEM_fpga *	fpga,
		unsigned int	fpgaList,
		FPGA_vmeAction	action,
		TEM_fpgaLogId	logId
	)	`[static]`

Performs simple actions on a set of FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of target FPGAs, expressed as a bit mask. Only FGPAs in this list will have the action performed on them.
action	A user supplied callback routine which performs the action.
logId	The logging ID of the action.

Returns:: A list of FPGAs on which the action failed. 0 indicates that the action was successful on all specified FPGAs

Routine to perform the simple actions on a set of FPGAs. A log of these actions are kept with the FPGA.

unsigned int fpgasAuxCtlGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which,
		unsigned int *	retList
	)	`[static]`

Returns the state of the specified bit.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaAuxCtlDsc structure.
rdoList	Returned as a bit mask of the state of the specified bit. one bit per FPGA.

Returns:: The FPGAs for which the bit could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call fpgasAuxCtlSupported(), to get a list of the FPGAs which support the bit and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int fpgasAuxCtlSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which
	)	`[static]`

Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaAuxCtlDsc structure.

Returns:: Returned as a bit mask of which FPGAs support the specified bit. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports the bit. It does not in any way indicate that the bit can be set. For example, if the FPGA is not loaded, the bit cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int fpgasAuxCtlWrite	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which,
		unsigned int	list
	)	`[static]`

Writes the bit for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to write the bit.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaAuxCtlDsc structure.
list	The value of the bit to write, expressed as a bit mask, 1 bit per FPGA.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

unsigned int fpgasCtlGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which,
		unsigned int *	retList
	)	`[static]`

Returns the state of the specified bit.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaCtlDsc structure.
rdoList	Returned as a bit mask of the state of the specified bit. one bit per FPGA.

Returns:: The FPGAs for which the bit could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call fpgasCtlSupported(), to get a list of the FPGAs which support the bit and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int fpgasCtlSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which
	)	`[static]`

Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaCtlDsc structure.

Returns:: Returned as a bit mask of which FPGAs support the specified bit. This is a proper subset of fpgaList.

unsigned int fpgasCtlWrite	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which,
		unsigned int	list
	)	`[static]`

Writes the bit for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to write the bit.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaCtlDsc structure.
list	The value of the bit to write, expressed as a bit mask, 1 bit per FPGA.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call fpgasCtlSupported(), to get a list of the FPGAs which support the bit and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int fpgasStatGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which,
		unsigned int *	retList
	)	`[static]`

Returns the state of the specified bit.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaStatDsc structure.
retList	Returned as a bit mask of the state of the specified bit. one bit per FPGA.

Returns:: The FPGAs for which the bit could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. One should call fpgasStatSupported(), to get a list of the FPGAs which support the bit and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int fpgasStatSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	which
	)	`[static]`

Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_fpgaStatDsc structure.

Returns:: Returned as a bit mask of which FPGAs support the specified bit. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports the bit. It does not in any way indicate that the bit can be read. For example, if the FPGA is not loaded, the bit cannot be read. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

int getMaxSize	(	TEM_fpga *	fpga,
		unsigned int	fpgaList
	)	`[static]`

Finds the maximum size of a set of FPGA download files.

Parameters:

fpga	The FPGA database.
fpgaList	The target list of FPGAs.

Returns:: The maximum buffer size needed in bytes.

This is used by TEM_fpgasLoad to find the maximum size of a group FPGA download files. This allows one to get the memory once for all downloads.

void initLogs	(	TEM_fpgaLog *	log,
		int	cnt
	)	`[static]`

Initializes an array of TEM_fpgaLog structures.

Parameters:

log	The array of FPGA log structures to initialize.
cnt	The number of FPGA log structures to initialize.

Initializes an array of TEM_fpgaLog structures. This is just a convenience routine to encapsulate the initialization details.

unsigned int TEM_fpgasAdd	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		const struct _TEM_fpgaDsc *const	fpgaDscs[TEM_C_FPGA_CNT],
		const struct _FPGA_ttcHdr *const	fpgaTtcs[TEM_C_FPGA_CNT],
		const TEM_tem *	tem
	)

Adds the specified FPGAs to the internal database.

Parameters:

fpgas	An array to be filled in with the information about the requested FPGAs.
fpgaList	A list of FPGAs to add, expressed as a bit mask. Only FPGAs selected by this bit mask and which are are also part of the system can eventually be loaded.
fpgaDscs	An array of pointers to the FPGA descriptors. This gives the static properties of each FPGA. It is an array indexed by the TEM FPGA ID. FPGAs not present in fpgaList may be represented by a NULL pointer.
fpgaTtcs	An array of pointers to FPGA TTC programs. It is an array indexed by the TEM FPGA ID. FPGAs not present in fpgaList may be represented by a NULL pointer.
tem	The TEM database. To properly enter an FPGA, the parent TEM must have already been added to the TEM database.

Returns:: A bit mask of FPGAs which failed to be added. A value of 0 indicates all requested FPGAs were added.

Note that this routine only adds the FPGAs to the FPGA database. Do operations are performed on the FPGAs. For example, the actual loading is done with TEM_loadFpgas. The TEM that the FPGAs reside on must be at least to the state INCLUDED.

unsigned int TEM_fpgasAdrsGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	vmeAdrs[TEM_C_FPGA_CNT],
		volatile unsigned int *	lclAdrs[TEM_C_FPGA_CNT]
	)

Fills in arrays of the VME and LOCAL addresss of the specified FPGAs.

Parameters:

fpgas	The FPGAs database array.
fpgaList	The list of TEMs to get the addresses of.
vmeAdrs	Array to receive the VME addresses.
lclAdrs	Array to receive the LCL addresses.

Returns:: A bit mask indicating which FPGAs did not have addresses.

Only FPGAs which have been INCLUDED have addresses. Addresses which are requested but not present are filled with NULL.

unsigned int TEM_fpgasBistClear	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Clears the self test bit for the selected FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask, to clear.

Returns:: The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasBistSupported(), to get a list of the FPGAs which support a self-test and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasBistGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int *	bistList
	)

Returns the state of the Self Test for the specified fpgas.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
bistList	Returned as a bit mask of the state of the self test, one bit per FPGA.

Returns:: The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.

unsigned int TEM_fpgasBistSet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Sets the Self Test for the specified FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The list of FPGAs to set the self-test mode.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

unsigned int TEM_fpgasBistSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Returns which of the specified FPGAs support a self-test mode.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.

Returns:: Returned as a bit mask of which FPGAs support a self-test. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports a self test mode. It does not in any way indicate that the self-test mode can be set. For example, if the FPGA is not loaded, the self-test mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasBistWrite	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	bistList
	)

Writes the Self Test for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to write the self-test mode.
bistList	The value of the self-test bit to write, expressed as a bit mask, 1 bit per FPGA.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

unsigned int TEM_fpgasClear	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Clears the specified list of FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask to clear.

Returns:: A bit mask indicating which FPGAs failed to properly clear.

Does a clear of the specified FPGAs. For most FPGAs this consists of toggling the CLEAR LOGIC, CLEAR REGISTER, CLEAR L1T TIMER and CLEAR L1T COUNTER. The TKR FPGA does not have a CLEAR TIMER.

The return value is a bit mask indicating which FPGAs failed to properly clear. The corresponding status of each TEM_fpga structure must be examined for details of what went wrong.

unsigned int TEM_fpgasHfullClrClear	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Clears the FIFO Half Full Throttle Manual Clear for the selected FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask, to clear.

Returns:: The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support a this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullClrGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int *	hfullList
	)

Returns the state of the FIFO Half Full Throttle Manual Clear. for the specified fpgas.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
hfullList	Returned as a bit mask of the state of the FIFO Half Full Throttle Manual Clear,one bit per FPGA.

Returns:: The FPGAs for which the FIFO Half Full Throttle Manual Clear is set. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullClrSet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Sets the FIFO Half Full Throttle for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to set the FIFO Half Full Throttle Manual Clear

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullClrSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Returns which of the specified FPGAs support a FIFO Half Full Throttle Manual Clear mode.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.

Returns:: Returned as a bit mask of which FPGAs support a FIFO Half Full Throttle Clear mode. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports a FIFO Half Full Throttle Manual Clear mode. It does not in any way indicate that the FIFO Half Full Throttle mode can be set. For example, if the FPGA is not loaded, the mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasHfullClrWrite	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	hfullList
	)

Writes the Half Full Throttle Manual Clear mode for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to write the bits to.
hfullist	The value of the HFULL Clr bit to write, expressed as a bit mask, 1 bit per FPGA.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullClrSupported(), to get a list of the FPGAs which support this mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbClear	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Clears the FIFO Half Full Throttle for the selected FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask, to clear.

Returns:: The FPGAs for which the self-test mode could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support a this feature and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int *	hfullList
	)

Returns the state of the FIFO Half Full Throttle for the specified fpgas.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
hfullList	Returned as a bit mask of the state of the FIFO Half Full Throttle,one bit per FPGA.

Returns:: The FPGAs for which the FIFO Half Full Throttle mode could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support a FIFO Half Full Throttle and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbSet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Sets the FIFO Half Full Throttle for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to set the FIFO Half Full Throttle.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support a FIFO Half Full Throttle Enable and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasHfullEnbSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Returns which of the specified FPGAs support a FIFO Half Full Throttle mode.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.

Returns:: Returned as a bit mask of which FPGAs support a FIFO Half Full Throttle mode. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports a FIFO Half Full Throttle mode. It does not in any way indicate that the FIFO Half Full Throttle mode can be set. For example, if the FPGA is not loaded, the mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasHfullEnbWrite	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	hfullList
	)

Writes the Half Full Throttle mode for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to write the self-test mode.
hfullist	The value of the HFULL enable bit to write, expressed as a bit mask, 1 bit per FPGA.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasHfullEnbSupported(), to get a list of the FPGAs which support this mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasL1tCounterClear	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Does a L1T COUNTER CLEAR on the specified list of FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask to do the CLEAR L1T COUNTER to.

Returns:: A bit mask indicating which FPGAs failed to properly clear there L1T counters.

unsigned int TEM_fpgasL1tTimerClear	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Does a CLEAR L1T TIMER on the specified list of FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask to do the CLEAR L1T TIMER to.

Returns:: A bit mask indicating which FPGAs failed to properly clear there L1T timers.

unsigned int TEM_fpgasLoad	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Loads the specified list of FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask to load

Returns:: A bit mask indicating which FPGAs failed to properly load.

The FPGA code to load was set when the FPGA was added to the FPGA database. Note also that this is a time consuming activity, taking on the order on 1/2 second per FPGA.

unsigned int TEM_fpgasLogicClear	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Does a CLEAR LOGIC on the specified list of FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask to do the CLEAR LOGIC to.

Returns:: A bit mask indicating which FPGAs failed to properly clear.

unsigned int TEM_fpgasRdoBsyMinMaxClear	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Clears the Readout Min/MaxMode for the selected FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask, to clear.

Returns:: The FPGAs for which the Readout Busy Min/Max Mode could not be cleared. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a Readout Min/Max mode or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support the Readout Busy MIN/MAX mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoBsyMinMaxGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int *	rdoBsyMinMaxList
	)

Returns the state of the Readout Min/MaxMode for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
rdoList	Returned as a bit mask of the state of the readout Min/Max mode, one bit per FPGA.

Returns:: The FPGAs for which the Readout Min/Max mode could not be read. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a Readout Min/Max mode or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support a Min/Max mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoBsyMinMaxSet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Sets the Readout Busy Min/Max 1, for the specified FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The list of FPGAs to set the Readout Busy Min/Max mode.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a readout Min/Max or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support a readout Min/Max mode and TEM_fpgasLoaded to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoBsyMinMaxSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Returns a bit list indicating which FPGAs support the Readout Busy Min/Max mode.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.

Returns:: Returned as a bit mask of which FPGAs support the Readout Busy Min/Max mode. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports a Readout Busy Min/Max mode. It does not in any way indicate that the Readout Busy Min/Max mode can be set. For example, if the FPGA is not loaded, the Readout Busy Min/Max Mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasRdoBsyMinMaxWrite	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	rdoBsyMinMaxList
	)

Writes the Readout Busy Min/Max mode for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to write the Readout Busy Min/Max mode.
rdoBsyMinMaxList	The value of the Readout Busy Min/Max mode to write, expressed as a bit mask, 1 bit per FPGA.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support the Readout Busy Min/Max or it is incapable of returning it. One should call TEM_fpgasRdoBsyMinMaxSupported(), to get a list of the FPGAs which support an the Readout Busy Min/Max mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoModeClear	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Clears the Readout Mode for the selected FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask, to clear.

Returns:: The FPGAs for which the Readout Mode could not be cleared. This is proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support a Readout mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoModeSupported(), to get a list of the FPGAs which support an alternative readout mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoModeGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int *	rdoList
	)

Returns the state of the Readout Mode for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask, to get.
rdoList	Returned as a bit mask of the state of the readout mode, one bit per FPGA.

Returns:: The FPGAs for which the Readout Mode mode could not be read. This is proper subset of fpgaList.

unsigned int TEM_fpgasRdoModeSet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Sets the Readout Mode to 1, for the specified FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The list of FPGAs to set the readout mode.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support an alternate mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoModeSupported(), to get a list of the FPGAs which support an alternative readout mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoModeSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Returns a bit list indicating which FPGAs support an alternative Readout Mode.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs to check.

Returns:: Returned as a bit mask of which FPGAs support an alternative Readout mode. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports an alternate Readout Mode. It does not in any way indicate that the self-test mode can be set. For example, if the FPGA is not loaded, the alternative Readout Mode cannot be set. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasRdoModeWrite	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int	rdoList
	)

Writes the Readout Mode for the specified FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The list of FPGAs to write the Readout Mode.
rdoList	The value of the Readout Mode to write, expressed as a bit mask, 1 bit per FPGA.

Returns:: The set of target FPGAs, for which the operation failed. This is a proper subset of fpgaList.

A non-0 return value indicates either the FPGA does not support an alternative mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoModeSupported(), to get a list of the FPGAs which support an alternative Readout Mode and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoToGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList,
		unsigned int *	rdoToList
	)

Returns the state of the Readout Timeout status bit for the specified FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs
rdoList	Returned as a bit mask of the state of the Readout Timeout status bit, one bit per FPGA.

Returns:: The FPGAs for which the Readout Busy Bit could not be read.

A non-0 return value indicates either the FPGA does not support a Readout Busy Bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call TEM_fpgasRdoToSupported(), to get a list of the FPGAs which support a readout timeout status bit and TEM_fpgasLoaded() to get a list of the FPGAs which are loaded.

unsigned int TEM_fpgasRdoToSupported	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Returns a bit list indicating which FPGAs support the Readout Timeout status bit.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs to check.

Returns:: Returned as a bit mask of which FPGAs support the Readout Timeout status bit. This is a proper subset of fpgaList.

Note that this is purely a static test of whether the FPGA supports a Readout Timeout status bit. If the FPGA is not loaded, the Readout Timeout status bit cannot be read. One should query TEM_fpgasUnreadied () for a list of FPGAS which cannot be set.

unsigned int TEM_fpgasRegsClear	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Does a CLEAR REGS on the specified list of FPGAs.

Parameters:

fpgas	The FPGA database
fpgaList	The set of target FPGAs, expressed as a bit mask to do the CLEAR REGS to.

Returns:: A bit mask indicating which FPGAs failed to properly clear.

unsigned int TEM_fpgasTemsGet	(	const TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Returns a bit mask of the TEMs associated with the requested set of FPGASs.

Parameters:

fpgas	The FPGA database array.
fpgaList	Which FPGAs to check for TEMs, expressed as a bit mask.

Returns:: A bit mask of the associated TEMs.

This routine translate a list of FPGAs to the their parent list of TEMs. See TEM_temsFpgasGet() for the opposite direction of the translation.

unsigned int TEM_fpgasUnload	(	TEM_fpga *	fpgas,
		unsigned int	fpgaList
	)

Unloads the specified list of FPGAs.

Parameters:

fpgas	The FPGA database.
fpgaList	The set of target FPGAs, expressed as a bit mask to unload.

Returns:: A bit mask indicating which FPGAs failed to properly unload.

In reality, there is no real way to unload an FPGA. All this routine really does it to make the FPGA forget that it was loaded.

int TEM_temIntConnect	(	const TEM_tem *	tems,
		TEM_temId	temId,
		unsigned int	vector,
		TEM_temIntCbRtn	cb_rtn,
		TEM_temIntCbPrm	cb_prm
	)

Connects the interrupt vector on a individual TEM basis. The TEM must be at least in the PRESENT state.

Parameters:

tems	The TEM database.
temId	The target TEM.
vector	The interrupt vector, sans the base address.
cb_rtn	The interrupt callback routine.
cb_prm	The interrupt callback parameter.

Returns:: Status

unsigned int TEM_temIntsDisable	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	irpts
	)

Disables the specified list of interrupts on all specified TEMs.

Parameters:

tem	The TEM database.
temList	The list of TEMs to enable the interrupts on
irpts	The interrupts to enable. Note that this is not an array, but one for all TEMs.

Returns:: A bit mask indicating which TEMs failed to have their interrupts enabled.

Disables the specified list of interrupts. The TEMs must be at least in the PRESENT state. This is a weaker condition than demanding that they are READY. This condition is imposed when setting the MASTER ENABLE. So one can set the interrupt sources, on TEMs that are present, but one can not use them unless in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their interrupts disabled. The only known failure mode that the TEM is not at least in the PRESENT state.

unsigned int TEM_temIntsEnable	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	irpts
	)

Enables the specified list of interrupts on all specified TEMs.

Parameters:

tem	The TEM database.
temList	The list of TEMs to enable the interrupts on
irpts	The interrupts to enable. Note that this is not an array, but one for all TEMs.

Returns:: A bit mask indicating which TEMs failed to have their interrupts enabled.

Enables the specified list of interrupts. The TEMs must be at least in the PRESENT state. This is a weaker condition than demanding that they are READY. This condition is imposed when setting the MASTER ENABLE. So one can set the interrupt sources, on TEMs that are present, but one can not use them unless in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their interrupts enabled. The only known failure mode that the TEM is not at least in the PRESENT state.

unsigned int TEM_temIntsInit	(	const TEM_tem *	tems,
		unsigned int	temList,
		const unsigned int *	levels,
		const unsigned int *	bases
	)

Initializes the TEM interrupt registers.

Parameters:

tem	The TEM database TEMs.
temList	The list of TEMs to setup.
levels	The array of VME levels. Must be in the range 1-7.
bases	The array of VME bases. These must be unique and must be selected from the set 0x60, 0x80, 0xC0, 0xA0.

Returns:: A bit mask of those TEMs which could not be properly initialized.

Sets the VME interrupt level and the vector base offset for each of the specified TEMs. Since this requires VME operations to the TEM, the TEM must be at least PRESENT in the system.

The return value is a bit mask indicating those TEMs which were requested to be initialized but which failed. Common errors are

       a. TEM   is not PRESENT
       b. LEVEL is out of range or duplicated.
       c. BASE  is out of range or duplicated.

Warning:: PROGRAMMERS NOTE: One should also check whether there are any TEMs which are present on the bus but which also have the same base vector and/or same VME level. Unfortunately this is almost impossible to do correctly since technically, unless the software is told, it cannot discover either which modules are on the bus (there is no BUS map facility) or what the interrupt structure of the encountered modules is (there is no MODULE ID).

One could kludge this by claiming the only VME modules of interest are the TEMs and the interrupt structure is the same and we know what the addresses are. This is all a house-of-cards. I think I'd rather have no protection than halfway measure.

unsigned int TEM_temIntsIscsGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		const struct _TEM_temInt *	isc[]
	)

Returns a pointer to an array of TEM interrupt structures.

Parameters:

tems	The TEM database.
temList	The list of TEMs.
isc	An array, indexed by TEM ID, which will be filled with pointers to the TEM interrupt control structure.

Returns:: A mask of those TEMs for which an address was requested, but could not provided.

Returns a pointer to an array of TEM interrupt structures. This breaks the modularity, but the gain in efficiency dictates this strategy.

This operation requires no VME operations and, so, does not depend on the module actually existing. It only depends on the TEM being included in the system.

The return value is a mask of those TEMs for which an address was requested, but was not provided. These are usually TEMs which are not at least in the INCLUDED state.)

unsigned int TEM_temIntsMasterDisable	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Disables the master interrupt on the specified list of TEMs.

Parameters:

tem	The TEM database.
temList	The list of TEMs to enable the master interrupt on.

Returns:: A bit mask indicating which TEMs of the requested set failed to have their master interrupts disabled.

Disables the master interrupt on the specified list of tems. The TEMs must be in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts disabled. The only known failure mode that the TEM is not at least in the READY state.

unsigned int TEM_temIntsMasterEnable	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Enables the master interrupt on the specified list of TEMs.

Parameters:

tem	The TEM database.
temList	The list of TEMs to enable the master interrupt on.

Returns:: A bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled.

Enables the master interrupt on the specified list of tems. The TEMs must be in the READY state.

The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled. The only known failure mode that the TEM is not at least in the READY state.

unsigned int TEM_temIntsMasterReset	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Resets the master interrupt on the specified list of TEMs.

Parameters:

tem	The TEM database.
temList	The list of TEMs to reset the master interrupt on.

Returns:: A bit mask indicating which TEMs of the requested set failed to have their master interrupts reset.

Resets the master interrupt on the specified list of tems. The TEMs must be in the READY state. This operation is typically used at initialization time or when in an error state to clear all pending interrupts.

The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled. The only known failure mode that the TEM is not at least in the READY state.

int TEM_temIntsMinEventsGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	nevts
	)

Returns the minimum number of events pending from the specified list of TEMs.

Parameters:

tem	The TEM database.
temList	The list of TEMs to check
nevts	Returned as the number of events in each TEM. Maybe specified as NULL.

Returns:: The minimum number of pending events.

Returns the minimum number of events pending from the specified list of TEMS. It is assumed that the list of tems has been properly trimmed to reflect those TEMs which are present and ready to go. Reading TEMs which are not PRESENT should return a -1, leaving the EVTS to be the maximum, thus not affecting the result. Given this and the small efficiency hit to do the check, it was decided not to make it.

Technically this is not a TEM interrupt routine, but, since it is almost exclusively used in that context, it was included with them.

unsigned int TEM_temIntsThresholdSet	(	const TEM_tem *	tems,
		unsigned int	temList,
		const unsigned int *	thresholds
	)

Sets the event threshold on the specified list of TEMs.

Parameters:

tems	The TEM database
temList	The list of TEMs to set the event threshold on.
thresholds	The array of thresholds, indexed by TEM id.

Returns:: The list of TEMs requested to be, but not set.

Sets the event threshold for the specified set of TEMS. In most cases it makes no sense to set the thresholds at different values. This interface is provided more in the sense of uniformity, than for than the increase functionality one gets with an array of thresholds.

The return value is a list of TEMs requested but not set. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system.

unsigned int TEM_temIntsVmeDisable	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Disables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled.

Parameters:

tems	The TEM database
temList	The list of TEMs to disable the master interrupt on.

Returns:: The list of TEMs requested to be, but not disabled.

The return value is the list of TEMs requested but not disabled. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system. The only other possibility is that the interrupt DISABLE routine fails. This is highly unlikely since the only failure mode listed in the documentation is if one requested interrupt level is out of range. This is very hard to do, since the level is always read from the hardware (it is not cached) and only 3 bits are valid, automatically limiting the return value to the legitimate level.

unsigned int TEM_temIntsVmeEnable	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Enables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled.

Parameters:

tems	The TEM database
temList	The list of TEMs to enable the master interrupt on.

Returns:: The list of TEMs requested to be, but not enabled.

The return value is the list of TEMs requested but not enabled. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system. The only other possibility is that the interrupt ENABLE routine fails. This is highly unlikely since the only failure mode listed in the documentation is if one requested interrupt level is out of range. This is very hard to do, since the level is always read from the hardware (it is not cached) and only 3 bits are valid, auto-matically limiting the return value to the legitimate level.

unsigned int TEM_temsAdd	(	TEM_tem *	tem,
		unsigned int	temList,
		const unsigned int	vmeAdrs[TEM_C_CNT],
		const struct _TEM_temDsc *const	temDscs[TEM_C_CNT]
	)

Completes a high level description of each active TEM.

Parameters:

tem	Pointer to the high level description of the TEM to be completed. Only active TEMs are entered, so the TEM ID must be contained within this structure.
temList	A bit mask representing the list of TEMs to be added.
vmeAdrs	An array of the VME base addresses of the TEMs. These must be in the canonical order, ie ACD, TKR, CAL, LTC, L1T.
temDscs	An array of pointers to the TEM descriptors. These descriptors give the static properties of a TEM such as the offsets of key registers and bits.

Returns:: A bit mask of exclude TEMs.

Completes a high level description of each active TEM. This describes only the TEM section. The FPGA section is described by another routine.

The return value is a bit mask of the excluded TEMs. These are TEMs which where requested to be in the system, but where rejected because they could not be included. At this point only a configuration inconsistency would led to a rejection.

A value of 0 indicates that all TEMs requested have been added to the system.

unsigned int TEM_temsAdrsGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	vmeAdrs[TEM_C_CNT],
		volatile unsigned int *	lclAdrs[TEM_C_CNT]
	)

Fills in arrays of the VME and LOCAL addresss of the specified TEMs.

Parameters:

tems	The TEM database array.
temList	The list of TEMs to get the addresses of.
vmeAdrs	Array to receive the VME addresses.
lclAdrs	Array to receive the LCL addresses.

Returns:: A bit mask indicating which TEMs did not have addresses.

Only TEMs which have been INCLUDED have addresses. Addresses which are requested but not present are filled with NULL.

unsigned int TEM_temsDetsReset	(	TEM_tem *	tem,
		unsigned int	temList
	)

Issues a reset to the detector specific registers on the specified TEMs.

Parameters:

tem	The TEM database array.
temList:	The list of TEMs to issue a RESET TEM DETECTORS.

Returns:: A bit mask indicating which TEMs detector registers failed to properly reset.

Issues a resets to the detector specific registers on the specified TEMs. This usually corresponds to toggling bit 2 of the board control registers. Not all TEMs have this capability.

The return value is bit mask indicating which TEMs detector registers failed to properly reset. The corresponding status of each TEM_tem structure must be examined for details of what went wrong.

unsigned int TEM_temsFifosReset	(	TEM_tem *	tem,
		unsigned int	temList
	)

Issues a reset to the all FIFOs on the specified TEMs.

Parameters:

tem	The TEM database array.
temList:	The list of TEMs to issue a RESET FIFO.

Returns:: A bit mask indicating which TEMs FIFOs failed to properly reset.

Issues a resets to all FIFOs on the specified TEMs.

The return value is bit mask indicating which TEMs had FIFOs which failed to properly reset. The corresponding status of each TEM_tem structure must be examined for details of what went wrong.

Practically speaking, the board FIFOs must come to their empty state. If not, they are in error.

unsigned int TEM_temsFpgasGet	(	const TEM_tem *	tem,
		unsigned int	temList
	)

Returns a bit mask of the FPGAs associated with the requested set of TEMs.

Parameters:

tem	The TEM database array.
temList	Which TEMs to check for FPGAs, expressed as a bit mask.

Returns:: A bit mask of the associated FPGAs.

This routine translate a list of TEMs to the their a list of FPGAs. See TEM_fpgasTemsGet() for the opposite direction of the translation.

unsigned int TEM_temsFpgasReset	(	TEM_tem *	tem,
		unsigned int	temList
	)

Issues a reset to the all FPGAs on the specified TEMs.

Parameters:

tem	The TEM database array.
temList:	The list of TEMs to issue a RESET FPGA.

Returns:: A bit mask indicating which TEMs had FPGAs whic failed to properly reset.

The return value is a bit mask indicating which TEMs had FPGAs which failed to properly reset. The corresponding status of each TEM_tem structure must be examined for details of what went wrong.

unsigned int TEM_temsPreset	(	TEM_tem *	tem,
		unsigned	temList
	)

Puts the TEM control registers in a known state so the TEM's FPGAs can be loaded.

Parameters:

tem	The TEM database array.
temList:	The list of TEMs to issue a RESET FPGA.

Returns:: A bit mask of which TEMs failed to ready themselves. A value of 0 indicates all TEMs are ready.

This puts the TEM control registers in a know state so that the TEM's FPGAs can be loaded. Currently this consists of doing a READY, but if this proves insufficient...

unsigned int TEM_temsProbe	(	TEM_tem *	tem,
		unsigned int	temList
	)

Probes the VME bus for the present of the specified list of.

Parameters:

tem	The TEM database array.
temList	The list of TEMs to be probed.

Returns:: The list of TEMs in the requested set, but not present on the bus.

Probes the VME bus for the present of the specified list of TEM modules. If the module is present, the state of the TEM is set to present. The TEM must be in the INCLUDED state.

Warning:: Note that the return value is the set of TEMs not on the bus. This return value may seem strange, but is in keeping with the TEM routines returning a non-zero value only when something goes wrong. Here wrong is defined as looking for a non-existent TEM.

unsigned int TEM_temsReady	(	TEM_tem *	tem,
		unsigned	temList
	)

Toggles the RESET FPGA and RESET FIFOs bit in the control register.

Parameters:

tem	The TEM database array.
temList	The list of TEMs to be readied.

Returns:: A bit mask of which TEMs failed to ready themselves. A value of 0 indicates all TEMs are ready.

Toggles the RESET FPGA and RESET FIFOs bit in the control register. This must be done after the FPGAs are loaded. This allows the FPGA registers to be seen by the external world.

unsigned int TEM_temsReset	(	TEM_tem *	tem,
		unsigned int	temList
	)

Resets all FPGAs, FIFOs and DETs on the specified TEMs.

Parameters:

tem	The TEM database array.
temList	The list of TEMs to be readied.

Returns:: A bit mask of which TEMs failed to reset themselves. A value of 0 indicates all TEMs are ready.

unsigned int TEM_temsScopeBitClear	(	TEM_tem *	tem,
		unsigned int	temList
	)

Clears the scope bit on the specified TEMs.

Parameters:

tem	The TEM database array.
temList	The list of TEMs to have clear the scope bit on.

Returns:: A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.

Not all TEMs have a scope bit. It is not considered a failure to attempt to toggle a non-existent scope bit. So, practically speaking, there is no way (except for a corruption error) for this routine to fail. The interface is keep this way for consistency with the other TEM routines.

unsigned int TEM_temsScopeBitSet	(	TEM_tem *	tem,
		unsigned int	temList
	)

Sets the scope bit on the specified TEMs.

Parameters:

tem	The TEM database array.
temList	The list of TEMs to have set the scope bit on.

Returns:: A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.

unsigned int TEM_temsScopeBitToggle	(	TEM_tem *	tem,
		unsigned int	temList
	)

Toggles the scope bit on the specified TEMs.

Parameters:

tem	The TEM database array.
temList	The list of TEMs to have toggle the scope bit on.

Returns:: A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.

unsigned int TEM_temsUnreadied	(	const TEM_tem *	tem,
		unsigned int	temList
	)

Simply query routine to learn which TEMs are not ready.

Parameters:

tem	The TEM database array.
temList	The list of TEMs to query.

Returns:: A bit mask of which TEMs are not ready.

unsigned int TEM_temTrgsCpuBsyClr	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Clears the CPU BSY bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to clear.

Returns:: The TEMs for which the CPU BSY bit could not be cleared. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsCpuBsySupported(), to get a list of the TEMs which support a CPU BSY and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsCpuBsyGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	cpuBsy
	)

Gets the state of the CPU BSY bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
cpuBsy	Returned as the state of the CPU BSY bits.

Returns:: The TEMs for which the CPU BSY bit could not be read. This is proper subset of temList.

unsigned int TEM_temTrgsCpuBsySet	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Sets the CPU BSY bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to sets.

Returns:: The TEMs for which the CPU BSY bit could not be set. This is proper subset of temList.

unsigned int TEM_temTrgsCpuBsySupported	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Returns a bit mask of TEMs which support the CPU BSY bit.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to check.

Returns:: The TEMs for which support the CPU BSY bit. This is proper subset of temList.

Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM_temsUnreadied () for a list of TEMs which cannot be set.

unsigned int TEM_temTrgsCpuBsyWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	cpuBsys
	)

Writes the CPU BSY bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to write.
cpuBsys	The value to the CPU BSY bits, expressed as a bit mask.

Returns:: The TEMs for which the CPU BSY bit could not be written. This is proper subset of temList.

unsigned int TEM_temTrgsExtTreqEnbClr	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Clears the EXT TREQ ENB bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to clear.

Returns:: The TEMs for which the EXT TREQ ENB bit could not be cleared. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a EXT TREQ ENB bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsExtTreqBitSupported(), to get a list of the TEMs which support a EXT TREQ ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsExtTreqEnbGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	extTreq
	)

Gets the state of the EXT TREQ ENB bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
cpuBsy	Returned as the state of the EXT TREQ ENB bits.

Returns:: The TEMs for which the EXT TREQ ENB bit could not be read. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a EXT TREQ ENB bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsExtTreqEnbSupported(), to get a list of the TEMs which support EXT TREQ ENB, and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsExtTreqEnbSet	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Sets the EXT TREQ ENB bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to sets.

Returns:: The TEMs for which the EXT TREQ ENB bit could not be set. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a EXT TREQ ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsExtTreqEnbSupported(), to get a list of the TEMs which support a EXT TREQ ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsExtTreqEnbSupported	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Returns a bit mask of TEMs which support the EXT TREQ ENB bit.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to check.

Returns:: The TEMs for which support the EXT TREQ ENB bit. This is proper subset of temList.

unsigned int TEM_temTrgsExtTreqEnbWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	extTreq
	)

Writes the EXT TREQ ENB bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to write.
cpuBsys	The value to the EXT TREQ ENB bits, expressed as a bit mask.

Returns:: The TEMs for which the EXT TREQ ENB bit could not be written. This is proper subset of temList.

unsigned int TEM_temTrgsGblL1tArmClr	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Clears the Global L1t Arm bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to clear.

Returns:: The TEMs for which the GBL L1T ARM bit could not be cleared. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1TArmSupported(), to get a list of the TEMs which support GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tArmGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	gblL1tArm
	)

Gets the state of the Global L1t Arm bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
cpuBsy	Returned as the state of the GBL L1T ARM bits.

Returns:: The TEMs for which the GBL L1T ARM bit could not be read. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tArmSupported(), to get a list of the TEMs which support GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tArmSet	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Sets the Global L1t Enable bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to sets.

Returns:: The TEMs for which the GBL L1T Arm bit could not be set. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tArmSupported(), to get a list of the TEMs which support a GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tArmSupported	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Returns a bit mask of TEMs which support a Global L1t Arm.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to check.

Returns:: The TEMs for which support the GBL L1T ARM bit. This is proper subset of temList.

unsigned int TEM_temTrgsGblL1tArmWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	gblL1tArm
	)

Writes the Global L1t Enable bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to write.
cpuBsys	The value to the GBL L1T ARM bits, expressed as a bit mask.

Returns:: The TEMs for which the GBL L1T bit could not be written. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ARM mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tArmSupported(), to get a list of the TEMs which support a GBL L1T ARM and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbClr	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Clears the Global L1t Enable bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to clear.

Returns:: The TEMs for which the GBL L1T ENB bit could not be cleared. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1TEnbSupported(), to get a list of the TEMs which support GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	gblL1tEnb
	)

Gets the state of the Global L1t Enable bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
gblL1tEnb	Returned as the state of the GBL L1T ENB bits.

Returns:: The TEMs for which the GBL L1T ENB bit could not be read. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ENB or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tEnbSupported(), to get a list of the TEMs which support GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbSet	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Sets the Global L1t Enable bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to sets.

Returns:: The TEMs for which the GBL L1T ENB bit could not be set. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ENB or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tEnbSupported(), to get a list of the TEMs which support a GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsGblL1tEnbSupported	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Returns a bit mask of TEMs which support a Global L1t Enable.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to check.

Returns:: The TEMs for which support the GBL L1T ENB bit. This is proper subset of temList.

unsigned int TEM_temTrgsGblL1tEnbWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	gblL1tEnb
	)

Writes the Global L1t Enable bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to write.
gblL1tEnb	The value to the GBL L1T ENB bits, expressed as a bit mask.

Returns:: The TEMs for which the GBL L1T bit could not be written. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a GBL L1T ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsGblL1tEnbSupported(), to get a list of the TEMs which support a GBL L1T ENB and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tEnbClr	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Clears the L1T ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to clear.

Returns:: The TEMs for which the L1T ENABLE bit could not be cleared. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tEnbSupported(), to get a list of the TEMs which support a L1T ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tEnbGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	l1tEnb
	)

Gets the state of the L1T ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
enbL1t	Returned as the state of the L1T ENABLE bits.

Returns:: The TEMs for which the L1T ENABLE bit could not be read. This is proper subset of temList.

unsigned int TEM_temTrgsL1tEnbSet	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Sets the L1T ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to sets.

Returns:: The TEMs for which the L1T ENABLE bit could not be set. This is proper subset of temList.

unsigned int TEM_temTrgsL1tEnbSupported	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Returns a bit mask of TEMs which support the L1T ENABLE bit.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to check.

Returns:: The TEMs for which support the L1T ENABLE bit. This is proper subset of temList.

unsigned int TEM_temTrgsL1tEnbWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	l1tEnbs
	)

Writes the L1T ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to write.
l1tEnbs	The value of the L1T ENABLE bits, expressed as a bit mask.

Returns:: The TEMs for which the L1T ENABLE bit could not be written. This is proper subset of temList.

unsigned int TEM_temTrgsL1tInGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	l1tIn
	)

Gets the state of the L1T IN mask for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
enbL1t	Returned as the state of the L1T TMR bits. The mask is densely packed, 3 bit per TEM, by TEM.

Returns:: The TEMs for which the L1T IN mask could not be read. This is proper subset of temList.

A non-0 return value indicates either the TEM is incapable of having the L1T IN mask read. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tInWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	l1tIn
	)

Writes the L1T IN mask for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask to write.
l1tIn	The value of the L1T IN mask , expressed as a bit mask. 3 bits/per TEM. This limits the number of TEMs that can be supported to 10.

Returns:: The TEMs for which the TREQ ENABLE bit could not be written. This is proper subset of temList.

A non-0 return value indicates either the TEM is incapable of having the L1T IN mask written to it. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tOutGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	l1tOut
	)

Gets the state of the L1T OUT mask for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
l1tOut	Returned as the state of the L1T OUT bits. The mask is densely packed, 3 bit per TEM, by TEM.

Returns:: The TEMs for which the L1T OUT mask could not be read. This is proper subset of temList.

A non-0 return value indicates either the TEM is incapable of having the L1T OUT mask read. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tOutWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	l1tOut
	)

Writes the L1T OUT mask for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask to write.
l1tOut	The value of the L1T OUT mask , expressed as a bit mask. 3 bits/per TEM. This limits the number of TEMs that can be supported to 10.

Returns:: The TEMs for which the TREQ OUT mask could not be written. This is proper subset of temList.

A non-0 return value indicates either the TEM is incapable of having the L1T OUT mask written to it. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call TEM_temsUnreadied() to determine this.

unsigned int TEM_temTrgsL1tTmrClr	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Clears the L1T TMR bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to clear.

Returns:: The TEMs for which the L1T TMR bit could not be cleared. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsL1tTmrSupported(), to get a list of the TEMs which support a L1T TMR and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsL1tTmrGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	l1tTmr
	)

Gets the state of the L1T TMR bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
enbL1t	Returned as the state of the L1T TMR bits.

Returns:: The TEMs for which the L1T TMR bit could not be read. This is proper subset of temList.

unsigned int TEM_temTrgsL1tTmrSet	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Sets the L1T TMR bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to sets.

Returns:: The TEMs for which the L1T TMR bit could not be set. This is proper subset of temList.

unsigned int TEM_temTrgsL1tTmrSupported	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Returns a bit mask of TEMs which support the L1T TMR bit.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to check.

Returns:: The TEMs for which support the L1T TMR bit. This is proper subset of temList.

unsigned int TEM_temTrgsL1tTmrWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	l1tTmrs
	)

Writes the L1T TMR bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to write.
l1tEnbs	The value of the L1T TMR bits, expressed as a bit mask.

Returns:: The TEMs for which the L1T TMR bit could not be written. This is proper subset of temList.

unsigned int TEM_temTrgsTcssGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		const struct _TEM_temTrg *	trg[]
	)

Returns a pointer to an array of TEM trigger structures.

Parameters:

tems	The TEM database.
temList	The list of TEMs.
isc	An array, indexed by TEM ID, which will be filled with pointers to the TEM trigger control structure.

Returns:: A mask of those TEMs for which an address was requested, but could not provided.

Returns a pointer to an array of TEM trigger control structures. This breaks the modularity, but the gain in efficiency dictates this strategy.

This operation requires no VME operations and, so, does not depend on the module actually existing. It only depends on the TEM being included in the system.

The return value is a mask of those TEMs for which an address was requested, but was not provided. These are usually TEMs which are not at least in the INCLUDED state.)

unsigned int TEM_temTrgsTreqEnbClr	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Clears the TREQ ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to clear.

Returns:: The TEMs for which the TREQ ENABLE bit could not be cleared. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsTreqEnbSupported(), to get a list of the TEMs which support a TREQ ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsTreqEnbGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int *	treqEnb
	)

Gets the state of the TREQ ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to get.
treqEnb	Returned as the state of the TREQ ENABLE bits.

Returns:: The TEMs for which the TREQ ENABLE bit could not be read. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM_temTrgsTreqEnbSupported(), to get a list of the TEMs which support a REQ ENABLE and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int TEM_temTrgsTreqEnbSet	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Sets the TREQ ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to sets.

Returns:: The TEMs for which the TREQ ENABLE bit could not be set. This is proper subset of temList.

unsigned int TEM_temTrgsTreqEnbSupported	(	const TEM_tem *	tems,
		unsigned int	temList
	)

Returns a bit mask of TEMs which support the TREQ ENABLE bit.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to check.

Returns:: The TEMs for which support the TREQ ENABLE bit. This is proper subset of temList.

unsigned int TEM_temTrgsTreqEnbWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	treqEnb
	)

Writes the TREQ ENABLE bit for the selected TEMs.

Parameters:

tems	The TEM database.
temList	The set of target TEMs, expressed as a bit mask, to write.
treqEnb	The value of the TREQ ENABLE bits, expressed as a bit mask.

Returns:: The TEMs for which the TREQ ENABLE bit could not be written. This is proper subset of temList.

unsigned int temTrgsCtlGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which,
		unsigned int *	retList
	)	`[static]`

Returns the state of the specified bit.

Parameters:

tems	The TEM database
temList	The set of target TEMs, expressed as a bit mask, to get.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgCtlDsc structure.
retList	Returned as a bit mask of the state of the specified bit. one bit per TEM.

Returns:: The TEMs for which the bit could not be read. This is proper subset of temList.

A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call temsCtlSupported(), to get a list of the TEMs which support the bit and TEM_temsUnreadied() to get a list of the TEMs which are not active.

unsigned int temTrgsCtlSupported	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which
	)	`[static]`

Returns a bit list indicating whether the TEMs support the specified bit.

Parameters:

tems	The TEM database
temList	The set of target TEM s to check.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgCtlRegDsc structure.

Returns:: Returned as a bit mask of which TEMs support the specified bit. This is a proper subset of temList.

unsigned int temTrgsCtlWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which,
		unsigned int	list
	)	`[static]`

Writes the bit for the specified TEMs.

Parameters:

tems	The TEM database.
temList	The list of TEMs to write the bit.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgCtlRegDsc structure.
list	The value of the bit to write, expressed as a bit mask, 1 bit per TEM.

Returns:: The set of target TEMs, for which the operation failed. This is a proper subset of temList.

A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call temsCtlSupported(), to get a list of the TEMs which support the bit and TEM_temUnreadied (), to get a list of the TEMs which are not ready.

unsigned int temTrgsMskGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which,
		unsigned int	width,
		unsigned int	lmsk,
		unsigned int *	retList
	)	`[static]`

Returns the state of the specified msk.

Parameters:

tems	The TEM database
temList	The set of target TEMs, expressed as a bit mask, to get.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgCtlDsc structure.
width	The width of the bit field to extract.
lmsk	The valid bits in the bit field.
list	Returned as a bit mask of the state of the specified mask, densely packed, width bits per TEM.

Returns:: The TEMs for which the mask could not be read. This is proper subset of temList.

unsigned int temTrgsMskSupported	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which
	)	`[static]`

Returns a bit list indicating whether the TEMs support the specified bit.

Parameters:

tems	The TEM database
temList	The set of target TEM s to check.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgMskRegDsc structure.

Returns:: Returned as a bit mask of which TEMs support the specified bit. This is a proper subset of temList.

unsigned int temTrgsMskWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which,
		unsigned int	width,
		unsigned int	lmsk,
		unsigned int	list
	)	`[static]`

Writes the bit for the specified TEMs.

Parameters:

tems	The TEM database.
temList	The list of TEMs to write the bit.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgCtlRegDsc structure.
width	The width of the bit field to write.
lmsk	The valid bits in the bit field.
list	The value of the bit to write, expressed as a bit mask, 1 bit per TEM.

Returns:: The set of target TEMs, for which the operation failed. This is a proper subset of temList.

A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call temsCtlSupported(), to get a list of the TEMs which support the bit and TEM_temUnreadied (), to get a list of the TEMs which are not ready.

unsigned int temTrgsTstGet	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which,
		unsigned int	width,
		unsigned int	lmsk,
		unsigned int *	retList
	)	`[static]`

Returns the state of the specified msk.

Parameters:

tems	The TEM database
temList	The set of target TEMs, expressed as a bit mask, to get.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgTstDsc structure.
width	The width of the bit field to extract.
lmsk	The valid bits in the bit field.
list	Returned as a bit mask of the state of the specified mask, densely packed, width bits per TEM.

Returns:: The TEMs for which the mask could not be read. This is proper subset of temList.

unsigned int temTrgsTstSupported	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which
	)	`[static]`

Returns a bit list indicating whether the TEMs support the specified bit.

Parameters:

tems	The TEM database
temList	The set of target TEM s to check.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgTstRegDsc structure.

Returns:: Returned as a bit mask of which TEMs support the specified bit. This is a proper subset of temList.

unsigned int temTrgsTstWrite	(	const TEM_tem *	tems,
		unsigned int	temList,
		unsigned int	which,
		unsigned int	width,
		unsigned int	lmsk,
		unsigned int	list
	)	`[static]`

Writes the bit for the specified TEMs.

Parameters:

tems	The TEM database.
temList	The list of TEMs to write the bit.
which	Which bit to get. This is expressed as an offset from the beginning of the TEM_temTrgTstRegDsc structure.
width	The width of the bit field to write.
lmsk	The valid bits in the bit field.
list	The value of the bit to write, expressed as a bit mask, 1 bit per TEM.

Returns:: The set of target TEMs, for which the operation failed. This is a proper subset of temList.

A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call temsCtlSupported(), to get a list of the TEMs which support the bit and TEM_temUnreadied (), to get a list of the TEMs which are not ready.

unsigned int toggleAndCheck	(	TEM_tem *	tem,
		unsigned int	temList,
		unsigned int	capabilities,
		TEM_temActionId	which,
		ToggleAndCheckOpts	opts,
		TEM_temState	newState
	)	`[static]`

Sets, clears, toggles or checks some bits in the TEM registers.

Parameters:

tem	The TEM database.
temList	Which TEMs to perform the operation on, expressed as a bit mask.
capabilities	List of capabilities necessary to perform this test, expressed as a bit mask.
which	An index to the target action.
opts	An options mask, one of either the specific function to be performed. Examples are OPT_M_TOGGLE, OPT_M_CHECK or OPT_M_TOGGLE_AND_CHECK.
newState	Record this as the new TEM state. This will be done iff this state is not TEM_C_TEM_STATE_IGNORE.

Returns:: A bit mask indicating which TEMs failed to respond properly.

This is the generic workhorse routine used to set, clear, toggle or check some bits (or an combination thereof). A typical usage would be to toggles some bits, then check to see if the toggling accomplished its goal. Typically this is to implement a reset function.

TEM.c File Reference

Defines

Typedefs

Enumerations

Functions

Detailed Description

Define Documentation

Typedef Documentation

Enumeration Type Documentation

Function Documentation