TEM Registers

Table 2: Details for TEM registers. ``Group'' is the hardware component on which the register is located. ``Multiplicity'' means the number of associated registers with similar names and functionality. ``Subsections'' are the number of independent data on the register. If ``Type'' is ``int'' then the register should just be read as a number, if ``type'' is ``fields'' then the register should be broken into component fields, and if ``type'' is ``mask'' the register is a bit mask where each bit enables or disables a channel or group of channel.

Group	Register Name	Multiplicity	Subsections	Type	Width (bits)	Precinct
TEM: Tower Electronics Module. 16 Instances.
TEM	data_masks	1	1	mask	16	GNL_Mode
TEM	cal_trgseq	1	1	mask	16	GNL_Timing
TEM	tkr_trgseq	1	1	mask	16	GNL_Timing
TIC: Trigger Interface Controller. 16 Instances.
TIC	tkr_out_mask	1	1	mask	64	GNL_Mode
TIC	tkr_layer_enable	1	1	mask	64	GNL_Mode
TIC	cal_in_mask	1	1	mask	64	GNL_Mode