"Contents of the CRU command enable register" (APP/LHK)

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Focus:	Maintenance / Operation
Structures:	Abstract / Concrete

Definition:

Alignment:	4-byte boundary
APID:	596/0x254
Attribute(s):
C type:	unsigned int
Length:	32 bits (4 bytes)

Description:

Contents of the CRU command enable register

Layout: (hide detail; help)

Start	Stop	Size		Item Type and Name
0	0	1		status status
1	1	1		Padui1 spare0
2	2	1		enable epu2
3	3	1		enable epu1
4	4	1		enable epu0
5	5	1		enable siu1
6	6	1		enable siu0
7	7	1		enable siuE
8	10	3		Padui3 spare1
11	11	1		enable pdu1
12	12	1		enable pdu0
13	13	1		enable ebm
14	14	1		enable aem
15	15	1		enable gem
16	16	1		enable temf
17	17	1		enable teme
18	18	1		enable temd
19	19	1		enable temc
20	20	1		enable temb
21	21	1		enable tema
22	22	1		enable tem9
23	23	1		enable tem8
24	24	1		enable tem7
25	25	1		enable tem6
26	26	1		enable tem5
27	27	1		enable tem4
28	28	1		enable tem3
29	29	1		enable tem2
30	30	1		enable tem1
31	31	1		enable tem0

CRUcommand (bf)
|  status status (0)
|  Padui1 spare0 (1)
|  enable epu2 (2) ... siuE (7)
|  Padui3 spare1 (8-10)
|  enable pdu1 (11) ... tem0 (31)

typedef struct _LHK_CRUcommand_Bfl {

    #if ENDIANNESS_IS_BIG

    /* Readout status (ADC or switch) */
    unsigned int         status:1;

    /* Explicit 1 bit pad in unsigned int */
    unsigned int         spare0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         epu2:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         epu1:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         epu0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         siu1:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         siu0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         siuE:1;

    /* Explicit 3 bit pad in unsigned int */
    unsigned int         spare1:3;

    /* An enable bit (disabled/enabled) */
    unsigned int         pdu1:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         pdu0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         ebm:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         aem:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         gem:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temf:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         teme:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temd:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temc:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temb:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tema:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem9:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem8:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem7:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem6:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem5:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem4:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem3:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem2:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem1:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem0:1;

    #elif ENDIANNESS_IS_LITTLE

    /* An enable bit (disabled/enabled) */
    unsigned int         tem0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem1:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem2:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem3:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem4:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem5:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem6:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem7:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem8:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tem9:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         tema:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temb:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temc:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temd:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         teme:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         temf:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         gem:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         aem:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         ebm:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         pdu0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         pdu1:1;

    /* Explicit 3 bit pad in unsigned int */
    unsigned int         spare1:3;

    /* An enable bit (disabled/enabled) */
    unsigned int         siuE:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         siu0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         siu1:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         epu0:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         epu1:1;

    /* An enable bit (disabled/enabled) */
    unsigned int         epu2:1;

    /* Explicit 1 bit pad in unsigned int */
    unsigned int         spare0:1;

    /* Readout status (ADC or switch) */
    unsigned int         status:1;

    #else

    #error _FILE_ ENDIANNESS NOT DEFINED

    #endif

} __attribute__((packed)) LHK_CRUcommand_Bfl;

typedef union _LHK_CRUcommand {

    /* underlying unsigned int */
    unsigned int                    ui;

    /* struct mapped bitfield */
    struct _LHK_CRUcommand_Bfl      bf;

} LHK_CRUcommand;

Fields:

enable (index)

Attribute(s):  

Brief:  "An enable bit (disabled/enabled)"

Instance(s):  tem0

An enable bit (disabled/enabled)

enable (index)

Attribute(s):  LHKENABLESTATES

Brief:  "An enable bit (disabled/enabled)"

Instance(s):  aem, ebm, epu0, epu1, epu2, gem, pdu0, pdu1, siu0, siu1, siuE, tem1, tem2, tem3, tem4, tem5, tem6, tem7, tem8, tem9, tema, temb, temc, temd, teme, temf

An enable bit (disabled/enabled)

Padui1 (index)

Attribute(s):  

Brief:  "Explicit 1 bit pad in unsigned int"

Instance(s):  spare0

Explicit 1 bit pad in unsigned int

Padui3 (index)

Attribute(s):  LHKENABLESTATES

Brief:  "Explicit 3 bit pad in unsigned int"

Instance(s):  spare1

Explicit 3 bit pad in unsigned int

status (index)

Attribute(s):  LHKSETTLESTATES

Brief:  "Readout status (ADC or switch)"

Instance(s):  status

Readout status. If set, read out failed for the designated ADC/switch.

Same as:

CRUresponse

Used by:

PigStatus