GLAST/LAT > DAQ and FSW > FSW > Doxygen Index > TPG / V3-1-1
Constituent: gtb Tag: mv2304
#include <GTB.h>
Data Fields | |
| unsigned int | startAcq:1 |
| unsigned int | startAcqSrc:1 |
| unsigned int | chn0clk:1 |
| unsigned int | dataChn:4 |
| unsigned int | mode:1 |
| unsigned int | rbfwDelay:8 |
| unsigned int | f1pr:1 |
| unsigned int | f1mr:1 |
| unsigned int | f0pr:1 |
| unsigned int | f0mr:1 |
| unsigned int | rsrv1:1 |
| unsigned int | latAddr:5 |
| unsigned int | cnoVetoMux:1 |
| unsigned int | gemStart:1 |
| unsigned int | b31Start:1 |
| unsigned int | fpStart:1 |
| unsigned int | clkSel:2 |
|
|
Enable programmed start, bit 31 of this register |
|
|
Channel 0 clock mode: 0 programmable pulse train, 1 continuous clock |
|
|
clk select : TEM: 00b = internal 10b = primary ext 11b = redundant ext FREE: 00b = internal 10b = port 0 ext 11b = port 1 ext |
|
|
FREE VETO/CNO mux: 0 = VETO, 1 = CNO |
|
|
Select input channel when running LATp |
|
|
play FIFO master reset: 0 reset, reset data and config |
|
|
play FIFO partial reset: 0 reset, reset data, no config |
|
|
record FIFO master reset: 0 reset, reset data and config |
|
|
record FIFO partial reset: 0 reset, reset data, no config |
|
|
Enable start from front panel |
|
|
Enable GEM commanded start |
|
|
Address to respond for GEM commanded start |
|
|
Record FIFO mode. 0 - "dumb FIFO", 1 - "LATp FIFO" |
|
|
Delay of write to record FIFO for up to 6.4 usec |
|
|
pad |
|
|
Start acquisition on 0 to 1 transition |
|
|
Select source of start acquisition: 0 startAcq, 1 external |
1.3.3