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GLAST/LAT > DAQ and FSW > FSW > Doxygen Index > PBS / V2-11-0

Constituent: pbs     Tag: rad750

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CACHE.h File Reference

Cache manipulation routines. Currently NOOPs on all but the VxWorks platforms. More...

#include "PBS/impl/CACHE.h.xx-xxx-xxx"

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Defines
#define	CACHE_K_DATA_LINE_SIZE   (1 << CACHE_K_DATA_LINE_SIZE_PWR2)
	Size, in bytes, of a data cache line. This is just a convenience symbol and is the equivalent of (1 << CACHE_K_DATA_LINE_SIZE_PWR2).
#define	CACHE_K_DATA_LINE_MASK   (CACHE_K_DATA_LINE_SIZE - 1)
	Mask of the low bits of a data address cache line.
#define	CACHE_K_INSTRUCTION_LINE_SIZE   (1 << CACHE_K_INSTRUCTION_LINE_SIZE_PWR2)
	Size, in bytes, of a instruction cache line. This is just a convenience symbol and is the equivalent of (1 << CACHE_K_DATA_LINE_SIZE_PWR2).
#define	CACHE_K_INSTRUCTION_LINE_MASK   (CACHE_K_INSTRUCTION_LINE_SIZE - 1)
	Mask of the low bits of an instruction address cache line.
#define	_CACHE_K_INSTRUCTION   0
	Internal use only symbol.
#define	_CACHE_K_DATA   1
	Internal use only symbol.
#define	_CACHE_K_BRANCH   2
	Internal use only symbol.
Typedefs
typedef enum _CACHE_type	CACHE_type
	Typedef for enum _CACHE_type.
Enumerations
enum	_CACHE_type {   CACHE_K_INSTRUCTION = _CACHE_K_INSTRUCTION,   CACHE_K_DATA = _CACHE_K_DATA,   CACHE_K_BRANCH = _CACHE_K_BRANCH }
	The target cache type. More...
Functions
int	CACHE_disable (CACHE_type type)
	Disable the specified cache.
int	CACHE_enable (CACHE_type type)
	Enable the specified cache.
int	CACHE_clear (CACHE_type type, void *address, int nbytes)
	Clear all or some entries from a cache.
int	CACHE_flush (CACHE_type type, void *address, int nbytes)
	Flush all or some of a specified cache.
int	CACHE_invalidate (CACHE_type type, void *address, int nbytes)
	invalidate all or some of a specified cache
int	CACHE_lock (CACHE_type type, void *address, int nbytes)
	Lock all or part of a specified cache.
int	CACHE_unlock (CACHE_type type, void *address, int nbytes)
	Unlock all or part of a specified cache.
int	CACHE_pipeFlush (void)
	Flush the processor write buffers to memory.

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Detailed Description

Cache manipulation routines. Currently NOOPs on all but the VxWorks platforms.

Author:

JJRussell - russell@slac.stanford.edu

   CVS $Id: CACHE.h,v 1.4 2005/10/01 01:00:11 russell Exp $

SYNOPSIS

This provides a series of portable cache manipulation routines. These are implemented as either function aliases or macros depending on the platform.

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Enumeration Type Documentation

enum _CACHE_type

The target cache type. Enumerator: CACHE_K_INSTRUCTION  The instruction cache CACHE_K_DATA  The data cache CACHE_K_BRANCH  The branch cache

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Function Documentation

int CACHE_clear (  CACHE_type  type, void *  address, int  nbytes )

Clear all or some entries from a cache. Parameters: type  The cache type, i.e. one of CACHE_K_BRANCH, CACHE_K_DATA or CACHE_K_INSTRUCTION. address  The address to start clearing at nbytes  The number of bytes to clear Returns: Status, OK, unless the cache type is invalid or not supported on the target architecture. Flushes and invalidates all of some of the entries in the specified cache.

int CACHE_disable (  CACHE_type  type  )

Disable the specified cache. Parameters: type  The cache type, i.e. one of CACHE_K_DATA or CACHE_K_INSTRUCTION. Returns: Status, OK, unless the cache type is invalid or not supported on the target architecture. Flushes the specified cache and disables the instruction or data cache.

int CACHE_enable (  CACHE_type  type  )

Enable the specified cache. Parameters: type  The cache type, i.e. one of CACHE_K_DATA or CACHE_K_INSTRUCTION. Returns: Status, OK, unless the cache type is invalid or not supported on the target architecture. Invalidates the cache tags and enables the instruction or date cache.

int CACHE_flush (  CACHE_type  type, void *  address, int  nbytes )

Flush all or some of a specified cache. Parameters: type  The cache type, i.e. one of CACHE_K_BRANCH, CACHE_K_DATA or CACHE_K_INSTRUCTION. address  The address to start flushing at nbytes  The number of bytes to flush Returns: Status, OK, unless the cache type is invalid or not supported on the target architecture. Flushes (writes to memory) all or some of the entries in the specified cache. Depending on the cache desing, this operation may also invalidate the cache tags. For write-through caches, no work needs to be done since RAM already matches the cache entries. Note that write buffer on the chip may need to be flushed to complete the flush. See CACHE_pipeFlush.

int CACHE_invalidate (  CACHE_type  type, void *  address, int  nbytes )

invalidate all or some of a specified cache Parameters: type  The cache type, i.e. one of CACHE_K_BRANCH, a\ CACHE_K_DATA or CACHE_K_INSTRUCTION. address  The address to start invalidating at nbytes  The number of bytes to invalidate Returns: Status, OK, unless the cache type is invalid or not supported on the target architecture. Invalidates all or some of the entries in the specified cache. Depending on the cache design, the invalidate may be similar to the flush, or the tags may be invalidate directly.

int CACHE_lock (  CACHE_type  type, void *  address, int  nbytes )

Lock all or part of a specified cache. Parameters: type  The cache type, i.e. one of CACHE_K_DATA or CACHE_K_INSTRUCTION. address  The address to start locking at nbytes  The number of bytes to lock Returns: Status, OK, unless the cache type is invalid or not supported on the target architecture. Locks entries in the specified cache. Currently only the MCP750 supports cache locking.

int CACHE_pipeFlush (  void   )

Flush the processor write buffers to memory. Returns: Status, OK or ERROR if this operation is not supported. supported on the target architecture. Forces the output (write) buffers to write their contents to RAM. A cache flush may have forced the data into the write buffers, but then the buffers need to be flushed to RAM to maintain coherency.

int CACHE_unlock (  CACHE_type  type, void *  address, int  nbytes )

Unlock all or part of a specified cache. Parameters: type  The cache type, i.e. one of CACHE_K_DATA or CACHE_K_INSTRUCTION. address  The address to start locking at nbytes  The number of bytes to lock Returns: Status, OK, unless the cache type is invalid or not supported on the target architecture. Locks entries in the specified cache. Currently only the MCP750 supports cache locking.

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