#include <string.h>
#include <taskLib.h>
#include "BBC/SPIN.h"
#include "BBC/INT.ih"
#include "BTU/TEM_temInt.h"
#include "BFU/BFM.h"
#include "BFU/BFT.h"
Data Structures | |
| struct | _BFT_trg |
| Structure to contain information related to triggering. More... | |
Defines | |
| #define | BFT_M_NEVTS_HALF_FULL 0x4000 |
| The bit mask for the FIFO HALF FULL sticky bit. | |
| #define | BFT_M_NEVTS_COUNT 0x07ff |
| The bit mask for projecting out the number of events. Each TEM implements a different maximum number, but the width of the nevents field is always 11 bits,. | |
Functions | |
| int | BFT_cyclicTrigger (const BFT_trg *bft, int cyclicCnt, unsigned int cyclicTime, int burstCnt, unsigned int burstTime) |
| Issues a burst of triggers at a periodic rate. More... | |
| int | BFT_burstTrigger (const BFT_trg *bft, unsigned int trgCnt, unsigned int trgDelay) |
| Issues trgCnt triggers at a time interval of trgDelay. More... | |
| int | BFT_configure (BFT_trg *bft, const struct _BFM_dsc *bfm, unsigned int temList, unsigned int l1tEnb, unsigned int treqEnb, unsigned int cpuTreqEnb, unsigned int extTreqEnb, unsigned int l1tIn, unsigned int l1tOut, unsigned int hfullEnb, unsigned int hfullClr, unsigned int l1tTmr) |
| Configures the triggering environment. \oaram bft The trigger control structure. More... | |
| BFT_trg * | BFT_get (void) |
| Gets a pointer to the trigger control block. More... | |
| int | BFT_globalL1tArm (const BFT_trg *bft) |
| Arms the global trigger. More... | |
| int | BFT_globalL1tDisarm (const BFT_trg *bft) |
| Disarms the global trigger. More... | |
| int | BFT_globalL1tDisable (const BFT_trg *bft) |
| Disables the global trigger. More... | |
| int | BFT_globalL1tEnable (const BFT_trg *bft) |
| Enables the global trigger. More... | |
| unsigned int | BFT_init (BFT_trg *bft, const struct _BFM_dsc *bfm, unsigned int temList) |
| Initializes the trigger control structures. More... | |
| unsigned int | BFT_temsCpuBsyWrite (const BFT_trg *bft, unsigned int temList, unsigned int cpuBsy) |
| Writes the CPU BSY bit for the select TEMs. More... | |
| unsigned int | BFT_temsGblL1tArmWrite (const BFT_trg *bft, unsigned int temList, unsigned int gblL1tArm) |
| Writes the Global L1t Arm for the selected TEMs. More... | |
| unsigned int | BFT_temsGblL1tEnbWrite (const BFT_trg *bft, unsigned int temList, unsigned int gblL1tEnb) |
| Writes the Global L1t Enable for the selected TEMs. More... | |
| unsigned int | BFT_temsL1tEnbWrite (const BFT_trg *bft, unsigned int temList, unsigned int l1tEnb) |
| Writes the L1T ENABLE bit for the select TEMs. More... | |
| unsigned int | BFT_temsL1tTmrWrite (const BFT_trg *bft, unsigned int temList, unsigned int l1tTmr) |
| Writes the L1T TMR bit for the select TEMs. More... | |
| unsigned int | BFT_temsExtTreqEnbWrite (const BFT_trg *bft, unsigned int temList, unsigned int treqEnb) |
| Writes the EXT TREQ ENABLE bit for the select TEMs. More... | |
| unsigned int | BFT_temsL1tInWrite (const BFT_trg *bft, unsigned int temList, unsigned int l1tIn) |
| Writes the L1T IN mask for the select TEMs. More... | |
| unsigned int | BFT_temsL1tOutWrite (const BFT_trg *bft, unsigned int temList, unsigned int l1tOut) |
| Writes the L1T OUT mask for the select TEMs. More... | |
| unsigned int | BFT_temsTreqEnbWrite (const BFT_trg *bft, unsigned int temList, unsigned int treqEnb) |
| Writes the TREQ ENABLE bit for the select TEMs. More... | |
| int | BFT_trgTemSet (BFT_trg *bft, TEM_temId temId) |
| Sets the TEM to do self-triggering. More... | |
| unsigned int | BFT_nominate (unsigned int temList, const unsigned int *priorityList) |
| Nominates a TEM to be able to generate triggers. More... | |
| int | BFT_throttleClr (const BFT_trg *bft, unsigned int temList, const int *thresholds) |
| Relieves the FIFO HALF throttling on TEMs that have occupancies that dip below a specified level. More... | |
Variables | |
| const unsigned int | Bft_TriggerPriorityList [TEM_C_CNT] |
| Any array of TEM ids, arranged by priority of perference of which TEM to use as the CPU trigger generator. More... | |
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Issues trgCnt triggers at a time interval of trgDelay.
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Configures the triggering environment. \oaram bft The trigger control structure.
This routine does some autoconfiguring if inputs are set to -1. If temList is specified as -1, then the list of READIED TEMs is used. If cpuTreq = -1, then the best 'candidate' is chosen from the input list. The best candidate is 1. If only one TEM is chosen, then that's it. 2. If multiple TEMs are chosen, its the ACD if available. If the ACD is not available, then error. If cpuTreq is a list of CPUs, the same rules apply, except in case 2, no error is returned, but no default self trigger is established. If l1tEnb = -1, then the same rules apply as in the cpuTreq. If l1tEnb is a specific list, then you get what you chose. |
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Issues a burst of triggers at a periodic rate.
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Gets a pointer to the trigger control block.
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Arms the global trigger.
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Disables the global trigger.
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Disarms the global trigger.
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Enables the global trigger.
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Initializes the trigger control structures.
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Nominates a TEM to be able to generate triggers.
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Writes the CPU BSY bit for the select TEMs.
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Writes the EXT TREQ ENABLE bit for the select TEMs.
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Writes the Global L1t Arm for the selected TEMs.
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Writes the Global L1t Enable for the selected TEMs.
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Writes the L1T ENABLE bit for the select TEMs.
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Writes the L1T IN mask for the select TEMs.
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Writes the L1T OUT mask for the select TEMs.
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Writes the L1T TMR bit for the select TEMs.
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Writes the TREQ ENABLE bit for the select TEMs.
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Relieves the FIFO HALF throttling on TEMs that have occupancies that dip below a specified level.
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Sets the TEM to do self-triggering.
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Initial value:
{
TEM_C_LTC,
TEM_C_CAL,
TEM_C_TKR,
TEM_C_ACD
}
The first TEM which appears in the list which is also a member of the active list is select as the TEM which generates a CPU trigger |
1.2.14 written by Dimitri van Heesch,
© 1997-2002