standard FW, but now with dynamic RO
also expanded the decimated buffers

QICK configuration:

	Board: RFSoC4x2

	Software version: 0.2.268
	Firmware timestamp: Tue Jul 16 11:15:32 2024

	Global clocks (MHz): tProcessor 614.400, RF reference 491.520

	2 signal generator channels:
	0:	axis_signal_gen_v6 - envelope memory 65536 samples (6.667 us)
		fs=9830.400 MHz, fabric=614.400 MHz, 32-bit DDS, range=9830.400 MHz
		DAC tile 0, blk 0 is DAC_B
	1:	axis_signal_gen_v6 - envelope memory 65536 samples (6.667 us)
		fs=9830.400 MHz, fabric=614.400 MHz, 32-bit DDS, range=9830.400 MHz
		DAC tile 2, blk 0 is DAC_A

	2 readout channels:
	0:	axis_dyn_readout_v1 - configured by tProc output 2
		fs=4423.680 MHz, decimated=552.960 MHz, 32-bit DDS, range=4423.680 MHz
		maxlen 16384 accumulated, 16384 decimated (29.630 us)
		triggered by tport 0, pin 0, feedback to tProc input 0
		ADC tile 0, blk 0 is ADC_D
	1:	axis_dyn_readout_v1 - configured by tProc output 3
		fs=4423.680 MHz, decimated=552.960 MHz, 32-bit DDS, range=4423.680 MHz
		maxlen 16384 accumulated, 16384 decimated (29.630 us)
		triggered by tport 1, pin 0, feedback to tProc input 1
		ADC tile 0, blk 1 is ADC_C

	8 digital output pins:
	0:	PMOD0_0
	1:	PMOD0_1
	2:	PMOD0_2
	3:	PMOD0_3
	4:	PMOD0_4
	5:	PMOD0_5
	6:	PMOD0_6
	7:	PMOD0_7

	tProc qick_processor ("v2") rev 20: program memory 256 words, data memory 256 words
		external start pin: None

	DDR4 memory buffer: 1073741824 samples (1.942 sec), 256 samples/transfer
		wired to readouts [0, 1]

	MR buffer: 8192 samples (1.852 us), wired to readouts [0, 1]