update of 2023-03-23_216_testphase_q3diamond/ but with the phase-synced ADCs and DACs slowed down to give a decimation bandwidth <100 MHz

mashup of test_phase (tproc-controlled readout demo) with q3diamond/qick-amo
see https://github.com/openquantumhardware/qick/issues/120

3x full-speed gen
2x int4 gen
4x I/Q gen
2x tproc-controlled readout
1x PYNQ-controlled readout

4x digital input pins (PMOD1_4 through _7) wired to tProc input 3

full-speed gens are sync'able with the tproc-controlled readouts