"Configure CPU Error Handling" (APP/LCM)

ITOS Mnemonic:  LCMERRORCFG

View Options: (help)

Focus:	Maintenance / Operation
Structures:	Abstract / Concrete

Context:

Description:

This telecommand configures the error handlers attached to the RAD750 bridge chip interrupts. For each error class (LCMECLPCI, LCMECLMEC, LCMECLMEU), the error reponse level may be set to LCMLEVCNT, LCMLEVDIA, or LCMLEVCRI.

Layout:  (hide detail; help)

Configure CPU Error Handling (LLCMERRORCFG) Telecommand Packet Format
0x	0	1	2	3	4	5	6	7	8	9	10	11	12	13	14	15
000	Version=0			T=1	SH	APID=0x694:2
002	SF=3		Sequence Count
004	Packet Length=9
006	0	Function Code=2
008	LCMFLAGS cmdFlags
00A	ERRORCLASS errClass
00C	ERRORLEVEL errLevel
00E	Packet Checksum

LLCMERRORCFG (pkt)
|  LCMFLAGS cmdFlags (fld)
|  ERRORCLASS errClass (fld)
|  ERRORLEVEL errLevel (fld)

typedef struct _LCM_LLCMERRORCFG_Pkt {

    /* CCSDS header */
    char                 hdr[8];

    /* Command payload */
    LCM_LLCMERRORCFG_Prm pay;

} LCM_LLCMERRORCFG_Pkt;

Fields:

ERRORCLASS (index)

Attribute(s):  LCMERRCLASS

Brief:  "Error Reporting Class"

Instance(s):  errClass

ERRORLEVEL (index)

Attribute(s):  LCMERRLEVEL

Brief:  "Error Reporting Level"

Instance(s):  errLevel

LCMFLAGS (index)

Attribute(s):  

Brief:  "LCM Command Flags"

Instance(s):  cmdFlags