PGEM proposes to use a group of four COMM boards in a manner theoretically possible, but not yet tested. As such a little R&D is required and potential problems may arise.
Since we have more signals than a single VME LAT COMM I/O Board can provide we must daisy-chain 4 COMM boards together and synchronize their playback. While documented as possible this has never been tested.
The first step will be to verify that a master COMM board can initiate playback in the slave COMM boards. This should be easy to verify.
Next the COMM boards must be configured to remove any clock skew introduced by the chaining. The skew could be removed in one of two ways: 1) Each COMM board has a playback delay register, 2) The FIFOs of each COMM board could be padded with a suitable number of zero words.
The FIFOs of the VME LAT COMM I/O Board are 32K entries deep, which limits the length of the patterns. The COMM board has a couple of features to work around this limitation however.
The COMM board can be configured to fire an interrupt when playback is complete. Also once the FIFO is programmed it can be played back over and over without reloading the FIFO. Remember loading the FIFO is somewhat costly, using programmed I/O to write one word at a time to the FIFO. So we could program the FIFO once, start playback once and re-start playback in an ISR.
Obviously the interrupt handling introduces some delay before restarting playback. Also the last play back word "sticks" on the COMM outputs and would remain until playback restarted. Therefore it seems wise to insure that the last word written to the FIFO is a zero, leaving all the outputs de-asserted until playback restarts.
As a wild guess say it takes 40 microseconds (800 clocks @ 20 MHz) to restart playback once the interrupt is raised. Then the time to play back a full FIFO plus restart would be 32767 + 800 clocks, about 33500 cycles. Of the total cycles for one loop the 800 clocks represents about 2.5% of the total time. When running continuously all signals would be de-asserted for 2.5% of the time for the same 800 cycle interval. If the 40 microsecond guess is too high then the percentage will be smaller.
This does not seem like a big deal to me, but something to be aware of.