\hypertarget{defs_8h}{
\section{defs.h File Reference}
\label{defs_8h}\index{defs.h@{defs.h}}
}
Defines registers and function blocks.  




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\includegraphics[width=164pt]{defs_8h__dep__incl}
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\subsection*{Enumerations}
\begin{CompactItemize}
\item 
enum \hyperlink{defs_8h_a419}{LEM\_\-FUNCTION} \{ \par
{\bf CMD\_\-DATALESS} =  0, 
\par
{\bf CMD\_\-LOAD} =  1, 
\par
{\bf CMD\_\-READ} =  2, 
\par
{\bf ACD\_\-CMD\_\-DATALESS} =  1, 
\par
{\bf ACD\_\-CMD\_\-LOAD} =  1, 
\par
{\bf ACD\_\-CMD\_\-READ} =  3
 \}
\begin{CompactList}\small\item\em Sybmols for the function of a LATp packet. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a420}{LEM\_\-OPCODE} \{ \par
{\bf LEM\_\-OPCODE\_\-NOOP} =  0, 
\par
{\bf LEM\_\-OPCODE\_\-RESET} =  1, 
\par
{\bf GEM\_\-OPCODE\_\-SOLICIT\_\-TRIGGER} =  2, 
\par
{\bf EBM\_\-OPCODE\_\-STAT\_\-RESET} =  0, 
\par
{\bf CRC\_\-OPCODE\_\-CALSTROBE} =  3, 
\par
{\bf ARC\_\-OPCODE\_\-SET\_\-HVBS} =  10, 
\par
{\bf ARC\_\-OPCODE\_\-SET\_\-HVSAA} =  11
 \}
\begin{CompactList}\small\item\em Enumeration of the LATp opcodes. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a421}{LEM\_\-REG\_\-ID} \{ \par
{\bf CRU\_\-CONFIGURATION} =  0, 
\par
{\bf CRU\_\-COMMAND} =  1, 
\par
{\bf CRU\_\-RESPONSE} =  2, 
\par
{\bf CRU\_\-CR\_\-STATS} =  3, 
\par
{\bf GEM\_\-CON\_\-CONFIGURATION} =  0, 
\par
{\bf GEM\_\-CON\_\-ADDRESS} =  1, 
\par
{\bf GEM\_\-CON\_\-WINDOW} =  2, 
\par
{\bf GEM\_\-CON\_\-PERIODIC\_\-MODE} =  3, 
\par
{\bf GEM\_\-CON\_\-PERIODIC\_\-LIMIT} =  4, 
\par
{\bf GEM\_\-CON\_\-PERIODIC\_\-RATE} =  5, 
\par
{\bf GEM\_\-CON\_\-SEQUENCE} =  6, 
\par
{\bf GEM\_\-CON\_\-CR\_\-STATS} =  7, 
\par
{\bf GEM\_\-CON\_\-EVT\_\-STATS} =  8, 
\par
{\bf GEM\_\-CON\_\-DELAY\_\-EXT\_\-TRG} =  9, 
\par
{\bf GEM\_\-WIN\_\-WIDTH} =  0, 
\par
{\bf GEM\_\-WIN\_\-OPEN\_\-MASK} =  1, 
\par
{\bf GEM\_\-STAT\_\-LIVETIME} =  0x0, 
\par
{\bf GEM\_\-STAT\_\-PRESCALE} =  0x1, 
\par
{\bf GEM\_\-STAT\_\-DISCARD} =  0x2, 
\par
{\bf GEM\_\-STAT\_\-SENT} =  0x3, 
\par
{\bf GEM\_\-STAT\_\-TILE\_\-COUNTERS} =  0x4, 
\par
{\bf GEM\_\-STAT\_\-TILE\_\-0} =  0x5, 
\par
{\bf GEM\_\-STAT\_\-TILE\_\-1} =  0x6, 
\par
{\bf GEM\_\-STAT\_\-CNO\_\-COUNTERS} =  0x7, 
\par
{\bf GEM\_\-STAT\_\-CNO\_\-0} =  0x8, 
\par
{\bf GEM\_\-STAT\_\-CNO\_\-1} =  0x9, 
\par
{\bf GEM\_\-STAT\_\-1\_\-PPS} =  0xa, 
\par
{\bf GEM\_\-STAT\_\-TIMEBASE} =  0xb, 
\par
{\bf GEM\_\-STAT\_\-DEAD\_\-ZONED} =  0xc, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-0} =  0x0, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-1} =  0x1, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-2} =  0x2, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-3} =  0x3, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-4} =  0x4, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-5} =  0x5, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-6} =  0x6, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-7} =  0x7, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-8} =  0x8, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-9} =  0x9, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-A} =  0xa, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-B} =  0xb, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-C} =  0xc, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-D} =  0xd, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-E} =  0xe, 
\par
{\bf GEM\_\-TAM\_\-ENGINE\_\-F} =  0xf, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-00\_\-07} =  0x00, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-08\_\-0F} =  0x01, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-10\_\-17} =  0x02, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-18\_\-1F} =  0x03, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-20\_\-27} =  0x04, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-28\_\-2F} =  0x05, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-30\_\-37} =  0x06, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-38\_\-3F} =  0x07, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-40\_\-47} =  0x08, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-48\_\-4F} =  0x09, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-50\_\-57} =  0x0a, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-58\_\-5F} =  0x0b, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-60\_\-67} =  0x0c, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-68\_\-6F} =  0x0d, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-70\_\-77} =  0x0e, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-78\_\-7F} =  0x0f, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-80\_\-87} =  0x10, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-88\_\-8F} =  0x11, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-90\_\-97} =  0x12, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-98\_\-9F} =  0x13, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-A0\_\-A7} =  0x14, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-A8\_\-AF} =  0x15, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-B0\_\-B7} =  0x16, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-B8\_\-BF} =  0x17, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-C0\_\-C7} =  0x18, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-C8\_\-CF} =  0x19, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-D0\_\-D7} =  0x1a, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-D8\_\-DF} =  0x1b, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-E0\_\-E7} =  0x1c, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-E8\_\-EF} =  0x1d, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-F0\_\-F7} =  0x1e, 
\par
{\bf GEM\_\-SCHD\_\-CON\_\-F8\_\-FF} =  0x1f, 
\par
{\bf GEM\_\-IE\_\-TOWERS\_\-00\_\-03} =  0x00, 
\par
{\bf GEM\_\-IE\_\-TOWERS\_\-04\_\-07} =  0x01, 
\par
{\bf GEM\_\-IE\_\-TOWERS\_\-08\_\-11} =  0x02, 
\par
{\bf GEM\_\-IE\_\-TOWERS\_\-12\_\-15} =  0x03, 
\par
{\bf GEM\_\-IE\_\-ACD\_\-CNO} =  0x04, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-000\_\-013} =  0x05, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-014\_\-032} =  0x06, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-033\_\-NA3} =  0x07, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-100\_\-113} =  0x08, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-114\_\-NA5} =  0x09, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-200\_\-213} =  0x0a, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-214\_\-NA7} =  0x0b, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-300\_\-313} =  0x0c, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-314\_\-NA9} =  0x0d, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-400\_\-413} =  0x0e, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-414\_\-NA1} =  0x0f, 
\par
{\bf GEM\_\-IE\_\-TILES\_\-500\_\-NA10} =  0x10, 
\par
{\bf GEM\_\-IE\_\-TOWER\_\-BUSY} =  0x11, 
\par
{\bf GEM\_\-IE\_\-EXTERNAL} =  0x12, 
\par
{\bf PDU\_\-CONFIGURATION} =  0, 
\par
{\bf PDU\_\-ADDRESS} =  1, 
\par
{\bf PDU\_\-CR\_\-STATS} =  2, 
\par
{\bf PDU\_\-CRATES} =  3, 
\par
{\bf PDU\_\-TEMS} =  4, 
\par
{\bf PDU\_\-ACD} =  5, 
\par
{\bf PDU\_\-MONITOR} =  6, 
\par
{\bf EBM\_\-BACK\_\-END\_\-CFG} =  0x0, 
\par
{\bf EBM\_\-FRONT\_\-END\_\-CFG\_\-A} =  0x1, 
\par
{\bf EBM\_\-FRONT\_\-END\_\-CFG\_\-B} =  0x2, 
\par
{\bf EBM\_\-ADDRESS} =  0x3, 
\par
{\bf EBM\_\-INPUT\_\-ENABLES} =  0x4, 
\par
{\bf EBM\_\-CONTRIBUTORS} =  0x5, 
\par
{\bf EBM\_\-DESTINATION\_\-ENABLES} =  0x6, 
\par
{\bf EBM\_\-TIMEOUT} =  0x7, 
\par
{\bf EBM\_\-TEM\_\-STATS} =  0x8, 
\par
{\bf EBM\_\-CR\_\-STATS} =  0x9, 
\par
{\bf EBM\_\-SSR\_\-HDR} =  0xa, 
\par
{\bf EBM\_\-RECEIVE\_\-GEM} =  0, 
\par
{\bf EBM\_\-RECEIVE\_\-AEM} =  1, 
\par
{\bf EBM\_\-RECEIVE\_\-SIU0} =  2, 
\par
{\bf EBM\_\-RECEIVE\_\-SIU1} =  3, 
\par
{\bf EBM\_\-RECEIVE\_\-EPU0} =  4, 
\par
{\bf EBM\_\-RECEIVE\_\-EPU1} =  5, 
\par
{\bf EBM\_\-RECEIVE\_\-EPU2} =  6, 
\par
{\bf EBM\_\-RECEIVE\_\-SIU2} =  7, 
\par
{\bf EBM\_\-RECEIVE\_\-TEM\_\-MUX0} =  16, 
\par
{\bf EBM\_\-RECEIVE\_\-TEM\_\-MUX1} =  17, 
\par
{\bf EBM\_\-TRANSMIT\_\-SIU0} =  32, 
\par
{\bf EBM\_\-TRANSMIT\_\-SIU1} =  33, 
\par
{\bf EBM\_\-TRANSMIT\_\-EPU0} =  34, 
\par
{\bf EBM\_\-TRANSMIT\_\-EPU1} =  35, 
\par
{\bf EBM\_\-TRANSMIT\_\-EPU2} =  36, 
\par
{\bf EBM\_\-TRANSMIT\_\-SIU2} =  37, 
\par
{\bf EBM\_\-TRANSMIT\_\-SSR} =  38, 
\par
{\bf TEM\_\-CONFIGURATION} =  0, 
\par
{\bf TEM\_\-DATA\_\-MASKS} =  1, 
\par
{\bf TEM\_\-STATUS} =  2, 
\par
{\bf TEM\_\-CMD\_\-RSP\_\-STATS} =  3, 
\par
{\bf TEM\_\-TKR\_\-TRGSEQ} =  4, 
\par
{\bf TEM\_\-CAL\_\-TRGSEQ} =  5, 
\par
{\bf TEM\_\-ADDRESS} =  6, 
\par
{\bf CCC\_\-CONFIGURATION} =  0, 
\par
{\bf CCC\_\-LAYER\_\-MASK\_\-0} =  1, 
\par
{\bf CCC\_\-LAYER\_\-MASK\_\-1} =  2, 
\par
{\bf CCC\_\-FIFO\_\-STATUS} =  3, 
\par
{\bf CCC\_\-LATCHED\_\-STATUS} =  4, 
\par
{\bf CCC\_\-EVENT\_\-TIMEOUTS} =  5, 
\par
{\bf CCC\_\-TRG\_\-ALIGNMENT} =  6, 
\par
{\bf CRC\_\-STATUS} =  0, 
\par
{\bf CRC\_\-LAST\_\-CMD} =  1, 
\par
{\bf CRC\_\-DELAY\_\-1} =  3, 
\par
{\bf CRC\_\-DELAY\_\-2} =  4, 
\par
{\bf CRC\_\-DELAY\_\-3} =  5, 
\par
{\bf CRC\_\-DAC} =  6, 
\par
{\bf CRC\_\-CONFIG} =  7, 
\par
{\bf CFE\_\-CONFIG\_\-0} =  0, 
\par
{\bf CFE\_\-CONFIG\_\-1} =  1, 
\par
{\bf CFE\_\-FLE\_\-DAC} =  2, 
\par
{\bf CFE\_\-FHE\_\-DAC} =  3, 
\par
{\bf CFE\_\-LOG\_\-ACPT} =  4, 
\par
{\bf CFE\_\-RNG\_\-ULD\_\-DAC} =  5, 
\par
{\bf CFE\_\-REF\_\-DAC} =  6, 
\par
{\bf TCC\_\-CONFIGURATION} =  0, 
\par
{\bf TCC\_\-INPUT\_\-MASK} =  1, 
\par
{\bf TCC\_\-FIFO\_\-STATUS} =  2, 
\par
{\bf TCC\_\-LATCHED\_\-STATUS} =  3, 
\par
{\bf TCC\_\-EVENT\_\-TIMEOUTS} =  4, 
\par
{\bf TCC\_\-TRG\_\-ALIGNMENT} =  5, 
\par
{\bf TRC\_\-CSR} =  0, 
\par
{\bf TRC\_\-SYNCH} =  1, 
\par
{\bf TFE\_\-DATA\_\-MASK} =  0, 
\par
{\bf TFE\_\-CALIB\_\-MASK} =  1, 
\par
{\bf TFE\_\-TRIG\_\-MASK} =  2, 
\par
{\bf TFE\_\-DAC} =  3, 
\par
{\bf TFE\_\-MODE} =  4, 
\par
{\bf TIC\_\-POWER\_\-SUPPLY} =  0, 
\par
{\bf TIC\_\-STATUS} =  1, 
\par
{\bf TIC\_\-CAL\_\-INPUT\_\-MASK} =  2, 
\par
{\bf TIC\_\-CAL\_\-LRS\_\-MASK} =  3, 
\par
{\bf TIC\_\-CAL\_\-LRS\_\-COUNTERS} =  4, 
\par
{\bf TIC\_\-TKR\_\-INPUT\_\-MASK\_\-0} =  5, 
\par
{\bf TIC\_\-TKR\_\-INPUT\_\-MASK\_\-1} =  6, 
\par
{\bf TIC\_\-TKR\_\-INPUT\_\-MASK\_\-2} =  7, 
\par
{\bf TIC\_\-TKR\_\-LAYER\_\-ENABLE\_\-0} =  5, 
\par
{\bf TIC\_\-TKR\_\-LAYER\_\-ENABLE\_\-1} =  6, 
\par
{\bf TIC\_\-TKR\_\-OUT\_\-MASK} =  7, 
\par
{\bf TIC\_\-TKR\_\-LRS\_\-MASK} =  8, 
\par
{\bf TIC\_\-TKR\_\-UNUSED} =  9, 
\par
{\bf TIC\_\-TKR\_\-LRS\_\-COUNTER\_\-A} =  10, 
\par
{\bf TIC\_\-TKR\_\-LRS\_\-COUNTER\_\-B} =  11, 
\par
{\bf TIC\_\-TKR\_\-LRS\_\-COUNTER\_\-0} =  10, 
\par
{\bf TIC\_\-TKR\_\-LRS\_\-COUNTER\_\-1} =  11, 
\par
{\bf TIC\_\-BUSY\_\-LRS\_\-MASK} =  12, 
\par
{\bf TIC\_\-BUSY\_\-LRS\_\-COUNTER} =  13, 
\par
{\bf TIC\_\-ADCS} =  14, 
\par
{\bf TIC\_\-MUX\_\-CONFIG} =  15, 
\par
{\bf TIC\_\-TKR\_\-BIAS\_\-DAC} =  16, 
\par
{\bf TIC\_\-CAL\_\-BIAS\_\-DAC} =  17, 
\par
{\bf AEM\_\-CON\_\-CONFIGURATION} =  0, 
\par
{\bf AEM\_\-CON\_\-COMMON\_\-STATUS} =  1, 
\par
{\bf AEM\_\-CON\_\-FREEBOARD\_\-STATUS} =  2, 
\par
{\bf AEM\_\-CON\_\-COMMAND\_\-RESPONSE} =  3, 
\par
{\bf AEM\_\-CON\_\-TRGSEQ} =  4, 
\par
{\bf AEM\_\-CON\_\-POWER\_\-STATUS} =  5, 
\par
{\bf AEM\_\-CON\_\-ADDRESS} =  6, 
\par
{\bf AEM\_\-CON\_\-TIMEOUT} =  7, 
\par
{\bf AEM\_\-CON\_\-RELOCATION} =  8, 
\par
{\bf AEM\_\-CON\_\-RESPONSE\_\-TIMEOUT} =  9, 
\par
{\bf AEM\_\-CON\_\-POWER\_\-UP} =  10, 
\par
{\bf AEM\_\-CON\_\-POWER\_\-DOWN} =  11, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-00} =  0, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-01} =  1, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-02} =  2, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-03} =  3, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-04} =  4, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-05} =  5, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-06} =  6, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-07} =  7, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-08} =  8, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-09} =  9, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-10} =  10, 
\par
{\bf AEM\_\-ENV\_\-FREE\_\-11} =  11, 
\par
{\bf ARC\_\-VETO\_\-DELAY} =  2, 
\par
{\bf ARC\_\-RQST\_\-HVBS} =  8, 
\par
{\bf ARC\_\-RQST\_\-HVSAA} =  9, 
\par
{\bf ARC\_\-HVBS} =  10, 
\par
{\bf ARC\_\-HVSAA} =  11, 
\par
{\bf ARC\_\-HOLD\_\-DELAY} =  12, 
\par
{\bf ARC\_\-VETO\_\-WIDTH} =  13, 
\par
{\bf ARC\_\-HITMAP\_\-WIDTH} =  14, 
\par
{\bf ARC\_\-HITMAP\_\-DEADTIME} =  15, 
\par
{\bf ARC\_\-LOOK\_\-AT\_\-ME} =  20, 
\par
{\bf ARC\_\-HITMAP\_\-DELAY} =  24, 
\par
{\bf ARC\_\-PHA\_\-EN\_\-0} =  25, 
\par
{\bf ARC\_\-VETO\_\-EN\_\-0} =  26, 
\par
{\bf ARC\_\-HLD\_\-EN\_\-0} =  27, 
\par
{\bf ARC\_\-PHA\_\-EN\_\-1} =  28, 
\par
{\bf ARC\_\-VETO\_\-EN\_\-1} =  29, 
\par
{\bf ARC\_\-HLD\_\-EN\_\-1} =  30, 
\par
{\bf ARC\_\-MAX\_\-PHA} =  31, 
\par
{\bf ARC\_\-MODE} =  40, 
\par
{\bf ARC\_\-STATUS} =  41, 
\par
{\bf ARC\_\-LAST\_\-CMND} =  42, 
\par
{\bf ARC\_\-DIAGNOSTIC} =  43, 
\par
{\bf ARC\_\-CMD\_\-REJECT} =  44, 
\par
{\bf ARC\_\-FREE\_\-ID} =  45, 
\par
{\bf ARC\_\-GARC\_\-VERSION} =  46, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-00} =  56, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-01} =  57, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-02} =  58, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-03} =  59, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-04} =  60, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-05} =  61, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-06} =  62, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-07} =  72, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-08} =  73, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-09} =  74, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-10} =  75, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-11} =  76, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-12} =  77, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-13} =  78, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-14} =  88, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-15} =  89, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-16} =  90, 
\par
{\bf ARC\_\-PHA\_\-THRSHLD\_\-17} =  91, 
\par
{\bf ARC\_\-ADC\_\-TACQ} =  92, 
\par
{\bf AFE\_\-CONFIGURATION} =  0, 
\par
{\bf AFE\_\-VETO\_\-DAC} =  1, 
\par
{\bf AFE\_\-VETO\_\-VERNIER\_\-DAC} =  2, 
\par
{\bf AFE\_\-HLD\_\-DAC} =  3, 
\par
{\bf AFE\_\-BIAS\_\-DAC} =  4, 
\par
{\bf AFE\_\-TCI\_\-DAC} =  5, 
\par
{\bf AFE\_\-VERS\_\-ADDR} =  6, 
\par
{\bf AFE\_\-WRITE\_\-CTR} =  7, 
\par
{\bf AFE\_\-REJECT\_\-CTR} =  8, 
\par
{\bf AFE\_\-LOOP\_\-CTR} =  9, 
\par
{\bf AFE\_\-CHIP\_\-ADDR} =  10
 \}
\begin{CompactList}\small\item\em Symbolic names for the registers of the LAT. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a422}{LEM\_\-REG\_\-BLK} \{ \par
{\bf CRU\_\-BLK\_\-CC} =  0, 
\par
{\bf EBM\_\-BLK\_\-CC} =  0, 
\par
{\bf EBM\_\-BLK\_\-STAT} =  1, 
\par
{\bf PDU\_\-BLK\_\-CC} =  0, 
\par
{\bf PDU\_\-BLK\_\-ENV} =  1, 
\par
{\bf GEM\_\-BLK\_\-CC} =  0, 
\par
{\bf GEM\_\-BLK\_\-TAM} =  1, 
\par
{\bf GEM\_\-BLK\_\-STAT} =  2, 
\par
{\bf GEM\_\-BLK\_\-SCHD} =  3, 
\par
{\bf GEM\_\-BLK\_\-ROI} =  4, 
\par
{\bf GEM\_\-BLK\_\-IE} =  5, 
\par
{\bf GEM\_\-BLK\_\-WIN} =  6
 \}
\begin{CompactList}\small\item\em Symbols for the register blocks. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a423}{LEM\_\-DATA\_\-LEN} \{ \par
{\bf CRU\_\-DATA\_\-LEN} =  2, 
\par
{\bf EBM\_\-DATA\_\-LEN} =  2, 
\par
{\bf GEM\_\-DATA\_\-LEN} =  2, 
\par
{\bf PDU\_\-DATA\_\-LEN} =  2, 
\par
{\bf TEM\_\-DATA\_\-LEN} =  2, 
\par
{\bf CCC\_\-DATA\_\-LEN} =  2, 
\par
{\bf CRC\_\-DATA\_\-LEN} =  1, 
\par
{\bf CFE\_\-DATA\_\-LEN} =  1, 
\par
{\bf TCC\_\-DATA\_\-LEN} =  2, 
\par
{\bf TRC\_\-DATA\_\-LEN} =  4, 
\par
{\bf TFE\_\-DATA\_\-LEN} =  4, 
\par
{\bf AEM\_\-DATA\_\-LEN} =  2, 
\par
{\bf ARC\_\-DATA\_\-LEN} =  1, 
\par
{\bf AFE\_\-DATA\_\-LEN} =  1
 \}
\begin{CompactList}\small\item\em Number of unsigned shorts in the data portion of a LATP packet. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a424}{LEM\_\-CRU\_\-MASK} \{ \par
{\bf CRU\_\-MASK\_\-TEM\_\-0} =  0x0001, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-1} =  0x0002, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-2} =  0x0004, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-3} =  0x0008, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-4} =  0x0010, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-5} =  0x0020, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-6} =  0x0040, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-7} =  0x0080, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-8} =  0x0100, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-9} =  0x0200, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-A} =  0x0400, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-B} =  0x0800, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-C} =  0x1000, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-D} =  0x2000, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-E} =  0x4000, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-F} =  0x8000, 
\par
{\bf CRU\_\-MASK\_\-TEM\_\-ALL} =  0xffff, 
\par
{\bf CRU\_\-MASK\_\-GEM} =  0x010000, 
\par
{\bf CRU\_\-MASK\_\-AEM} =  0x020000, 
\par
{\bf CRU\_\-MASK\_\-EBM} =  0x040000, 
\par
{\bf CRU\_\-MASK\_\-PDU\_\-0} =  0x080000, 
\par
{\bf CRU\_\-MASK\_\-PDU\_\-1} =  0x100000, 
\par
{\bf CRU\_\-MASK\_\-PDU\_\-ALL} =  0x180000, 
\par
{\bf CRU\_\-MASK\_\-SIU\_\-EXT} =  0x1000000, 
\par
{\bf CRU\_\-MASK\_\-SIU\_\-0} =  0x2000000, 
\par
{\bf CRU\_\-MASK\_\-SIU\_\-1} =  0x4000000, 
\par
{\bf CRU\_\-MASK\_\-SIU\_\-ALL} =  0x7000000, 
\par
{\bf CRU\_\-MASK\_\-EPU\_\-0} =  0x08000000, 
\par
{\bf CRU\_\-MASK\_\-EPU\_\-1} =  0x10000000, 
\par
{\bf CRU\_\-MASK\_\-EPU\_\-2} =  0x20000000, 
\par
{\bf CRU\_\-MASK\_\-EPU\_\-ALL} =  0x38000000
 \}
\begin{CompactList}\small\item\em Bit masks for the command and response enable registers of the CRU. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a425}{LEM\_\-EBM\_\-MASK} \{ \par
{\bf EBM\_\-MASK\_\-GEM} =  0x00000001, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-0} =  0x00000002, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-1} =  0x00000004, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-2} =  0x00000008, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-3} =  0x00000010, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-4} =  0x00000020, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-5} =  0x00000040, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-6} =  0x00000080, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-7} =  0x00000100, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-8} =  0x00000200, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-9} =  0x00000400, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-A} =  0x00000800, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-B} =  0x00001000, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-C} =  0x00002000, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-D} =  0x00004000, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-E} =  0x00008000, 
\par
{\bf EBM\_\-MASK\_\-TEM\_\-F} =  0x00010000, 
\par
{\bf EBM\_\-MASK\_\-AEM} =  0x00020000, 
\par
{\bf EBM\_\-MASK\_\-SIU\_\-EXT} =  0x00040000, 
\par
{\bf EBM\_\-MASK\_\-SIU\_\-0} =  0x00080000, 
\par
{\bf EBM\_\-MASK\_\-SIU\_\-1} =  0x00100000, 
\par
{\bf EBM\_\-MASK\_\-EPU\_\-0} =  0x00200000, 
\par
{\bf EBM\_\-MASK\_\-EPU\_\-1} =  0x00400000, 
\par
{\bf EBM\_\-MASK\_\-EPU\_\-2} =  0x00800000
 \}
\begin{CompactList}\small\item\em Bit masks for the EBM input enables and output enables registers. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a426}{LEM\_\-GEM\_\-WIN\_\-MASK} \{ \par
{\bf GEM\_\-WIN\_\-MASK\_\-ROI} =  0x01, 
\par
{\bf GEM\_\-WIN\_\-MASK\_\-TKR} =  0x02, 
\par
{\bf GEM\_\-WIN\_\-MASK\_\-LOW} =  0x04, 
\par
{\bf GEM\_\-WIN\_\-MASK\_\-HIGH} =  0x08, 
\par
{\bf GEM\_\-WIN\_\-MASK\_\-CNO} =  0x10, 
\par
{\bf GEM\_\-WIN\_\-MASK\_\-PERIOD} =  0x20, 
\par
{\bf GEM\_\-WIN\_\-MASK\_\-SOLICIT} =  0x40
 \}
\begin{CompactList}\small\item\em Bit masks for the GEM window open mask register. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a427}{LEM\_\-LOCAL\_\-TYPE} \{ \par
{\bf TYPE\_\-TEM\_\-CC} =  0, 
\par
{\bf TYPE\_\-TEM\_\-TCC} =  1, 
\par
{\bf TYPE\_\-TEM\_\-CCC} =  2, 
\par
{\bf TYPE\_\-TEM\_\-TIC} =  3, 
\par
{\bf TYPE\_\-AEM\_\-CC} =  0, 
\par
{\bf TYPE\_\-AEM\_\-ENV} =  1
 \}
\begin{CompactList}\small\item\em TEM and AEM register block ids. \item\end{CompactList}\item 
enum \{ {\bf LEM\_\-MASTER} =  0x20
 \}
\item 
enum \hyperlink{defs_8h_a429}{LEM\_\-LATP\_\-ADDR} \{ \par
{\bf LEM\_\-ADDR\_\-TEM\_\-0} =  0x00, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-1} =  0x01, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-2} =  0x02, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-3} =  0x03, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-4} =  0x04, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-5} =  0x05, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-6} =  0x06, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-7} =  0x07, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-8} =  0x08, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-9} =  0x09, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-A} =  0x0a, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-B} =  0x0b, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-C} =  0x0c, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-D} =  0x0d, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-E} =  0x0e, 
\par
{\bf LEM\_\-ADDR\_\-TEM\_\-F} =  0x0f, 
\par
{\bf LEM\_\-ADDR\_\-GEM} =  0x10, 
\par
{\bf LEM\_\-ADDR\_\-AEM} =  0x11, 
\par
{\bf LEM\_\-ADDR\_\-EBM} =  0x12, 
\par
{\bf LEM\_\-ADDR\_\-PDU\_\-0} =  0x13, 
\par
{\bf LEM\_\-ADDR\_\-PDU\_\-1} =  0x14, 
\par
{\bf LEM\_\-ADDR\_\-CRU} =  0x1E, 
\par
{\bf LEM\_\-ADDR\_\-SLV\_\-BCAST} =  0x1F, 
\par
{\bf LEM\_\-ADDR\_\-SIU\_\-EXT} =  LEM\_\-MASTER $|$ 0x1, 
\par
{\bf LEM\_\-ADDR\_\-SIU\_\-0} =  LEM\_\-MASTER $|$ 0x2, 
\par
{\bf LEM\_\-ADDR\_\-SIU\_\-1} =  LEM\_\-MASTER $|$ 0x3, 
\par
{\bf LEM\_\-ADDR\_\-EPU\_\-0} =  LEM\_\-MASTER $|$ 0x4, 
\par
{\bf LEM\_\-ADDR\_\-EPU\_\-1} =  LEM\_\-MASTER $|$ 0x5, 
\par
{\bf LEM\_\-ADDR\_\-EPU\_\-2} =  LEM\_\-MASTER $|$ 0x6, 
\par
{\bf LEM\_\-ADDR\_\-MST\_\-BCAST} =  LEM\_\-MASTER $|$ 0x1f
 \}
\begin{CompactList}\small\item\em Enumeration of LATp addresses. \item\end{CompactList}\item 
enum \{ {\bf BCAST} =  0x1F
 \}
\item 
enum \hyperlink{defs_8h_a431}{LEM\_\-PARITY\_\-SELECT} \{ \par
\hyperlink{defs_8h_a431a413}{LEM\_\-PARITY\_\-ODD} =  0, 
\par
\hyperlink{defs_8h_a431a414}{LEM\_\-PARITY\_\-EVEN} =  1
 \}
\begin{CompactList}\small\item\em Options to the parity functions. \item\end{CompactList}\item 
enum \hyperlink{defs_8h_a432}{LEM\_\-PARITY\_\-TYPES} \{ \par
\hyperlink{defs_8h_a432a415}{LEM\_\-PARITY\_\-CMD\_\-STRING} =  0, 
\par
\hyperlink{defs_8h_a432a416}{LEM\_\-PARITY\_\-CMD\_\-PAYLOAD} =  1, 
\par
\hyperlink{defs_8h_a432a417}{LEM\_\-PARITY\_\-ACCESS\_\-DESC} =  2
 \}
\begin{CompactList}\small\item\em Types of parity that can be affected. \item\end{CompactList}\end{CompactItemize}
\subsection*{Functions}
\begin{CompactItemize}
\item 
unsigned long long \hyperlink{defs_8h_a418}{rotate\_\-} (unsigned long long payload)
\begin{CompactList}\small\item\em Switch the payload for the TFE DAC register between physical and logical. \item\end{CompactList}\end{CompactItemize}


\subsection{Detailed Description}
Defines registers and function blocks. 

\begin{Desc}
\item[Author:]James Swain - \href{mailto:jswain@slac.stanford.edu}{\tt jswain@slac.stanford.edu}\end{Desc}


\subsection{Enumeration Type Documentation}
\hypertarget{defs_8h_a431}{
\index{defs.h@{defs.h}!LEM_PARITY_SELECT@{LEM\_\-PARITY\_\-SELECT}}
\index{LEM_PARITY_SELECT@{LEM\_\-PARITY\_\-SELECT}!defs.h@{defs.h}}
\subsubsection[LEM\_\-PARITY\_\-SELECT]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{defs_8h_a431}{LEM\_\-PARITY\_\-SELECT}}}
\label{defs_8h_a431}


Options to the parity functions. 

\begin{Desc}
\item[Enumeration values: ]\par
\begin{description}
\index{LEM_PARITY_ODD@{LEM\_\-PARITY\_\-ODD}!defs.h@{defs.h}}\index{defs.h@{defs.h}!LEM_PARITY_ODD@{LEM\_\-PARITY\_\-ODD}}\item[{\em 
\hypertarget{defs_8h_a431a413}{
{\em LEM\_\-PARITY\_\-ODD}}
\label{defs_8h_a431a413}
}]ODD parity \index{LEM_PARITY_EVEN@{LEM\_\-PARITY\_\-EVEN}!defs.h@{defs.h}}\index{defs.h@{defs.h}!LEM_PARITY_EVEN@{LEM\_\-PARITY\_\-EVEN}}\item[{\em 
\hypertarget{defs_8h_a431a414}{
{\em LEM\_\-PARITY\_\-EVEN}}
\label{defs_8h_a431a414}
}]EVEN parity \end{description}
\end{Desc}

\hypertarget{defs_8h_a432}{
\index{defs.h@{defs.h}!LEM_PARITY_TYPES@{LEM\_\-PARITY\_\-TYPES}}
\index{LEM_PARITY_TYPES@{LEM\_\-PARITY\_\-TYPES}!defs.h@{defs.h}}
\subsubsection[LEM\_\-PARITY\_\-TYPES]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{defs_8h_a432}{LEM\_\-PARITY\_\-TYPES}}}
\label{defs_8h_a432}


Types of parity that can be affected. 

\begin{Desc}
\item[Enumeration values: ]\par
\begin{description}
\index{LEM_PARITY_CMD_STRING@{LEM\_\-PARITY\_\-CMD\_\-STRING}!defs.h@{defs.h}}\index{defs.h@{defs.h}!LEM_PARITY_CMD_STRING@{LEM\_\-PARITY\_\-CMD\_\-STRING}}\item[{\em 
\hypertarget{defs_8h_a432a415}{
{\em LEM\_\-PARITY\_\-CMD\_\-STRING}}
\label{defs_8h_a432a415}
}]Command string parity \index{LEM_PARITY_CMD_PAYLOAD@{LEM\_\-PARITY\_\-CMD\_\-PAYLOAD}!defs.h@{defs.h}}\index{defs.h@{defs.h}!LEM_PARITY_CMD_PAYLOAD@{LEM\_\-PARITY\_\-CMD\_\-PAYLOAD}}\item[{\em 
\hypertarget{defs_8h_a432a416}{
{\em LEM\_\-PARITY\_\-CMD\_\-PAYLOAD}}
\label{defs_8h_a432a416}
}]Command payload parity \index{LEM_PARITY_ACCESS_DESC@{LEM\_\-PARITY\_\-ACCESS\_\-DESC}!defs.h@{defs.h}}\index{defs.h@{defs.h}!LEM_PARITY_ACCESS_DESC@{LEM\_\-PARITY\_\-ACCESS\_\-DESC}}\item[{\em 
\hypertarget{defs_8h_a432a417}{
{\em LEM\_\-PARITY\_\-ACCESS\_\-DESC}}
\label{defs_8h_a432a417}
}]Access desciptor parity \end{description}
\end{Desc}



\subsection{Function Documentation}
\hypertarget{defs_8h_a418}{
\index{defs.h@{defs.h}!rotate_@{rotate\_\-}}
\index{rotate_@{rotate\_\-}!defs.h@{defs.h}}
\subsubsection[rotate\_\-]{\setlength{\rightskip}{0pt plus 5cm}unsigned long long rotate\_\- (unsigned long long {\em payload})\hspace{0.3cm}{\tt  \mbox{[}inline, static\mbox{]}}}}
\label{defs_8h_a418}


Switch the payload for the TFE DAC register between physical and logical. 

\begin{Desc}
\item[Parameters:]
\begin{description}
\item[{\em payload}]The payload of the register load/read \end{description}
\end{Desc}
\begin{Desc}
\item[Returns:]Rotated payload \end{Desc}
