\hypertarget{SSRSIM_8c}{
\section{SSRSIM.c File Reference}
\label{SSRSIM_8c}\index{SSRSIM.c@{SSRSIM.c}}
}
Module to simulated SSR data output from ISIS.  


{\tt \#include \char`\"{}PBS/PBS.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/FPA.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/MBA.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/WUT.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/TMR.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/QI.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/FORK.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/SPIN.h\char`\"{}}\par
{\tt \#include \char`\"{}PBS/TASK.h\char`\"{}}\par
{\tt \#include \char`\"{}MSG/MSG\_\-pubdefs.h\char`\"{}}\par
{\tt \#include \char`\"{}LCBT/SSRSIM\_\-msgs.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-init.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-dispatch.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-pci.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-io.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-err.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-latp.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-stats.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-bulk.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LCB\_\-bulk\_\-def.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-addr.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-addr\_\-def.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-cmd.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-init.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-rst.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-sync.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-sys.h\char`\"{}}\par
{\tt \#include \char`\"{}LCB/LIOX\_\-util.h\char`\"{}}\par
{\tt \#include \char`\"{}SSRSIM.h\char`\"{}}\par
{\tt \#include \char`\"{}RND.h\char`\"{}}\par
{\tt \#include $<$stdio.h$>$}\par
{\tt \#include $<$stdlib.h$>$}\par
{\tt \#include $<$string.h$>$}\par
{\tt \#include $<$unistd.h$>$}\par


Include dependency graph for SSRSIM.c:\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=137pt]{SSRSIM_8c__incl}
\end{center}
\end{figure}
\subsection*{Functions}
\begin{CompactItemize}
\item 
void \hyperlink{SSRSIM_8c_a0}{SSRSIM\_\-init} (x\-LCBx lcb, int send\-Task\-Pri, int latp\-Addr, int app\-Id)
\begin{CompactList}\small\item\em init the SSR simulate module \item\end{CompactList}\item 
void \hyperlink{SSRSIM_8c_a1}{SSRSIM\_\-release} ()
\begin{CompactList}\small\item\em shutdown the SSR simulate module \item\end{CompactList}\item 
int \hyperlink{SSRSIM_8c_a2}{SSRSIM\_\-set\-Parm} (\hyperlink{TDATA_8h_a0}{TDATA\_\-DTEST} data\-Type, int data\-Parm, int t\-Duration, int req\-Packet\-Size32, int evt\-Period, int $\ast$actual\-Packet\-Size32)
\begin{CompactList}\small\item\em Setup and start data simulated SSR data from ISIS. \item\end{CompactList}\item 
void \hyperlink{SSRSIM_8c_a3}{SSRSIM\_\-stop} ()
\begin{CompactList}\small\item\em stop SSR simulate data output \item\end{CompactList}\item 
void \hyperlink{SSRSIM_8c_a4}{SSRSIM\_\-stats} ()
\begin{CompactList}\small\item\em print stats \item\end{CompactList}\item 
void \hyperlink{SSRSIM_8c_a5}{SSRSIM\_\-stats\-Reset} ()
\begin{CompactList}\small\item\em reset stats for printing \item\end{CompactList}\item 
void \hyperlink{SSRSIM_8c_a6}{SSRSIM\_\-stats\-Get\-Errors} (int $\ast$timer\-Miss, int $\ast$dma\-Errs, int $\ast$item\-Errs, int $\ast$back\-Pres\-Errs)
\begin{CompactList}\small\item\em get error stats \item\end{CompactList}\end{CompactItemize}


\subsection{Detailed Description}
Module to simulated SSR data output from ISIS. 

\begin{Desc}
\item[Author:]Ed Bacho -- \href{mailto:ebacho@slac.stanford.edu}{\tt ebacho@slac.stanford.edu} \end{Desc}
Basic algorithm:

To start: Pulls all buffs from Freelist (FPA), sends buff to fork task Forktask load up buffs with data and put in Ready\-List QUE Enable timer, if $<$ 1 KHz datarate timer determined by datarate, one event per dma if $>$ 1 KHz datarate time is 1 m\-Sec, each DMA has N events To Stop: Disable timer Pull all buffers from the Ready\-List QUE and puts back in Freelist (FPA)

Normal Operation Timer - runs every N milli\-Sec, pulls buff from Ready\-List and sends to LCB Lcb\-Rst\-Callback - when LCB finishes, buffer is send to fork task Fork\-Task - fills buffer with new data and puts it in Ready\-List

\subsection{Function Documentation}
\hypertarget{SSRSIM_8c_a0}{
\index{SSRSIM.c@{SSRSIM.c}!SSRSIM_init@{SSRSIM\_\-init}}
\index{SSRSIM_init@{SSRSIM\_\-init}!SSRSIM.c@{SSRSIM.c}}
\subsubsection[SSRSIM\_\-init]{\setlength{\rightskip}{0pt plus 5cm}SSRSIM\_\-init (x\-LCBx {\em lcb}, int {\em send\-Task\-Pri}, int {\em latp\-Addr}, int {\em app\-Id})}}
\label{SSRSIM_8c_a0}


init the SSR simulate module 

\begin{Desc}
\item[Parameters:]
\begin{description}
\item[{\em lcb}]LCB handle \item[{\em send\-Task\-Pri}]priority of task created to send data to LCB, 0=default of 60 \item[{\em latp\-Addr}]address of unit to send data to \item[{\em app\-Id}]app\-Id to be used within the CCSDS header \end{description}
\end{Desc}
\begin{Desc}
\item[Returns:]none \end{Desc}


Here is the call graph for this function:\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=147pt]{SSRSIM_8c_a0_cgraph}
\end{center}
\end{figure}
\hypertarget{SSRSIM_8c_a1}{
\index{SSRSIM.c@{SSRSIM.c}!SSRSIM_release@{SSRSIM\_\-release}}
\index{SSRSIM_release@{SSRSIM\_\-release}!SSRSIM.c@{SSRSIM.c}}
\subsubsection[SSRSIM\_\-release]{\setlength{\rightskip}{0pt plus 5cm}SSRSIM\_\-release ()}}
\label{SSRSIM_8c_a1}


shutdown the SSR simulate module 

\begin{Desc}
\item[Returns:]none \end{Desc}


Here is the call graph for this function:\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=129pt]{SSRSIM_8c_a1_cgraph}
\end{center}
\end{figure}
\hypertarget{SSRSIM_8c_a2}{
\index{SSRSIM.c@{SSRSIM.c}!SSRSIM_setParm@{SSRSIM\_\-setParm}}
\index{SSRSIM_setParm@{SSRSIM\_\-setParm}!SSRSIM.c@{SSRSIM.c}}
\subsubsection[SSRSIM\_\-setParm]{\setlength{\rightskip}{0pt plus 5cm}int SSRSIM\_\-set\-Parm (\hyperlink{TDATA_8h_a0}{TDATA\_\-DTEST} {\em data\-Type}, int {\em data\-Parm}, int {\em t\-Duration}, int {\em req\-Packet\-Size32}, int {\em evt\-Period}, int $\ast$ {\em actual\-Packet\-Size32})}}
\label{SSRSIM_8c_a2}


Setup and start data simulated SSR data from ISIS. 

\begin{Desc}
\item[Parameters:]
\begin{description}
\item[{\em data\-Type}]data pattern to load into buffer \item[{\em data\-Parm}]parameter associated with given data\-Type \item[{\em t\-Duration}]time in secs to output data, -1=forever \item[{\em req\-Packet\-Size32}]desired packet size, 8 to 1020, 0=random size \item[{\em evt\-Period}]time in micro\-Sec between events, 100 (10KHz) to 30000000 (1/30 Hz) \item[{\em actual\-Packet\-Size32}]returned packet size adjusted down if needed to achieve given evt\-Period within LCB bandwidth constraints, max size is returned if req\-Packet\-SIze=0 for random \end{description}
\end{Desc}
\begin{Desc}
\item[Returns:]status 0=sucess \end{Desc}


Here is the call graph for this function:\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=132pt]{SSRSIM_8c_a2_cgraph}
\end{center}
\end{figure}
\hypertarget{SSRSIM_8c_a4}{
\index{SSRSIM.c@{SSRSIM.c}!SSRSIM_stats@{SSRSIM\_\-stats}}
\index{SSRSIM_stats@{SSRSIM\_\-stats}!SSRSIM.c@{SSRSIM.c}}
\subsubsection[SSRSIM\_\-stats]{\setlength{\rightskip}{0pt plus 5cm}SSRSIM\_\-stats ()}}
\label{SSRSIM_8c_a4}


print stats 

\begin{Desc}
\item[Returns:]none \end{Desc}
\hypertarget{SSRSIM_8c_a6}{
\index{SSRSIM.c@{SSRSIM.c}!SSRSIM_statsGetErrors@{SSRSIM\_\-statsGetErrors}}
\index{SSRSIM_statsGetErrors@{SSRSIM\_\-statsGetErrors}!SSRSIM.c@{SSRSIM.c}}
\subsubsection[SSRSIM\_\-statsGetErrors]{\setlength{\rightskip}{0pt plus 5cm}void SSRSIM\_\-stats\-Get\-Errors (int $\ast$ {\em timer\-Miss}, int $\ast$ {\em dma\-Errs}, int $\ast$ {\em item\-Errs}, int $\ast$ {\em back\-Pres\-Errs})}}
\label{SSRSIM_8c_a6}


get error stats 

\begin{Desc}
\item[Parameters:]
\begin{description}
\item[{\em timer\-Miss}]if not NULL, return timer misses which indicates no buffer to send to LCB \item[{\em dma\-Errs}]if not NULL, return dma errs which indicate LCB did not process a list so list is probably incorrect or LCB problems \item[{\em item\-Errs}]if not NULL, return item error which are errors on one item in list, probably indicate cannot talk to destination of item \item[{\em back\-Pres\-Errs}]if not NULL, return backpressure errors which indicate timeout due to pause line from EBM being set \end{description}
\end{Desc}
\begin{Desc}
\item[Returns:]none \end{Desc}
\hypertarget{SSRSIM_8c_a5}{
\index{SSRSIM.c@{SSRSIM.c}!SSRSIM_statsReset@{SSRSIM\_\-statsReset}}
\index{SSRSIM_statsReset@{SSRSIM\_\-statsReset}!SSRSIM.c@{SSRSIM.c}}
\subsubsection[SSRSIM\_\-statsReset]{\setlength{\rightskip}{0pt plus 5cm}SSRSIM\_\-stats\-Reset ()}}
\label{SSRSIM_8c_a5}


reset stats for printing 

\begin{Desc}
\item[Returns:]none \end{Desc}
\hypertarget{SSRSIM_8c_a3}{
\index{SSRSIM.c@{SSRSIM.c}!SSRSIM_stop@{SSRSIM\_\-stop}}
\index{SSRSIM_stop@{SSRSIM\_\-stop}!SSRSIM.c@{SSRSIM.c}}
\subsubsection[SSRSIM\_\-stop]{\setlength{\rightskip}{0pt plus 5cm}void SSRSIM\_\-stop ()}}
\label{SSRSIM_8c_a3}


stop SSR simulate data output 

\begin{Desc}
\item[Returns:]none \end{Desc}