\hypertarget{LCB_8h}{
\section{LCB.h File Reference}
\label{LCB_8h}\index{LCB.h@{LCB.h}}
}
Defines all the constants and public structures of the LCB. 

{\tt \#include \char`\"{}PBI/Endianness.h\char`\"{}}\par


Include dependency graph for LCB.h:\begin{figure}[H]
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\leavevmode
\includegraphics[width=113pt]{LCB_8h__incl}
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\end{figure}


This graph shows which files directly or indirectly include this file:\begin{figure}[H]
\begin{center}
\leavevmode
\includegraphics[width=132pt]{LCB_8h__dep__incl}
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\subsection*{Data Structures}
\begin{CompactItemize}
\item 
struct \hyperlink{struct__LCB__cmd__dsc__bf}{\_\-LCB\_\-cmd\_\-dsc\_\-bf}
\begin{CompactList}\small\item\em Map of LCB command (request,export) descriptor. \item\end{CompactList}\item 
union \hyperlink{union__LCB__cmd__dsc}{\_\-LCB\_\-cmd\_\-dsc}
\begin{CompactList}\small\item\em Union of the command (request, export) descriptor with an uninterpretted 32-bit integer. \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__rst__dsc__bfd}{\_\-LCB\_\-rst\_\-dsc\_\-bfd}
\begin{CompactList}\small\item\em Map of LCB result descriptor. \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__rst__dsc__bf}{\_\-LCB\_\-rst\_\-dsc\_\-bf}
\begin{CompactList}\small\item\em Map of LCB result descriptor. \item\end{CompactList}\item 
union \hyperlink{union__LCB__rst__dsc}{\_\-LCB\_\-rst\_\-dsc}
\begin{CompactList}\small\item\em union for 32-bit Result Descriptor \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__evt__dsc__bf}{\_\-LCB\_\-evt\_\-dsc\_\-bf}
\begin{CompactList}\small\item\em Map of LCB event result descriptor with broken down status fields. \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__evt__dsc__bfe}{\_\-LCB\_\-evt\_\-dsc\_\-bfe}
\begin{CompactList}\small\item\em Map of LCB event result descriptor with error field as a single field (receive and transfer status combined). \item\end{CompactList}\item 
union \hyperlink{union__LCB__evt__dsc}{\_\-LCB\_\-evt\_\-dsc}
\begin{CompactList}\small\item\em union for 32-bit Event Descriptor \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__prb}{\_\-LCB\_\-prb}
\begin{CompactList}\small\item\em Map of the LCB memory space PCI register block. \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__pci__csr__bf}{\_\-LCB\_\-pci\_\-csr\_\-bf}
\begin{CompactList}\small\item\em Map of the Memory space CSR pciister. \item\end{CompactList}\item 
union \hyperlink{union__LCB__pci__csr}{\_\-LCB\_\-pci\_\-csr}
\begin{CompactList}\small\item\em union for 32-bit CSR register \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__pci__irq__sets}{\_\-LCB\_\-pci\_\-irq\_\-sets}
\begin{CompactList}\small\item\em Map of the Memory space irq enable register, by sets. \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__pci__irq__bf}{\_\-LCB\_\-pci\_\-irq\_\-bf}
\begin{CompactList}\small\item\em Map of the Memory space irq register. \item\end{CompactList}\item 
union \hyperlink{union__LCB__pci__irq}{\_\-LCB\_\-pci\_\-irq}
\begin{CompactList}\small\item\em union for 32-bit irq register \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__pci__fabric__select__bf}{\_\-LCB\_\-pci\_\-fabric\_\-select\_\-bf}
\begin{CompactList}\small\item\em Bit field representation of the fabric select register. \item\end{CompactList}\item 
struct \hyperlink{struct__LCB__pci__fabric__select}{\_\-LCB\_\-pci\_\-fabric\_\-select}
\begin{CompactList}\small\item\em Bit field representation of the fabric select register. \item\end{CompactList}\end{CompactItemize}
\subsection*{Defines}
\begin{CompactItemize}
\item 
\hypertarget{LCB_8h_a0}{
\#define \hyperlink{LCB_8h_a0}{LCB\_\-PCI\_\-VENDOR\_\-ID}~( 0x11AA )}
\label{LCB_8h_a0}

\begin{CompactList}\small\item\em 16-bit PCI Vendor ID for LCB \item\end{CompactList}\item 
\hypertarget{LCB_8h_a1}{
\#define \hyperlink{LCB_8h_a1}{LCB\_\-PCI\_\-DEVICE\_\-ID}~( 0x0845 )}
\label{LCB_8h_a1}

\begin{CompactList}\small\item\em 16-bit PCI Device ID for LCB \item\end{CompactList}\item 
\hypertarget{LCB_8h_a2}{
\#define \hyperlink{LCB_8h_a2}{LCB\_\-REQUEST\_\-LIST\_\-ALIGN}~( 1 $<$$<$ 9 )}
\label{LCB_8h_a2}

\begin{CompactList}\small\item\em Necessary byte alignment for a request list. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a3}{
\#define \hyperlink{LCB_8h_a3}{LCB\_\-RESULT\_\-LIST\_\-ALIGN}~( 1 $<$$<$ 5 )}
\label{LCB_8h_a3}

\begin{CompactList}\small\item\em Necessary byte alignment for a result list. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a4}{
\#define \hyperlink{LCB_8h_a4}{LCB\_\-REQUEST\_\-QUEUE\_\-FULL}~0xffffffff}
\label{LCB_8h_a4}

\begin{CompactList}\small\item\em Value returned when the request queue is full, {\em i.e\/}. unable to accept a new request (command) list. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a5}{
\#define \hyperlink{LCB_8h_a5}{LCB\_\-REQUEST\_\-QUEUE\_\-NOT\_\-EMPTY}~0x00000000}
\label{LCB_8h_a5}

\begin{CompactList}\small\item\em Value returned when the request queue is not empty, {\em i.e\/}. the request queue has outstanding transactions. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a6}{
\#define \hyperlink{LCB_8h_a6}{LCB\_\-RESULT\_\-QUEUE\_\-EMPTY}~0xfffffff7}
\label{LCB_8h_a6}

\begin{CompactList}\small\item\em Value returned when the result queue is read when empty. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a7}{
\#define \hyperlink{LCB_8h_a7}{LCB\_\-EVENT\_\-QUEUE\_\-EMPTY}~0x7fffffff}
\label{LCB_8h_a7}

\begin{CompactList}\small\item\em Value returned when the event queue is read when empty. \item\end{CompactList}\item 
\#define \hyperlink{LCB_8h_a8}{LCB\_\-REQUEST\_\-LIST\_\-MAX}~(4088/sizeof(int))
\begin{CompactList}\small\item\em The maximum length, in 32-bit integers of a command list. \item\end{CompactList}\item 
\#define \hyperlink{LCB_8h_a9}{LCB\_\-EVT\_\-PAYLOAD\_\-MAX}~(255$\ast$16)
\begin{CompactList}\small\item\em The maximum number of bytes that can be sent in a LCB-to-LCB transfer. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a10}{
\#define \hyperlink{LCB_8h_a10}{LCB\_\-EVENT\_\-BUFFER\_\-SIZE}~( 512 $\ast$ 1024 )}
\label{LCB_8h_a10}

\begin{CompactList}\small\item\em Size, in bytes, of the LCB event circular buffer. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a11}{
\#define \hyperlink{LCB_8h_a11}{LCB\_\-EVENT\_\-BUFFER\_\-GUARD}~( 128 $\ast$ 1024 )}
\label{LCB_8h_a11}

\begin{CompactList}\small\item\em Size, in bytes, of the LCB event circular buffer guard area. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a12}{
\#define \hyperlink{LCB_8h_a12}{LCB\_\-EVENT\_\-BUFFER\_\-TOTAL}~(LCB\_\-EVENT\_\-BUFFER\_\-SIZE+LCB\_\-EVENT\_\-BUFFER\_\-GUARD)}
\label{LCB_8h_a12}

\begin{CompactList}\small\item\em Size, in bytes, of the LCB event circular buffer + guard area. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a13}{
\#define \hyperlink{LCB_8h_a13}{LCB\_\-EVENT\_\-BUFFER\_\-ALIGN}~(  1  $<$$<$  20 )}
\label{LCB_8h_a13}

\begin{CompactList}\small\item\em Alignment factor, in bytes. \item\end{CompactList}\item 
\#define \hyperlink{LCB_8h_a14}{LCB\_\-EVT\_\-PROTO\_\-CNT}~4
\begin{CompactList}\small\item\em Number of protocols supported by the event fabric. \item\end{CompactList}\item 
\#define \hyperlink{LCB_8h_a15}{LCB\_\-EVT\_\-PAD\_\-SIZE}~32
\begin{CompactList}\small\item\em The size, in bytes, of the pad area left before each packet in the event ring buffer. \item\end{CompactList}\end{CompactItemize}
\subsection*{Typedefs}
\begin{CompactItemize}
\item 
\hypertarget{LCB_8h_a16}{
typedef enum \hyperlink{LCB_8h_a251}{\_\-LCB\_\-IRQ\_\-COND} \hyperlink{LCB_8h_a16}{LCB\_\-IRQ\_\-COND}}
\label{LCB_8h_a16}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-IRQ\_\-COND. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a17}{
typedef enum \hyperlink{LCB_8h_a252}{\_\-LCB\_\-CMD\_\-DSC\_\-S} \hyperlink{LCB_8h_a17}{LCB\_\-CMD\_\-DSC\_\-S}}
\label{LCB_8h_a17}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-CMD\_\-DSC\_\-S\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a18}{
typedef enum \hyperlink{LCB_8h_a253}{\_\-LCB\_\-CMD\_\-DSC\_\-V} \hyperlink{LCB_8h_a18}{LCB\_\-CMD\_\-DSC\_\-V}}
\label{LCB_8h_a18}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-CMD\_\-DSC\_\-V\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a19}{
typedef enum \hyperlink{LCB_8h_a254}{\_\-LCB\_\-CMD\_\-DSC\_\-M} \hyperlink{LCB_8h_a19}{LCB\_\-CMD\_\-DSC\_\-M}}
\label{LCB_8h_a19}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-CMD\_\-DSC\_\-M\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a20}{
typedef \hyperlink{struct__LCB__cmd__dsc__bf}{\_\-LCB\_\-cmd\_\-dsc\_\-bf} \hyperlink{LCB_8h_a20}{LCB\_\-cmd\_\-dsc\_\-bf}}
\label{LCB_8h_a20}

\begin{CompactList}\small\item\em Typedef of struct {\em \hyperlink{struct__LCB__cmd__dsc__bf}{\_\-LCB\_\-cmd\_\-dsc\_\-bf}\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a21}{
typedef \hyperlink{union__LCB__cmd__dsc}{\_\-LCB\_\-cmd\_\-dsc} \hyperlink{LCB_8h_a21}{LCB\_\-cmd\_\-dsc}}
\label{LCB_8h_a21}

\begin{CompactList}\small\item\em Typedef for union {\em \hyperlink{union__LCB__cmd__dsc}{\_\-LCB\_\-cmd\_\-dsc}\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a22}{
typedef enum \hyperlink{LCB_8h_a255}{\_\-LCB\_\-RST\_\-DSC\_\-S} \hyperlink{LCB_8h_a22}{LCB\_\-RST\_\-DSC\_\-S}}
\label{LCB_8h_a22}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-RST\_\-DSC\_\-S\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a23}{
typedef enum \hyperlink{LCB_8h_a256}{\_\-LCB\_\-RST\_\-DSC\_\-V} \hyperlink{LCB_8h_a23}{LCB\_\-RST\_\-DSC\_\-V}}
\label{LCB_8h_a23}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-RST\_\-DSC\_\-V\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a24}{
typedef enum \hyperlink{LCB_8h_a257}{\_\-LCB\_\-RST\_\-DSC\_\-M} \hyperlink{LCB_8h_a24}{LCB\_\-RST\_\-DSC\_\-M}}
\label{LCB_8h_a24}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-RST\_\-DSC\_\-M\/}. \item\end{CompactList}\item 
typedef \hyperlink{struct__LCB__rst__dsc__bfd}{\_\-LCB\_\-rst\_\-dsc\_\-bfd} \hyperlink{LCB_8h_a25}{LCB\_\-rst\_\-dsc\_\-bfd}
\begin{CompactList}\small\item\em Typedef for structure \hyperlink{struct__LCB__rst__dsc__bfd}{\_\-LCB\_\-rst\_\-dsc\_\-bfd}. \item\end{CompactList}\item 
typedef \hyperlink{struct__LCB__rst__dsc__bf}{\_\-LCB\_\-rst\_\-dsc\_\-bf} \hyperlink{LCB_8h_a26}{LCB\_\-rst\_\-dsc\_\-bf}
\begin{CompactList}\small\item\em Typedef for structure \hyperlink{struct__LCB__rst__dsc__bf}{\_\-LCB\_\-rst\_\-dsc\_\-bf}. \item\end{CompactList}\item 
typedef \hyperlink{union__LCB__rst__dsc}{\_\-LCB\_\-rst\_\-dsc} \hyperlink{LCB_8h_a27}{LCB\_\-rst\_\-dsc}
\begin{CompactList}\small\item\em typedef for union \hyperlink{union__LCB__rst__dsc}{\_\-LCB\_\-rst\_\-dsc} \item\end{CompactList}\item 
\hypertarget{LCB_8h_a28}{
typedef enum \hyperlink{LCB_8h_a258}{\_\-LCB\_\-EVT\_\-DSC\_\-S} \hyperlink{LCB_8h_a28}{LCB\_\-EVT\_\-DSC\_\-S}}
\label{LCB_8h_a28}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-EVT\_\-DSC\_\-S\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a29}{
typedef enum \hyperlink{LCB_8h_a259}{\_\-LCB\_\-EVT\_\-DSC\_\-V} \hyperlink{LCB_8h_a29}{LCB\_\-EVT\_\-DSC\_\-V}}
\label{LCB_8h_a29}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-EVT\_\-DSC\_\-V\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a30}{
typedef enum \hyperlink{LCB_8h_a260}{\_\-LCB\_\-EVT\_\-DSC\_\-M} \hyperlink{LCB_8h_a30}{LCB\_\-EVT\_\-DSC\_\-M}}
\label{LCB_8h_a30}

\begin{CompactList}\small\item\em Typedef for enum {\em \_\-LCB\_\-EVT\_\-DSC\_\-M\/}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a31}{
typedef \hyperlink{struct__LCB__evt__dsc__bf}{\_\-LCB\_\-evt\_\-dsc\_\-bf} \hyperlink{LCB_8h_a31}{LCB\_\-evt\_\-dsc\_\-bf}}
\label{LCB_8h_a31}

\begin{CompactList}\small\item\em typedef for struct \hyperlink{struct__LCB__evt__dsc__bf}{\_\-LCB\_\-evt\_\-dsc\_\-bf} \item\end{CompactList}\item 
\hypertarget{LCB_8h_a32}{
typedef \hyperlink{struct__LCB__evt__dsc__bfe}{\_\-LCB\_\-evt\_\-dsc\_\-bfe} \hyperlink{LCB_8h_a32}{LCB\_\-evt\_\-dsc\_\-bfe}}
\label{LCB_8h_a32}

\begin{CompactList}\small\item\em typedef for struct \hyperlink{struct__LCB__evt__dsc__bfe}{\_\-LCB\_\-evt\_\-dsc\_\-bfe} \item\end{CompactList}\item 
\hypertarget{LCB_8h_a33}{
typedef \hyperlink{union__LCB__evt__dsc}{\_\-LCB\_\-evt\_\-dsc} \hyperlink{LCB_8h_a33}{LCB\_\-evt\_\-dsc}}
\label{LCB_8h_a33}

\begin{CompactList}\small\item\em typedef for union \hyperlink{union__LCB__evt__dsc}{\_\-LCB\_\-evt\_\-dsc} \item\end{CompactList}\item 
\hypertarget{LCB_8h_a34}{
typedef enum \hyperlink{LCB_8h_a261}{\_\-LCB\_\-RST\_\-ERR\_\-XFR} \hyperlink{LCB_8h_a34}{LCB\_\-RST\_\-ERR\_\-XFR}}
\label{LCB_8h_a34}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-RST\_\-ERR\_\-XFR. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a35}{
typedef enum \hyperlink{LCB_8h_a262}{\_\-LCB\_\-RST\_\-ERR\_\-RCV} \hyperlink{LCB_8h_a35}{LCB\_\-RST\_\-ERR\_\-RCV}}
\label{LCB_8h_a35}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-RST\_\-ERR\_\-RCV. \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a263}{\_\-LCB\_\-EVT\_\-ERR\_\-XFR} \hyperlink{LCB_8h_a36}{LCB\_\-EVT\_\-ERR\_\-XFR}
\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-EVT\_\-ERR\_\-XFR. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a37}{
typedef enum \hyperlink{LCB_8h_a264}{\_\-LCB\_\-EVT\_\-ERR\_\-RCV} \hyperlink{LCB_8h_a37}{LCB\_\-EVT\_\-ERR\_\-RCV}}
\label{LCB_8h_a37}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-EVT\_\-ERR\_\-RCV. \item\end{CompactList}\item 
typedef \hyperlink{struct__LCB__prb}{\_\-LCB\_\-prb} \hyperlink{LCB_8h_a38}{LCB\_\-prb}
\begin{CompactList}\small\item\em Typedef for struct. \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a265}{\_\-LCB\_\-PCI\_\-CSR\_\-S} \hyperlink{LCB_8h_a39}{LCB\_\-PCI\_\-CSR\_\-S}
\begin{CompactList}\small\item\em Typedef for enum. \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a266}{\_\-LCB\_\-PCI\_\-CSR\_\-V} \hyperlink{LCB_8h_a40}{LCB\_\-PCI\_\-CSR\_\-V}
\begin{CompactList}\small\item\em Typedef for enum. \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a267}{\_\-LCB\_\-PCI\_\-CSR\_\-M} \hyperlink{LCB_8h_a41}{LCB\_\-PCI\_\-CSR\_\-M}
\begin{CompactList}\small\item\em Typedef for enum. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a42}{
typedef enum \hyperlink{LCB_8h_a268}{\_\-LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M} \hyperlink{LCB_8h_a42}{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M}}
\label{LCB_8h_a42}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-IRQEVTQUE\_\-M\_\-. \item\end{CompactList}\item 
typedef \hyperlink{struct__LCB__pci__csr__bf}{\_\-LCB\_\-pci\_\-csr\_\-bf} \hyperlink{LCB_8h_a43}{LCB\_\-pci\_\-csr\_\-bf}
\begin{CompactList}\small\item\em Typedef for struct. \item\end{CompactList}\item 
typedef \hyperlink{union__LCB__pci__csr}{\_\-LCB\_\-pci\_\-csr} \hyperlink{LCB_8h_a44}{LCB\_\-pci\_\-csr}
\begin{CompactList}\small\item\em typedef for union \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a269}{\_\-LCB\_\-IRQ\_\-K} \hyperlink{LCB_8h_a45}{LCB\_\-IRQ\_\-K}
\begin{CompactList}\small\item\em Typedef for the enum \_\-LCB\_\-IRQ\_\-K. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a46}{
typedef enum \hyperlink{LCB_8h_a270}{\_\-LCB\_\-IRQ\_\-M} \hyperlink{LCB_8h_a46}{LCB\_\-IRQ\_\-M}}
\label{LCB_8h_a46}

\begin{CompactList}\small\item\em Typedef for the enum \_\-LCB\_\-IRQ\_\-M. \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a271}{\_\-LCB\_\-PCI\_\-IRQ\_\-S} \hyperlink{LCB_8h_a47}{LCB\_\-PCI\_\-IRQ\_\-S}
\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-IRQ\_\-S. \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a272}{\_\-LCB\_\-PCI\_\-IRQ\_\-V} \hyperlink{LCB_8h_a48}{LCB\_\-PCI\_\-IRQ\_\-V}
\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-IRQ\_\-V. \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a273}{\_\-LCB\_\-PCI\_\-IRQ\_\-M} \hyperlink{LCB_8h_a49}{LCB\_\-PCI\_\-IRQ\_\-M}
\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-IRQ\_\-M. \item\end{CompactList}\item 
typedef \hyperlink{struct__LCB__pci__irq__sets}{\_\-LCB\_\-pci\_\-irq\_\-sets} \hyperlink{LCB_8h_a50}{LCB\_\-pci\_\-irq\_\-sets}
\begin{CompactList}\small\item\em Typedef for struct \hyperlink{struct__LCB__pci__irq__sets}{\_\-LCB\_\-pci\_\-irq\_\-sets}. \item\end{CompactList}\item 
typedef \hyperlink{struct__LCB__pci__irq__bf}{\_\-LCB\_\-pci\_\-irq\_\-bf} \hyperlink{LCB_8h_a51}{LCB\_\-pci\_\-irq\_\-bf}
\begin{CompactList}\small\item\em Typedef for struct \hyperlink{struct__LCB__pci__irq__bf}{\_\-LCB\_\-pci\_\-irq\_\-bf}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a52}{
typedef \hyperlink{union__LCB__pci__irq}{\_\-LCB\_\-pci\_\-irq} \hyperlink{LCB_8h_a52}{LCB\_\-pci\_\-irq}}
\label{LCB_8h_a52}

\begin{CompactList}\small\item\em typedef for union \hyperlink{union__LCB__pci__irq}{\_\-LCB\_\-pci\_\-irq} \item\end{CompactList}\item 
typedef enum \hyperlink{LCB_8h_a274}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH} \hyperlink{LCB_8h_a53}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH}
\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a54}{
typedef enum \hyperlink{LCB_8h_a275}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S} \hyperlink{LCB_8h_a54}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S}}
\label{LCB_8h_a54}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a55}{
typedef enum \hyperlink{LCB_8h_a276}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V} \hyperlink{LCB_8h_a55}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V}}
\label{LCB_8h_a55}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a56}{
typedef enum \hyperlink{LCB_8h_a277}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M} \hyperlink{LCB_8h_a56}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M}}
\label{LCB_8h_a56}

\begin{CompactList}\small\item\em Typedef for enum \_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a57}{
typedef \hyperlink{struct__LCB__pci__fabric__select__bf}{\_\-LCB\_\-pci\_\-fabric\_\-select\_\-bf} \hyperlink{LCB_8h_a57}{LCB\_\-pci\_\-fabric\_\-select\_\-bf}}
\label{LCB_8h_a57}

\begin{CompactList}\small\item\em Typedef for struct \hyperlink{struct__LCB__pci__fabric__select__bf}{\_\-LCB\_\-pci\_\-fabric\_\-select\_\-bf}. \item\end{CompactList}\item 
\hypertarget{LCB_8h_a58}{
typedef \hyperlink{struct__LCB__pci__fabric__select}{\_\-LCB\_\-pci\_\-fabric\_\-select} \hyperlink{LCB_8h_a58}{LCB\_\-pci\_\-fabric\_\-select}}
\label{LCB_8h_a58}

\begin{CompactList}\small\item\em Typedef for struct \hyperlink{struct__LCB__pci__fabric__select}{\_\-LCB\_\-pci\_\-fabric\_\-select}. \item\end{CompactList}\end{CompactItemize}
\subsection*{Enumerations}
\begin{CompactItemize}
\item 
enum \hyperlink{LCB_8h_a251}{\_\-LCB\_\-IRQ\_\-COND} \{ \par
\hyperlink{LCB_8h_a251a59}{LCB\_\-IRQ\_\-COND\_\-75\_\-FULL} =  0x0, 
\par
\hyperlink{LCB_8h_a251a60}{LCB\_\-IRQ\_\-COND\_\-50\_\-FULL} =  0x1, 
\par
\hyperlink{LCB_8h_a251a61}{LCB\_\-IRQ\_\-COND\_\-25\_\-FULL} =  0x2, 
\par
\hyperlink{LCB_8h_a251a62}{LCB\_\-IRQ\_\-COND\_\-NOT\_\-EMPTY} =  0x3
 \}
\begin{CompactList}\small\item\em Enumerates the Interrupt Request conditions, both event buffer and event queue. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a252}{\_\-LCB\_\-CMD\_\-DSC\_\-S} \{ \par
\hyperlink{LCB_8h_a252a63}{LCB\_\-CMD\_\-DSC\_\-S\_\-LEN} =  9, 
\par
\hyperlink{LCB_8h_a252a64}{LCB\_\-CMD\_\-DSC\_\-S\_\-ADR} =  21
 \}
\begin{CompactList}\small\item\em Size, in bits, of the command descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a253}{\_\-LCB\_\-CMD\_\-DSC\_\-V} \{ \par
\hyperlink{LCB_8h_a253a65}{LCB\_\-CMD\_\-DSC\_\-V\_\-LEN} =  0, 
\par
\hyperlink{LCB_8h_a253a66}{LCB\_\-CMD\_\-DSC\_\-V\_\-ADR} =  9
 \}
\begin{CompactList}\small\item\em Right justified bit offsets of the command descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a254}{\_\-LCB\_\-CMD\_\-DSC\_\-M} \{ \par
\hyperlink{LCB_8h_a254a67}{LCB\_\-CMD\_\-DSC\_\-M\_\-LEN} =  0x000001FF, 
\par
\hyperlink{LCB_8h_a254a68}{LCB\_\-CMD\_\-DSC\_\-M\_\-ADR} =  0x\-FFFFFE00
 \}
\begin{CompactList}\small\item\em Masks of the command descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a255}{\_\-LCB\_\-RST\_\-DSC\_\-S} \{ \par
\hyperlink{LCB_8h_a255a69}{LCB\_\-RST\_\-DSC\_\-S\_\-STATUS} =  3, 
\par
\hyperlink{LCB_8h_a255a70}{LCB\_\-RST\_\-DSC\_\-S\_\-DIR} =  1, 
\par
\hyperlink{LCB_8h_a255a71}{LCB\_\-RST\_\-DSC\_\-S\_\-XSTATUS} =  4, 
\par
\hyperlink{LCB_8h_a255a72}{LCB\_\-RST\_\-DSC\_\-S\_\-ADR} =  28
 \}
\begin{CompactList}\small\item\em Size, in bits, of the result descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a256}{\_\-LCB\_\-RST\_\-DSC\_\-V} \{ \par
\hyperlink{LCB_8h_a256a73}{LCB\_\-RST\_\-DSC\_\-V\_\-STATUS} =  0, 
\par
\hyperlink{LCB_8h_a256a74}{LCB\_\-RST\_\-DSC\_\-V\_\-XSTATUS} =  0, 
\par
\hyperlink{LCB_8h_a256a75}{LCB\_\-RST\_\-DSC\_\-V\_\-DIR} =  3, 
\par
\hyperlink{LCB_8h_a256a76}{LCB\_\-RST\_\-DSC\_\-V\_\-ADR} =  4
 \}
\begin{CompactList}\small\item\em Right justified bit offsets of the result descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a257}{\_\-LCB\_\-RST\_\-DSC\_\-M} \{ \par
\hyperlink{LCB_8h_a257a77}{LCB\_\-RST\_\-DSC\_\-M\_\-STATUS} =  0x00000007, 
\par
\hyperlink{LCB_8h_a257a78}{LCB\_\-RST\_\-DSC\_\-M\_\-DIR} =  0x00000008, 
\par
\hyperlink{LCB_8h_a257a79}{LCB\_\-RST\_\-DSC\_\-M\_\-XSTATUS} =  0x0000000F, 
\par
\hyperlink{LCB_8h_a257a80}{LCB\_\-RST\_\-DSC\_\-M\_\-ADR} =  0x\-FFFFFFF0
 \}
\begin{CompactList}\small\item\em Masks of the result descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a258}{\_\-LCB\_\-EVT\_\-DSC\_\-S} \{ \par
\hyperlink{LCB_8h_a258a81}{LCB\_\-EVT\_\-DSC\_\-S\_\-OFFSET} =  17, 
\par
\hyperlink{LCB_8h_a258a82}{LCB\_\-EVT\_\-DSC\_\-S\_\-LEN} =  10, 
\par
\hyperlink{LCB_8h_a258a83}{LCB\_\-EVT\_\-DSC\_\-S\_\-STATUS} =  5, 
\par
\hyperlink{LCB_8h_a258a84}{LCB\_\-EVT\_\-DSC\_\-S\_\-XSTATUS} =  3, 
\par
\hyperlink{LCB_8h_a258a85}{LCB\_\-EVT\_\-DSC\_\-S\_\-RSTATUS} =  2
 \}
\begin{CompactList}\small\item\em Size, in bits, of the event descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a259}{\_\-LCB\_\-EVT\_\-DSC\_\-V} \{ \par
\hyperlink{LCB_8h_a259a86}{LCB\_\-EVT\_\-DSC\_\-V\_\-OFFSET} =  0, 
\par
\hyperlink{LCB_8h_a259a87}{LCB\_\-EVT\_\-DSC\_\-V\_\-LEN} =  17, 
\par
\hyperlink{LCB_8h_a259a88}{LCB\_\-EVT\_\-DSC\_\-V\_\-STATUS} =  27, 
\par
\hyperlink{LCB_8h_a259a89}{LCB\_\-EVT\_\-DSC\_\-V\_\-XSTATUS} =  27, 
\par
\hyperlink{LCB_8h_a259a90}{LCB\_\-EVT\_\-DSC\_\-V\_\-RSTATUS} =  30
 \}
\begin{CompactList}\small\item\em Right justified bit offsets of the event descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a260}{\_\-LCB\_\-EVT\_\-DSC\_\-M} \{ \par
\hyperlink{LCB_8h_a260a91}{LCB\_\-EVT\_\-DSC\_\-M\_\-OFFSET} =  0x0001FFFF, 
\par
\hyperlink{LCB_8h_a260a92}{LCB\_\-EVT\_\-DSC\_\-M\_\-LEN} =  0x07FE0000, 
\par
\hyperlink{LCB_8h_a260a93}{LCB\_\-EVT\_\-DSC\_\-M\_\-STATUS} =  0x\-F8000000, 
\par
\hyperlink{LCB_8h_a260a94}{LCB\_\-EVT\_\-DSC\_\-M\_\-XSTATUS} =  0x38000000, 
\par
\hyperlink{LCB_8h_a260a95}{LCB\_\-EVT\_\-DSC\_\-M\_\-RSTATUS} =  0x\-C0000000
 \}
\begin{CompactList}\small\item\em Masks of the event descriptor fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a261}{\_\-LCB\_\-RST\_\-ERR\_\-XFR} \{ \par
\hyperlink{LCB_8h_a261a96}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-SUCCESS} =  0, 
\par
\hyperlink{LCB_8h_a261a97}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-MASTER\_\-ABORT} =  1, 
\par
\hyperlink{LCB_8h_a261a98}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-PARITY\_\-ERROR} =  2, 
\par
\hyperlink{LCB_8h_a261a99}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-TARGET\_\-ABORT} =  3, 
\par
\hyperlink{LCB_8h_a261a100}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-4} =  4, 
\par
\hyperlink{LCB_8h_a261a101}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-BUFFER\_\-EMPTY} =  5, 
\par
\hyperlink{LCB_8h_a261a102}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-6} =  6, 
\par
\hyperlink{LCB_8h_a261a103}{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-Q\_\-EMPTY} =  7, 
\par
\hyperlink{LCB_8h_a261a104}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-SUCCESS} =  8, 
\par
\hyperlink{LCB_8h_a261a105}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-MASTER\_\-ABORT} =  9, 
\par
\hyperlink{LCB_8h_a261a106}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-PARITY\_\-ERROR} =  10, 
\par
\hyperlink{LCB_8h_a261a107}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-TARGET\_\-ABORT} =  11, 
\par
\hyperlink{LCB_8h_a261a108}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-4} =  12, 
\par
\hyperlink{LCB_8h_a261a109}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-5} =  13, 
\par
\hyperlink{LCB_8h_a261a110}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-6} =  14, 
\par
\hyperlink{LCB_8h_a261a111}{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-7} =  15, 
\par
\hyperlink{LCB_8h_a261a112}{LCB\_\-RST\_\-ERR\_\-XFR\_\-CNT} =  16
 \}
\begin{CompactList}\small\item\em Enumeration of possible LCB RESULT in/out errors. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a262}{\_\-LCB\_\-RST\_\-ERR\_\-RCV} \{ \par
\hyperlink{LCB_8h_a262a113}{LCB\_\-RST\_\-ERR\_\-RCV\_\-SUCCESS} =  0, 
\par
\hyperlink{LCB_8h_a262a114}{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-HEADER\_\-PARITY} =  1, 
\par
\hyperlink{LCB_8h_a262a115}{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY} =  2, 
\par
\hyperlink{LCB_8h_a262a116}{LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-3} =  3, 
\par
\hyperlink{LCB_8h_a262a117}{LCB\_\-RST\_\-ERR\_\-RCV\_\-TRANSMIT\_\-UNDERRUN} =  4, 
\par
\hyperlink{LCB_8h_a262a118}{LCB\_\-RST\_\-ERR\_\-RCV\_\-TIMEOUT} =  5, 
\par
\hyperlink{LCB_8h_a262a119}{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-LIST} =  6, 
\par
\hyperlink{LCB_8h_a262a120}{LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-7} =  7, 
\par
\hyperlink{LCB_8h_a262a121}{LCB\_\-RST\_\-ERR\_\-RCV\_\-CNT} =  8
 \}
\begin{CompactList}\small\item\em Enumeration of possible LCB RESULT receive errors in result items. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a263}{\_\-LCB\_\-EVT\_\-ERR\_\-XFR} \{ \par
\hyperlink{LCB_8h_a263a122}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-SUCCESS} =  0, 
\par
\hyperlink{LCB_8h_a263a123}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-MASTER\_\-ABORT} =  1, 
\par
\hyperlink{LCB_8h_a263a124}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-PARITY\_\-ERROR} =  2, 
\par
\hyperlink{LCB_8h_a263a125}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-TARGET\_\-ABORT} =  3, 
\par
\hyperlink{LCB_8h_a263a126}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-4} =  4, 
\par
\hyperlink{LCB_8h_a263a127}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-BUFFER\_\-EMPTY} =  5, 
\par
\hyperlink{LCB_8h_a263a128}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-6} =  6, 
\par
\hyperlink{LCB_8h_a263a129}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-Q\_\-EMPTY} =  7, 
\par
\hyperlink{LCB_8h_a263a130}{LCB\_\-EVT\_\-ERR\_\-XFR\_\-CNT} =  8
 \}
\begin{CompactList}\small\item\em Enumeration of possible EVENT transfer errros. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a264}{\_\-LCB\_\-EVT\_\-ERR\_\-RCV} \{ \par
\hyperlink{LCB_8h_a264a131}{LCB\_\-EVT\_\-ERR\_\-RCV\_\-SUCCESS} =  0, 
\par
\hyperlink{LCB_8h_a264a132}{LCB\_\-EVT\_\-ERR\_\-RCV\_\-UNDEFINED\_\-1} =  1, 
\par
\hyperlink{LCB_8h_a264a133}{LCB\_\-EVT\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY} =  2, 
\par
\hyperlink{LCB_8h_a264a134}{LCB\_\-EVT\_\-ERR\_\-RCV\_\-PACKET\_\-TRUNCATED} =  3, 
\par
\hyperlink{LCB_8h_a264a135}{LCB\_\-EVT\_\-ERR\_\-RCV\_\-CNT} =  4
 \}
\begin{CompactList}\small\item\em Enumeration of possible LCB receive errors. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a265}{\_\-LCB\_\-PCI\_\-CSR\_\-S} \{ \par
\hyperlink{LCB_8h_a265a136}{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBREQX} =  1, 
\par
\hyperlink{LCB_8h_a265a137}{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBRSTX} =  1, 
\par
\hyperlink{LCB_8h_a265a138}{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBEVTX} =  1, 
\par
\hyperlink{LCB_8h_a265a139}{LCB\_\-PCI\_\-CSR\_\-S\_\-IRQEVTQUE} =  2, 
\par
\hyperlink{LCB_8h_a265a140}{LCB\_\-PCI\_\-CSR\_\-S\_\-MBZ} =  2, 
\par
\hyperlink{LCB_8h_a265a141}{LCB\_\-PCI\_\-CSR\_\-S\_\-CLK} =  1, 
\par
\hyperlink{LCB_8h_a265a142}{LCB\_\-PCI\_\-CSR\_\-S\_\-UNUSED1} =  23, 
\par
\hyperlink{LCB_8h_a265a143}{LCB\_\-PCI\_\-CSR\_\-S\_\-LCB\_\-RESET} =  1
 \}
\begin{CompactList}\small\item\em Defines the size, in bits, for the various fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a266}{\_\-LCB\_\-PCI\_\-CSR\_\-V} \{ \par
\hyperlink{LCB_8h_a266a144}{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBREQX} =  0, 
\par
\hyperlink{LCB_8h_a266a145}{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBRSTX} =  1, 
\par
\hyperlink{LCB_8h_a266a146}{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBEVTX} =  2, 
\par
\hyperlink{LCB_8h_a266a147}{LCB\_\-PCI\_\-CSR\_\-V\_\-IRQEVTQUE} =  3, 
\par
\hyperlink{LCB_8h_a266a148}{LCB\_\-PCI\_\-CSR\_\-V\_\-MBZ} =  5, 
\par
\hyperlink{LCB_8h_a266a149}{LCB\_\-PCI\_\-CSR\_\-V\_\-CLK} =  7, 
\par
\hyperlink{LCB_8h_a266a150}{LCB\_\-PCI\_\-CSR\_\-V\_\-UNUSED1} =  8, 
\par
\hyperlink{LCB_8h_a266a151}{LCB\_\-PCI\_\-CSR\_\-V\_\-LCB\_\-RESET} =  31
 \}
\begin{CompactList}\small\item\em Defines right shift amounts for the various fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a267}{\_\-LCB\_\-PCI\_\-CSR\_\-M} \{ \par
\hyperlink{LCB_8h_a267a152}{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBREQX} =  0x00000001, 
\par
\hyperlink{LCB_8h_a267a153}{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBRSTX} =  0x00000002, 
\par
\hyperlink{LCB_8h_a267a154}{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBEVTX} =  0x00000004, 
\par
\hyperlink{LCB_8h_a267a155}{LCB\_\-PCI\_\-CSR\_\-M\_\-IRQEVTQUE} =  0x00000018, 
\par
\hyperlink{LCB_8h_a267a156}{LCB\_\-PCI\_\-CSR\_\-M\_\-MBZ} =  0x00000060, 
\par
\hyperlink{LCB_8h_a267a157}{LCB\_\-PCI\_\-CSR\_\-M\_\-CLK} =  0x00000080, 
\par
\hyperlink{LCB_8h_a267a158}{LCB\_\-PCI\_\-CSR\_\-M\_\-UNUSED1} =  0x7fffff00, 
\par
\hyperlink{LCB_8h_a267a159}{LCB\_\-PCI\_\-CSR\_\-M\_\-LCB\_\-RESET} =  0x80000000
 \}
\begin{CompactList}\small\item\em Defines bit masks for the various fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a268}{\_\-LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M} \{ \par
\hyperlink{LCB_8h_a268a160}{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-75\_\-FULL}, 
\par
\hyperlink{LCB_8h_a268a161}{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-50\_\-FULL}, 
\par
\hyperlink{LCB_8h_a268a162}{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-25\_\-FULL}, 
\par
\hyperlink{LCB_8h_a268a163}{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-NOT\_\-EMPTY}
 \}
\begin{CompactList}\small\item\em Enumerates the event buffer interrupt conditions as in place values. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a269}{\_\-LCB\_\-IRQ\_\-K} \{ \par
\hyperlink{LCB_8h_a269a164}{LCB\_\-IRQ\_\-K\_\-RESULT} =  0, 
\par
\hyperlink{LCB_8h_a269a165}{LCB\_\-IRQ\_\-K\_\-EVENT} =  1, 
\par
\hyperlink{LCB_8h_a269a166}{LCB\_\-IRQ\_\-K\_\-CLK\_\-ON} =  2, 
\par
\hyperlink{LCB_8h_a269a167}{LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF} =  3, 
\par
\hyperlink{LCB_8h_a269a168}{LCB\_\-IRQ\_\-K\_\-SRC\_\-CNT} =  4
 \}
\begin{CompactList}\small\item\em Enumerates the 4 interrupt sources. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a270}{\_\-LCB\_\-IRQ\_\-M} \{ \par
\hyperlink{LCB_8h_a270a169}{LCB\_\-IRQ\_\-M\_\-RESULT} =  (1 $<$$<$ LCB\_\-IRQ\_\-K\_\-RESULT), 
\par
\hyperlink{LCB_8h_a270a170}{LCB\_\-IRQ\_\-M\_\-EVENT} =  (1 $<$$<$ LCB\_\-IRQ\_\-K\_\-EVENT), 
\par
\hyperlink{LCB_8h_a270a171}{LCB\_\-IRQ\_\-M\_\-CLK\_\-ON} =  (1 $<$$<$ LCB\_\-IRQ\_\-K\_\-CLK\_\-ON), 
\par
\hyperlink{LCB_8h_a270a172}{LCB\_\-IRQ\_\-M\_\-CLK\_\-OFF} =  (1 $<$$<$ LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF), 
\par
\hyperlink{LCB_8h_a270a173}{LCB\_\-IRQ\_\-M\_\-CLKS}
 \}
\begin{CompactList}\small\item\em Enumerates the bit mask for the 4 interrupt sources. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a271}{\_\-LCB\_\-PCI\_\-IRQ\_\-S} \{ \par
\hyperlink{LCB_8h_a271a174}{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE} =  4, 
\par
\hyperlink{LCB_8h_a271a175}{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-RESULT} =  1, 
\par
\hyperlink{LCB_8h_a271a176}{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-EVENT} =  1, 
\par
\hyperlink{LCB_8h_a271a177}{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-ON} =  1, 
\par
\hyperlink{LCB_8h_a271a178}{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-OFF} =  1, 
\par
\hyperlink{LCB_8h_a271a179}{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE} =  4, 
\par
\hyperlink{LCB_8h_a271a180}{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-RESULT} =  1, 
\par
\hyperlink{LCB_8h_a271a181}{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-EVENT} =  1, 
\par
\hyperlink{LCB_8h_a271a182}{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-ON} =  1, 
\par
\hyperlink{LCB_8h_a271a183}{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-OFF} =  1, 
\par
\hyperlink{LCB_8h_a271a184}{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING} =  4, 
\par
\hyperlink{LCB_8h_a271a185}{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-RESULT} =  1, 
\par
\hyperlink{LCB_8h_a271a186}{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-EVENT} =  1, 
\par
\hyperlink{LCB_8h_a271a187}{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-ON} =  1, 
\par
\hyperlink{LCB_8h_a271a188}{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-OFF} =  1, 
\par
\hyperlink{LCB_8h_a271a189}{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF} =  4, 
\par
\hyperlink{LCB_8h_a271a190}{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-ENABLE} =  1, 
\par
\hyperlink{LCB_8h_a271a191}{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-DISABLE} =  1, 
\par
\hyperlink{LCB_8h_a271a192}{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-BUF} = 1, 
\par
\hyperlink{LCB_8h_a271a193}{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-QUE} = 1, 
\par
\hyperlink{LCB_8h_a271a194}{LCB\_\-PCI\_\-IRQ\_\-S\_\-UNUSED1} = 16
 \}
\begin{CompactList}\small\item\em Enumerates bit sizes of the IRQ enable/disable/pending fields. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a272}{\_\-LCB\_\-PCI\_\-IRQ\_\-V} \{ \par
\hyperlink{LCB_8h_a272a195}{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE} =  0, 
\par
\hyperlink{LCB_8h_a272a196}{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-RESULT} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE + LCB\_\-IRQ\_\-K\_\-RESULT, 
\par
\hyperlink{LCB_8h_a272a197}{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-EVENT} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE + LCB\_\-IRQ\_\-K\_\-EVENT, 
\par
\hyperlink{LCB_8h_a272a198}{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-ON} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE + LCB\_\-IRQ\_\-K\_\-CLK\_\-ON, 
\par
\hyperlink{LCB_8h_a272a199}{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-OFF} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE + LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF, 
\par
\hyperlink{LCB_8h_a272a200}{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE} =  4, 
\par
\hyperlink{LCB_8h_a272a201}{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-RESULT} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE + LCB\_\-IRQ\_\-K\_\-RESULT, 
\par
\hyperlink{LCB_8h_a272a202}{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-EVENT} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE + LCB\_\-IRQ\_\-K\_\-EVENT, 
\par
\hyperlink{LCB_8h_a272a203}{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-ON} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE + LCB\_\-IRQ\_\-K\_\-CLK\_\-ON, 
\par
\hyperlink{LCB_8h_a272a204}{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-OFF} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE + LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF, 
\par
\hyperlink{LCB_8h_a272a205}{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING} =  8, 
\par
\hyperlink{LCB_8h_a272a206}{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-RESULT} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING + LCB\_\-IRQ\_\-K\_\-RESULT, 
\par
\hyperlink{LCB_8h_a272a207}{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-EVENT} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING + LCB\_\-IRQ\_\-K\_\-EVENT, 
\par
\hyperlink{LCB_8h_a272a208}{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-ON} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING + LCB\_\-IRQ\_\-K\_\-CLK\_\-ON, 
\par
\hyperlink{LCB_8h_a272a209}{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-OFF} =  LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING + LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF, 
\par
\hyperlink{LCB_8h_a272a210}{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF} =  12, 
\par
\hyperlink{LCB_8h_a272a211}{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-ENABLE} =  12, 
\par
\hyperlink{LCB_8h_a272a212}{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-DISABLE} =  13, 
\par
\hyperlink{LCB_8h_a272a213}{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-BUF} =  14, 
\par
\hyperlink{LCB_8h_a272a214}{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-QUE} =  15, 
\par
\hyperlink{LCB_8h_a272a215}{LCB\_\-PCI\_\-IRQ\_\-V\_\-UNUSED1} =  16
 \}
\begin{CompactList}\small\item\em Enumerates right justified bit offsets the IRQ enable/disable/pending bits. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a273}{\_\-LCB\_\-PCI\_\-IRQ\_\-M} \{ \par
\hyperlink{LCB_8h_a273a216}{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-RESULT} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-RESULT), 
\par
\hyperlink{LCB_8h_a273a217}{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-EVENT} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-EVENT), 
\par
\hyperlink{LCB_8h_a273a218}{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-ON} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-ON), 
\par
\hyperlink{LCB_8h_a273a219}{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-OFF} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-OFF), 
\par
{\bf LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-QUES}, 
\par
\hyperlink{LCB_8h_a273a221}{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLKS}, 
\par
\hyperlink{LCB_8h_a273a222}{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-ALL}, 
\par
\hyperlink{LCB_8h_a273a223}{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-RESULT} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-RESULT), 
\par
\hyperlink{LCB_8h_a273a224}{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-EVENT} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-EVENT), 
\par
\hyperlink{LCB_8h_a273a225}{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-ON} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-ON), 
\par
\hyperlink{LCB_8h_a273a226}{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-OFF} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-OFF), 
\par
{\bf LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-QUES}, 
\par
\hyperlink{LCB_8h_a273a228}{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLKS}, 
\par
\hyperlink{LCB_8h_a273a229}{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-ALL}, 
\par
\hyperlink{LCB_8h_a273a230}{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-RESULT} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-RESULT), 
\par
\hyperlink{LCB_8h_a273a231}{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-EVENT} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-EVENT), 
\par
\hyperlink{LCB_8h_a273a232}{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-ON} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-ON), 
\par
\hyperlink{LCB_8h_a273a233}{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-OFF} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-OFF), 
\par
\hyperlink{LCB_8h_a273a234}{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-QUES}, 
\par
{\bf LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLKS}, 
\par
\hyperlink{LCB_8h_a273a236}{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-ALL}, 
\par
\hyperlink{LCB_8h_a273a237}{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-ENABLE} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-ENABLE), 
\par
\hyperlink{LCB_8h_a273a238}{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-DISABLE} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-DISABLE), 
\par
\hyperlink{LCB_8h_a273a239}{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-BUF} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-BUF), 
\par
\hyperlink{LCB_8h_a273a240}{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-QUE} =  (1 $<$$<$ LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-QUE), 
\par
\hyperlink{LCB_8h_a273a241}{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF}, 
\par
\hyperlink{LCB_8h_a273a242}{LCB\_\-PCI\_\-IRQ\_\-M\_\-UNUSED1} =  0xffff0000
 \}
\begin{CompactList}\small\item\em Enumerates the IRQ enable/disable/pending bits. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a274}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH} \{ \par
\hyperlink{LCB_8h_a274a243}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-PRIMARY} =  0, 
\par
\hyperlink{LCB_8h_a274a244}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-REDUNDANT} =  1
 \}
\begin{CompactList}\small\item\em Enumerates the possible values of the path field in the fabric select register. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a275}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S} \{ \par
\hyperlink{LCB_8h_a275a245}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-PATH} =  1, 
\par
\hyperlink{LCB_8h_a275a246}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-UNUSED} =  31
 \}
\begin{CompactList}\small\item\em Enumerates the size, in bits, of the fields in the fabric select register. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a276}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V} \{ \par
\hyperlink{LCB_8h_a276a247}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-PATH} =  0, 
\par
\hyperlink{LCB_8h_a276a248}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-UNUSED} =  1
 \}
\begin{CompactList}\small\item\em Enumerates the right justified bit offsets of the fields in the fabric select register. \item\end{CompactList}\item 
enum \hyperlink{LCB_8h_a277}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M} \{ \par
\hyperlink{LCB_8h_a277a249}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-PATH} =  (1 $<$$<$ LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-PATH), 
\par
\hyperlink{LCB_8h_a277a250}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-UNUSED} =  (0x\-FFFFFFFE)
 \}
\begin{CompactList}\small\item\em Enumerates the mask field of the fields in the fabric select register. \item\end{CompactList}\end{CompactItemize}


\subsection{Detailed Description}
Defines all the constants and public structures of the LCB. 

\begin{Desc}
\item[Author:]JJRussell - \href{mailto:russell@slac.stanford.edu}{\tt russell@slac.stanford.edu}\end{Desc}


\footnotesize\begin{verbatim}   CVS $Id
\end{verbatim}
\normalsize


\begin{Desc}
\item[INTRODUCTION]This file contains constants and LCB data structure that are useful to all clients of the LCB. Mostly these codify the various hardware definitions that the LCB package feels comfortable in exporting.\end{Desc}
\begin{Desc}
\item[]There are 4 major sections:\end{Desc}
\begin{Desc}
\item[]\begin{enumerate}
\item Miscellaneous Definitions\item Definitions of the input and output descriptors\begin{itemize}
\item Request Descriptor, also called the Export Descriptor\item Result Descriptor\item Event Descriptor\end{itemize}
\item Enumerations of the returned status codes from the\begin{itemize}
\item Result Descriptor, both out-bound and in-bound\item Result Items\item Event Descriptor, both transfer and receive\end{itemize}
\item PCI side registers\begin{itemize}
\item PCI memory map\item Register definitions\end{itemize}
\end{enumerate}
\end{Desc}
\begin{Desc}
\item[Conventions]All registers that are composed of non-trivial internal bit fields are represented as both\begin{itemize}
\item C bit field structures\item A series of enumerations giving the\begin{itemize}
\item Field size, written as LCB\_\-reg\_\-S\_\-component\item Right justified bit field offset, written as LCB\_\-reg\_\-V\_\-component\item In place bit field mask, written as LCB\_\-reg\_\-M\_\-component\end{itemize}
\end{itemize}
\end{Desc}
\begin{Desc}
\item[]where {\em reg\/} is the name of the register and {\em component\/} is the name of the component bit field. A union of the C bit field structures with a uninterpretted 32-bit integer is also defined, allowing easy conversion between the two representations.\end{Desc}


\subsection{Define Documentation}
\hypertarget{LCB_8h_a15}{
\index{LCB.h@{LCB.h}!LCB_EVT_PAD_SIZE@{LCB\_\-EVT\_\-PAD\_\-SIZE}}
\index{LCB_EVT_PAD_SIZE@{LCB\_\-EVT\_\-PAD\_\-SIZE}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-EVT\_\-PAD\_\-SIZE]{\setlength{\rightskip}{0pt plus 5cm}\#define LCB\_\-EVT\_\-PAD\_\-SIZE~32}}
\label{LCB_8h_a15}


The size, in bytes, of the pad area left before each packet in the event ring buffer. 

\begin{Desc}
\item[]The LCB hardware skips this number of bytes between the last message and the first byte of the incoming message. This pad area is provided for the consumer (either driver or end user) to use to store contextual information. The intent is to save the consumer from allocating yet another piece of memory for this purpose.\end{Desc}
\hypertarget{LCB_8h_a9}{
\index{LCB.h@{LCB.h}!LCB_EVT_PAYLOAD_MAX@{LCB\_\-EVT\_\-PAYLOAD\_\-MAX}}
\index{LCB_EVT_PAYLOAD_MAX@{LCB\_\-EVT\_\-PAYLOAD\_\-MAX}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-EVT\_\-PAYLOAD\_\-MAX]{\setlength{\rightskip}{0pt plus 5cm}\#define LCB\_\-EVT\_\-PAYLOAD\_\-MAX~(255$\ast$16)}}
\label{LCB_8h_a9}


The maximum number of bytes that can be sent in a LCB-to-LCB transfer. 

The transfer is always in units of an integer number of LATp cells which are 16 bytes. The LCB can transfer a max of 255 LATp cells. This number is defined as the maximum size of the payload. The definition of the payload includes the 2 bytes used for the mandatory LATp header. Said another way, the maximum size of user part of the payload is this number less the 2 bytes for the LATp header.\hypertarget{LCB_8h_a14}{
\index{LCB.h@{LCB.h}!LCB_EVT_PROTO_CNT@{LCB\_\-EVT\_\-PROTO\_\-CNT}}
\index{LCB_EVT_PROTO_CNT@{LCB\_\-EVT\_\-PROTO\_\-CNT}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-EVT\_\-PROTO\_\-CNT]{\setlength{\rightskip}{0pt plus 5cm}\#define LCB\_\-EVT\_\-PROTO\_\-CNT~4}}
\label{LCB_8h_a14}


Number of protocols supported by the event fabric. 

When sending of receiving data on the event fabric, the data packet always contains a 16-bit LATp cell header word. Within this header word resides a two bits protocol field. The receiving LATp node may use this protocol field to aid in determining the nature of the nature. If the receiving node is a CPU, then the software may chose to use the protocol field to route the data packet to the proper handler. In the case where the receiving node is the Event Builder, the protocol field determines whether to {\em build the event\/} or to simple pass it on to its LATp destination addres.\hypertarget{LCB_8h_a8}{
\index{LCB.h@{LCB.h}!LCB_REQUEST_LIST_MAX@{LCB\_\-REQUEST\_\-LIST\_\-MAX}}
\index{LCB_REQUEST_LIST_MAX@{LCB\_\-REQUEST\_\-LIST\_\-MAX}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-REQUEST\_\-LIST\_\-MAX]{\setlength{\rightskip}{0pt plus 5cm}\#define LCB\_\-REQUEST\_\-LIST\_\-MAX~(4088/sizeof(int))}}
\label{LCB_8h_a8}


The maximum length, in 32-bit integers of a command list. 

\begin{Desc}
\item[]This number can be as large as 4088 + 4. This is from the LCB specification V4.0, LAT-TD-00860-01.\end{Desc}


\subsection{Typedef Documentation}
\hypertarget{LCB_8h_a36}{
\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR@{LCB\_\-EVT\_\-ERR\_\-XFR}}
\index{LCB_EVT_ERR_XFR@{LCB\_\-EVT\_\-ERR\_\-XFR}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-EVT\_\-ERR\_\-XFR]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a36}{LCB\_\-EVT\_\-ERR\_\-XFR}}}
\label{LCB_8h_a36}


Typedef for enum \_\-LCB\_\-EVT\_\-ERR\_\-XFR. 

\begin{Desc}
\item[PCI Master Abort]This is likely due to a bad DMA destination address. In this case, typically there is no data transferred, but one is still obligated to free the padding area and, if any, the number of words specified by the length, although, again, this is almost certainly going to be 0.\end{Desc}
\begin{Desc}
\item[PCI Parity Error]PCI Parity Error occurs only on reads. Since this is a write operation, this error should not occur\end{Desc}
\begin{Desc}
\item[PCI Target Abort]This error is a little iffer in origin, but a bad address is a good candidate. The difference between this and a PCI Master Abort is that in the Master Abort, no one responded to the memory address. In this operation, the operation is rejected (like trying to write into read only memory). Basically, the operation being requested is not in the target's side repertorie.\end{Desc}
\begin{Desc}
\item[Buffer Empty]This is an internal underflow situation where the descriptor claims so many words are available, but the FIFO runs dry before that. This is internal hardware inconsistency and is a design fault. The data fill have the last legitimate word duplicated until the requisite number of words (as claimed by the result descriptor) is exhausted. There is no way for the user to absolutely known where the last good word occcurred.\end{Desc}
\begin{Desc}
\item[Empty]This is perfectly normal and occurs when the event descriptor que has run out.\end{Desc}
\hypertarget{LCB_8h_a45}{
\index{LCB.h@{LCB.h}!LCB_IRQ_K@{LCB\_\-IRQ\_\-K}}
\index{LCB_IRQ_K@{LCB\_\-IRQ\_\-K}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-IRQ\_\-K]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a45}{LCB\_\-IRQ\_\-K}}}
\label{LCB_8h_a45}


Typedef for the enum \_\-LCB\_\-IRQ\_\-K. 

\begin{Desc}
\item[]The LCB is capable of delivering interrupts from 4 different sources,\end{Desc}
\begin{itemize}
\item The result queue\item The event queue\item The clock transiting from on to off\item The clock transiting from off to on\end{itemize}


\begin{Desc}
\item[]At any given time, one and only one of the clock transition interrupts will be active, except possibly at initialization time. It is considered an error for both to be inactive or active at the same time.\end{Desc}
\begin{Desc}
\item[]There are three set of status bits associated with these interrupts\begin{itemize}
\item The set of enabled interrupts\item The set of disabled interrupts\item The set of pending interrupts\end{itemize}
\end{Desc}
\begin{Desc}
\item[]Only enabled and pending interrupts result in an interrupt being delivered to the CPU. The set of enabled and disabled interrupts is mutually exclusive, {\em i.e.\/} it is considered an error for a particular interrupt to be either both enabled and disabled or to be neither enabled or disabled.\end{Desc}
\begin{Desc}
\item[]This enumeration gives the offset of each interrupt within the sets.\end{Desc}
\begin{Desc}
\item[Note:]There is a fourth set of bits that does not follow this pattern. This set contains bits that control and give the status of the two sources that feed the event interrupt, the buffer full condition and the event queue highwater mark exceeded condition. See LCB\_\-pci\_\-irq\_\-bf for details.\end{Desc}
\hypertarget{LCB_8h_a44}{
\index{LCB.h@{LCB.h}!LCB_pci_csr@{LCB\_\-pci\_\-csr}}
\index{LCB_pci_csr@{LCB\_\-pci\_\-csr}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-pci\_\-csr]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{union__LCB__pci__csr}{LCB\_\-pci\_\-csr}}}
\label{LCB_8h_a44}


typedef for union 

\begin{Desc}
\item[See also:]\hyperlink{union__LCB__pci__csr}{\_\-LCB\_\-pci\_\-csr}\end{Desc}
\hypertarget{LCB_8h_a43}{
\index{LCB.h@{LCB.h}!LCB_pci_csr_bf@{LCB\_\-pci\_\-csr\_\-bf}}
\index{LCB_pci_csr_bf@{LCB\_\-pci\_\-csr\_\-bf}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-pci\_\-csr\_\-bf]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{struct__LCB__pci__csr__bf}{LCB\_\-pci\_\-csr\_\-bf}}}
\label{LCB_8h_a43}


Typedef for struct. 

\begin{Desc}
\item[See also:]\hyperlink{struct__LCB__pci__csr__bf}{\_\-LCB\_\-pci\_\-csr\_\-bf}\end{Desc}
\hypertarget{LCB_8h_a41}{
\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M@{LCB\_\-PCI\_\-CSR\_\-M}}
\index{LCB_PCI_CSR_M@{LCB\_\-PCI\_\-CSR\_\-M}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-PCI\_\-CSR\_\-M]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a41}{LCB\_\-PCI\_\-CSR\_\-M}}}
\label{LCB_8h_a41}


Typedef for enum. 

\begin{Desc}
\item[See also:]\hyperlink{LCB_8h_a267}{\_\-LCB\_\-PCI\_\-CSR\_\-M}\end{Desc}
\hypertarget{LCB_8h_a39}{
\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S@{LCB\_\-PCI\_\-CSR\_\-S}}
\index{LCB_PCI_CSR_S@{LCB\_\-PCI\_\-CSR\_\-S}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-PCI\_\-CSR\_\-S]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a39}{LCB\_\-PCI\_\-CSR\_\-S}}}
\label{LCB_8h_a39}


Typedef for enum. 

\begin{Desc}
\item[See also:]\hyperlink{LCB_8h_a265}{\_\-LCB\_\-PCI\_\-CSR\_\-S};\end{Desc}
\hypertarget{LCB_8h_a40}{
\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V@{LCB\_\-PCI\_\-CSR\_\-V}}
\index{LCB_PCI_CSR_V@{LCB\_\-PCI\_\-CSR\_\-V}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-PCI\_\-CSR\_\-V]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a40}{LCB\_\-PCI\_\-CSR\_\-V}}}
\label{LCB_8h_a40}


Typedef for enum. 

\begin{Desc}
\item[See also:]\hyperlink{LCB_8h_a266}{\_\-LCB\_\-PCI\_\-CSR\_\-V}\end{Desc}
\hypertarget{LCB_8h_a53}{
\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH}}
\index{LCB_PCI_FABRIC_SELECT_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a53}{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH}}}
\label{LCB_8h_a53}


Typedef for enum \_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH. 

This enumerates the possible value of the path field in the fabric select register. Currently only 1 bit is defined.\hypertarget{LCB_8h_a51}{
\index{LCB.h@{LCB.h}!LCB_pci_irq_bf@{LCB\_\-pci\_\-irq\_\-bf}}
\index{LCB_pci_irq_bf@{LCB\_\-pci\_\-irq\_\-bf}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-pci\_\-irq\_\-bf]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{struct__LCB__pci__irq__bf}{LCB\_\-pci\_\-irq\_\-bf}}}
\label{LCB_8h_a51}


Typedef for struct \hyperlink{struct__LCB__pci__irq__bf}{\_\-LCB\_\-pci\_\-irq\_\-bf}. 

\begin{Desc}
\item[]The interrupt enable register consists of 3 sets of 4 bits. The 4 bits are:\end{Desc}
\begin{enumerate}
\item 1 bit for the result interrupts\item 1 bit for the event interrupts\item 1 bit for the clock on interrupt (fires on transition of off-$>$on)\item 1 bit for the clock off interrupt (fires on transition of on-$>$off)\end{enumerate}


\begin{Desc}
\item[]The three sets represent\end{Desc}
\begin{enumerate}
\item Enable the interrupt\item Disable the interrupt\item State of the interrupt (read-only)\end{enumerate}


\begin{Desc}
\item[]It is illegal to simoultaneously request the same interrupt to be both enable and disabled.\end{Desc}
\begin{Desc}
\item[Circular Buffer Set]There is a fourth set of bits that does not follow this pattern. This set contains bits that control and give\end{Desc}
\begin{enumerate}
\item Enable buffer full as a contributor to the event interrupt\item Disable buffer full as a contributor to the event interrupt\item Buffer full condition meet\item Queue highwater mark condition meet.\end{enumerate}


\begin{Desc}
\item[Note:]There is not a separate enable for the {\em Que highwater mark\/} condition. This was felt to be redundant with the ability to enable/disable the global event interrupt.\end{Desc}
\hypertarget{LCB_8h_a49}{
\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M@{LCB\_\-PCI\_\-IRQ\_\-M}}
\index{LCB_PCI_IRQ_M@{LCB\_\-PCI\_\-IRQ\_\-M}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-PCI\_\-IRQ\_\-M]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a49}{LCB\_\-PCI\_\-IRQ\_\-M}}}
\label{LCB_8h_a49}


Typedef for enum \_\-LCB\_\-PCI\_\-IRQ\_\-M. 

\begin{Desc}
\item[]The interrupt enable register consists of 3 sets of 4 bits. The 4 bits are:\end{Desc}
\begin{enumerate}
\item 1 bit for the result interrupts\item 1 bit for the event interrupts\item 1 bit for the clock on interrupt (fires on transition of off-$>$on)\item 1 bit for the clock off interrupt (fires on transition of on-$>$off)\end{enumerate}


\begin{Desc}
\item[]The three sets represent\end{Desc}
\begin{enumerate}
\item Enable the interrupt (on write, on read enable(1)/disable(0) status\item Disable the interrupt (on write, on read, mbz\item State of the interrupt (read-only)\end{enumerate}


It is illegal to simoultaneously request the same interrupt to be both enable and disabled. The enable/dis

\begin{Desc}
\item[]There is now a fourth set controlling and giving the status of the interrupts associated with the circular buffer. This set of four bits is\end{Desc}
\begin{enumerate}
\item Enable the circular buffer full interrupt (on write, on read enable(1)/disable(1) status\item Disable the circular buffer full interrupt (on write, on read, mbz)\item Circular buffer full interrupt pending (read-only)\item Circular que interrupt pending (read-only)\end{enumerate}


\begin{Desc}
\item[Note:]The convenience definitions, {\em e.g\/}. LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-ALL do not include the circular buffer condition\end{Desc}
\begin{Desc}
\item[Circular Buffer Set]There is a fourth set of bits that does not follow this pattern. This set contains bits that control and give the status of the two sources that feed the event interrupt, the buffer full condition and the event queue highwater mark exceeded condition. See LCB\_\-pci\_\-irq\_\-bf for details.\end{Desc}
\hypertarget{LCB_8h_a47}{
\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S@{LCB\_\-PCI\_\-IRQ\_\-S}}
\index{LCB_PCI_IRQ_S@{LCB\_\-PCI\_\-IRQ\_\-S}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-PCI\_\-IRQ\_\-S]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a47}{LCB\_\-PCI\_\-IRQ\_\-S}}}
\label{LCB_8h_a47}


Typedef for enum \_\-LCB\_\-PCI\_\-IRQ\_\-S. 

\begin{Desc}
\item[]The interrupt enable register consists of 3 sets of 4 bits. The 4 bits are:\end{Desc}
\begin{enumerate}
\item 1 bit for the result interrupts\item 1 bit for the event interrupts\item 1 bit for the clock on interrupt (fires on transition of off-$>$on)\item 1 bit for the clock off interrupt (fires on transition of on-$>$off)\end{enumerate}


\begin{Desc}
\item[]The three sets represent\end{Desc}
\begin{enumerate}
\item Enable the interrupt\item Disable the interrupt\item State of the interrupt (read-only)\end{enumerate}


\begin{Desc}
\item[]It is illegal to simoultaneously request the same interrupt to be both enable and disabled.\end{Desc}
\begin{Desc}
\item[Circular Buffer Set]There is a fourth set of bits that does not follow this pattern. This set contains bits that control and give the status of the two sources that feed the event interrupt, the buffer full condition and the event queue highwater mark exceeded condition. See LCB\_\-pci\_\-irq\_\-bf for details.\end{Desc}
\hypertarget{LCB_8h_a50}{
\index{LCB.h@{LCB.h}!LCB_pci_irq_sets@{LCB\_\-pci\_\-irq\_\-sets}}
\index{LCB_pci_irq_sets@{LCB\_\-pci\_\-irq\_\-sets}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-pci\_\-irq\_\-sets]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{struct__LCB__pci__irq__sets}{LCB\_\-pci\_\-irq\_\-sets}}}
\label{LCB_8h_a50}


Typedef for struct \hyperlink{struct__LCB__pci__irq__sets}{\_\-LCB\_\-pci\_\-irq\_\-sets}. 

\begin{Desc}
\item[]The interrupt enable register consists of 3 sets of 4 bits. The 4 bits are:\end{Desc}
\begin{enumerate}
\item 1 bit for the result interrupts\item 1 bit for the event interrupts\item 1 bit for the clock on interrupt (fires on transition of off-$>$on)\item 1 bit for the clock off interrupt (fires on transition of on-$>$off)\end{enumerate}


\begin{Desc}
\item[]The three sets represent\end{Desc}
\begin{enumerate}
\item Enable the interrupt\item Disable the interrupt\item State of the interrupt (read-only)\end{enumerate}


\begin{Desc}
\item[]It is illegal to simoultaneously request the same interrupt to be both enable and disabled.\end{Desc}
\begin{Desc}
\item[Circular Buffer Set]There is a fourth set of bits that does not follow this pattern. This set contains bits that control and give the status of the two sources that feed the event interrupt, the buffer full condition and the event queue highwater mark exceeded condition. See LCB\_\-pci\_\-irq\_\-bf for details.\end{Desc}
\hypertarget{LCB_8h_a48}{
\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V@{LCB\_\-PCI\_\-IRQ\_\-V}}
\index{LCB_PCI_IRQ_V@{LCB\_\-PCI\_\-IRQ\_\-V}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-PCI\_\-IRQ\_\-V]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{LCB_8h_a48}{LCB\_\-PCI\_\-IRQ\_\-V}}}
\label{LCB_8h_a48}


Typedef for enum \_\-LCB\_\-PCI\_\-IRQ\_\-V. 

\begin{Desc}
\item[]The interrupt enable register consists of 3 sets of 4 bits. The 4 bits are:\end{Desc}
\begin{enumerate}
\item 1 bit for the result interrupts\item 1 bit for the event interrupts\item 1 bit for the clock on interrupt (fires on transition of off-$>$on)\item 1 bit for the clock off interrupt (fires on transition of on-$>$off)\end{enumerate}


\begin{Desc}
\item[]The three sets represent\end{Desc}
\begin{enumerate}
\item Enable the interrupt\item Disable the interrupt\item State of the interrupt (read-only)\end{enumerate}


\begin{Desc}
\item[]It is illegal to simoultaneously request the same interrupt to be both enable and disabled.\end{Desc}
\begin{Desc}
\item[Circular Buffer Set]There is a fourth set of bits that does not follow this pattern. This set contains bits that control and give the status of the two sources that feed the event interrupt, the buffer full condition and the event queue highwater mark exceeded condition. See LCB\_\-pci\_\-irq\_\-bf for details.\end{Desc}
\hypertarget{LCB_8h_a38}{
\index{LCB.h@{LCB.h}!LCB_prb@{LCB\_\-prb}}
\index{LCB_prb@{LCB\_\-prb}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-prb]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{struct__LCB__prb}{LCB\_\-prb}}}
\label{LCB_8h_a38}


Typedef for struct. 

\begin{Desc}
\item[See also:]\hyperlink{struct__LCB__prb}{\_\-LCB\_\-prb}\end{Desc}
The definitive source for the register map is LAT-TD-860-01, section 2.2 The names where chosen to follow as closely as possible the names used in the document.\hypertarget{LCB_8h_a27}{
\index{LCB.h@{LCB.h}!LCB_rst_dsc@{LCB\_\-rst\_\-dsc}}
\index{LCB_rst_dsc@{LCB\_\-rst\_\-dsc}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-rst\_\-dsc]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{union__LCB__rst__dsc}{LCB\_\-rst\_\-dsc}}}
\label{LCB_8h_a27}


typedef for union \hyperlink{union__LCB__rst__dsc}{\_\-LCB\_\-rst\_\-dsc} 

\begin{Desc}
\item[About this Representation]This representation of the result descriptor is a union of 3 different representations,\begin{itemize}
\item {\em LCB\_\-rst\_\-dsc\_\-bfd\/},\item {\em LCB\_\-rst\_\-dsc\_\-bf\/} \item An unsigned 32-bit integer. \end{itemize}
\end{Desc}
\begin{Desc}
\item[]Each has its use, with the use of e LCB\_\-rst\_\-dsc\_\-bfd and {\em LCB\_\-rst\_\-bf\/} documented in their respective sections. The result descriptor as a 32-bit integer is encouraged when coping passing the result descriptor and when passing the result descriptor by value. Note that when passing unions in as parameters, the GCC compiler chooses to pass by {\em address\/}.\end{Desc}
\hypertarget{LCB_8h_a26}{
\index{LCB.h@{LCB.h}!LCB_rst_dsc_bf@{LCB\_\-rst\_\-dsc\_\-bf}}
\index{LCB_rst_dsc_bf@{LCB\_\-rst\_\-dsc\_\-bf}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-rst\_\-dsc\_\-bf]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{struct__LCB__rst__dsc__bf}{LCB\_\-rst\_\-dsc\_\-bf}}}
\label{LCB_8h_a26}


Typedef for structure \hyperlink{struct__LCB__rst__dsc__bf}{\_\-LCB\_\-rst\_\-dsc\_\-bf}. 

\begin{Desc}
\item[Treatment of the Direction/Status Fields]This representatin of the result descriptor treats the {\em direction\/} and @ status field as a single field, called the transfer status field, {\em xstatus\/}. This representation is convenient, for example, when performing statistics on the fate of the transaction or when capturing the value of this two fields.\end{Desc}
\begin{Desc}
\item[See also:]\hyperlink{LCB_8h_a25}{LCB\_\-rst\_\-dsc\_\-bfd} This representation treats the {\em direction\/} field and {\em status\/} fields as two distinct fields and may be more useful when trying to interpret the meaning of the PCI {\em address\/} field.\end{Desc}
\hypertarget{LCB_8h_a25}{
\index{LCB.h@{LCB.h}!LCB_rst_dsc_bfd@{LCB\_\-rst\_\-dsc\_\-bfd}}
\index{LCB_rst_dsc_bfd@{LCB\_\-rst\_\-dsc\_\-bfd}!LCB.h@{LCB.h}}
\subsubsection[LCB\_\-rst\_\-dsc\_\-bfd]{\setlength{\rightskip}{0pt plus 5cm}\hyperlink{struct__LCB__rst__dsc__bfd}{LCB\_\-rst\_\-dsc\_\-bfd}}}
\label{LCB_8h_a25}


Typedef for structure \hyperlink{struct__LCB__rst__dsc__bfd}{\_\-LCB\_\-rst\_\-dsc\_\-bfd}. 

\begin{Desc}
\item[Treatment of the Direction/Status Fields]This structure maps out the bit fields of the result descriptor in a representation that separates the {\em direction\/} field from the status field. The interpretation of both the {\em status\/} field and the {\em adr\/} field is dependent of the value of the {\em dir\/} field.\end{Desc}
\begin{Desc}
\item[Interpretation of the Status Field]The {\em direction\/} bit determines if the status field. is interpretted as an {\em in-bound\/} status of {\em out-bound\/} status. If the direction bit is clear (0), then {\em status\/} represents an {\em out-bound\/} status, if set (1), then {\em status\/} represents an {\em in-bound\/} status. In both cases, if the status field is clear (0), then the transaction completed successfully.\end{Desc}
\begin{Desc}
\item[Interpretation of the Address Field]The {\em direction\/} bit determines if the address field is a \char`\"{}result list\char`\"{} address or a \char`\"{}request list\char`\"{} address. If the direction bit is clear (0), then {\em adr\/} represents the PCI address of the result-list, if set (1), then {\em adr\/} represents the PCI address of the request-list.\end{Desc}
\begin{Desc}
\item[See also:]\hyperlink{LCB_8h_a26}{LCB\_\-rst\_\-dsc\_\-bf} This representation treats the {\em direction\/} an {\em status\/} fields as a single field and may be more convenient for doing statistics on this field or capturing the value of these two fields.\end{Desc}


\subsection{Enumeration Type Documentation}
\hypertarget{LCB_8h_a254}{
\index{LCB.h@{LCB.h}!_LCB_CMD_DSC_M@{\_\-LCB\_\-CMD\_\-DSC\_\-M}}
\index{_LCB_CMD_DSC_M@{\_\-LCB\_\-CMD\_\-DSC\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-CMD\_\-DSC\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a254}{\_\-LCB\_\-CMD\_\-DSC\_\-M}}}
\label{LCB_8h_a254}


Masks of the command descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_CMD_DSC_M_LEN@{LCB\_\-CMD\_\-DSC\_\-M\_\-LEN}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_CMD_DSC_M_LEN@{LCB\_\-CMD\_\-DSC\_\-M\_\-LEN}}\item[{\em 
\hypertarget{LCB_8h_a254a67}{
LCB\_\-CMD\_\-DSC\_\-M\_\-LEN}
\label{LCB_8h_a254a67}
}]Transaction field bit field mask \index{LCB_CMD_DSC_M_ADR@{LCB\_\-CMD\_\-DSC\_\-M\_\-ADR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_CMD_DSC_M_ADR@{LCB\_\-CMD\_\-DSC\_\-M\_\-ADR}}\item[{\em 
\hypertarget{LCB_8h_a254a68}{
LCB\_\-CMD\_\-DSC\_\-M\_\-ADR}
\label{LCB_8h_a254a68}
}]PCI address field bit field mask \end{description}
\end{Desc}

\hypertarget{LCB_8h_a252}{
\index{LCB.h@{LCB.h}!_LCB_CMD_DSC_S@{\_\-LCB\_\-CMD\_\-DSC\_\-S}}
\index{_LCB_CMD_DSC_S@{\_\-LCB\_\-CMD\_\-DSC\_\-S}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-CMD\_\-DSC\_\-S]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a252}{\_\-LCB\_\-CMD\_\-DSC\_\-S}}}
\label{LCB_8h_a252}


Size, in bits, of the command descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_CMD_DSC_S_LEN@{LCB\_\-CMD\_\-DSC\_\-S\_\-LEN}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_CMD_DSC_S_LEN@{LCB\_\-CMD\_\-DSC\_\-S\_\-LEN}}\item[{\em 
\hypertarget{LCB_8h_a252a63}{
LCB\_\-CMD\_\-DSC\_\-S\_\-LEN}
\label{LCB_8h_a252a63}
}]Transaction field, bit field size \index{LCB_CMD_DSC_S_ADR@{LCB\_\-CMD\_\-DSC\_\-S\_\-ADR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_CMD_DSC_S_ADR@{LCB\_\-CMD\_\-DSC\_\-S\_\-ADR}}\item[{\em 
\hypertarget{LCB_8h_a252a64}{
LCB\_\-CMD\_\-DSC\_\-S\_\-ADR}
\label{LCB_8h_a252a64}
}]PCI address field, bit field size \end{description}
\end{Desc}

\hypertarget{LCB_8h_a253}{
\index{LCB.h@{LCB.h}!_LCB_CMD_DSC_V@{\_\-LCB\_\-CMD\_\-DSC\_\-V}}
\index{_LCB_CMD_DSC_V@{\_\-LCB\_\-CMD\_\-DSC\_\-V}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-CMD\_\-DSC\_\-V]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a253}{\_\-LCB\_\-CMD\_\-DSC\_\-V}}}
\label{LCB_8h_a253}


Right justified bit offsets of the command descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_CMD_DSC_V_LEN@{LCB\_\-CMD\_\-DSC\_\-V\_\-LEN}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_CMD_DSC_V_LEN@{LCB\_\-CMD\_\-DSC\_\-V\_\-LEN}}\item[{\em 
\hypertarget{LCB_8h_a253a65}{
LCB\_\-CMD\_\-DSC\_\-V\_\-LEN}
\label{LCB_8h_a253a65}
}]Transaction field, bit field offset \index{LCB_CMD_DSC_V_ADR@{LCB\_\-CMD\_\-DSC\_\-V\_\-ADR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_CMD_DSC_V_ADR@{LCB\_\-CMD\_\-DSC\_\-V\_\-ADR}}\item[{\em 
\hypertarget{LCB_8h_a253a66}{
LCB\_\-CMD\_\-DSC\_\-V\_\-ADR}
\label{LCB_8h_a253a66}
}]PCI address field, bit field offset \end{description}
\end{Desc}

\hypertarget{LCB_8h_a260}{
\index{LCB.h@{LCB.h}!_LCB_EVT_DSC_M@{\_\-LCB\_\-EVT\_\-DSC\_\-M}}
\index{_LCB_EVT_DSC_M@{\_\-LCB\_\-EVT\_\-DSC\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-EVT\_\-DSC\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a260}{\_\-LCB\_\-EVT\_\-DSC\_\-M}}}
\label{LCB_8h_a260}


Masks of the event descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_EVT_DSC_M_OFFSET@{LCB\_\-EVT\_\-DSC\_\-M\_\-OFFSET}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_M_OFFSET@{LCB\_\-EVT\_\-DSC\_\-M\_\-OFFSET}}\item[{\em 
\hypertarget{LCB_8h_a260a91}{
LCB\_\-EVT\_\-DSC\_\-M\_\-OFFSET}
\label{LCB_8h_a260a91}
}]Circular buffer offset, mask \index{LCB_EVT_DSC_M_LEN@{LCB\_\-EVT\_\-DSC\_\-M\_\-LEN}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_M_LEN@{LCB\_\-EVT\_\-DSC\_\-M\_\-LEN}}\item[{\em 
\hypertarget{LCB_8h_a260a92}{
LCB\_\-EVT\_\-DSC\_\-M\_\-LEN}
\label{LCB_8h_a260a92}
}]Size of the event in units of 32-bit words, bit field mask \index{LCB_EVT_DSC_M_STATUS@{LCB\_\-EVT\_\-DSC\_\-M\_\-STATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_M_STATUS@{LCB\_\-EVT\_\-DSC\_\-M\_\-STATUS}}\item[{\em 
\hypertarget{LCB_8h_a260a93}{
LCB\_\-EVT\_\-DSC\_\-M\_\-STATUS}
\label{LCB_8h_a260a93}
}]Combined status, bit field mask \index{LCB_EVT_DSC_M_XSTATUS@{LCB\_\-EVT\_\-DSC\_\-M\_\-XSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_M_XSTATUS@{LCB\_\-EVT\_\-DSC\_\-M\_\-XSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a260a94}{
LCB\_\-EVT\_\-DSC\_\-M\_\-XSTATUS}
\label{LCB_8h_a260a94}
}]Transfer status, bit field mask \index{LCB_EVT_DSC_M_RSTATUS@{LCB\_\-EVT\_\-DSC\_\-M\_\-RSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_M_RSTATUS@{LCB\_\-EVT\_\-DSC\_\-M\_\-RSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a260a95}{
LCB\_\-EVT\_\-DSC\_\-M\_\-RSTATUS}
\label{LCB_8h_a260a95}
}]Receive status, bit field mask \end{description}
\end{Desc}

\hypertarget{LCB_8h_a258}{
\index{LCB.h@{LCB.h}!_LCB_EVT_DSC_S@{\_\-LCB\_\-EVT\_\-DSC\_\-S}}
\index{_LCB_EVT_DSC_S@{\_\-LCB\_\-EVT\_\-DSC\_\-S}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-EVT\_\-DSC\_\-S]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a258}{\_\-LCB\_\-EVT\_\-DSC\_\-S}}}
\label{LCB_8h_a258}


Size, in bits, of the event descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_EVT_DSC_S_OFFSET@{LCB\_\-EVT\_\-DSC\_\-S\_\-OFFSET}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_S_OFFSET@{LCB\_\-EVT\_\-DSC\_\-S\_\-OFFSET}}\item[{\em 
\hypertarget{LCB_8h_a258a81}{
LCB\_\-EVT\_\-DSC\_\-S\_\-OFFSET}
\label{LCB_8h_a258a81}
}]Circular buffer offset, size in bits \index{LCB_EVT_DSC_S_LEN@{LCB\_\-EVT\_\-DSC\_\-S\_\-LEN}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_S_LEN@{LCB\_\-EVT\_\-DSC\_\-S\_\-LEN}}\item[{\em 
\hypertarget{LCB_8h_a258a82}{
LCB\_\-EVT\_\-DSC\_\-S\_\-LEN}
\label{LCB_8h_a258a82}
}]Size of the event in units of 32-bit words, size in bits \index{LCB_EVT_DSC_S_STATUS@{LCB\_\-EVT\_\-DSC\_\-S\_\-STATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_S_STATUS@{LCB\_\-EVT\_\-DSC\_\-S\_\-STATUS}}\item[{\em 
\hypertarget{LCB_8h_a258a83}{
LCB\_\-EVT\_\-DSC\_\-S\_\-STATUS}
\label{LCB_8h_a258a83}
}]Combined status, size in bits \index{LCB_EVT_DSC_S_XSTATUS@{LCB\_\-EVT\_\-DSC\_\-S\_\-XSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_S_XSTATUS@{LCB\_\-EVT\_\-DSC\_\-S\_\-XSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a258a84}{
LCB\_\-EVT\_\-DSC\_\-S\_\-XSTATUS}
\label{LCB_8h_a258a84}
}]Transfer status, size in bits \index{LCB_EVT_DSC_S_RSTATUS@{LCB\_\-EVT\_\-DSC\_\-S\_\-RSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_S_RSTATUS@{LCB\_\-EVT\_\-DSC\_\-S\_\-RSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a258a85}{
LCB\_\-EVT\_\-DSC\_\-S\_\-RSTATUS}
\label{LCB_8h_a258a85}
}]Receive status, size in bits \end{description}
\end{Desc}

\hypertarget{LCB_8h_a259}{
\index{LCB.h@{LCB.h}!_LCB_EVT_DSC_V@{\_\-LCB\_\-EVT\_\-DSC\_\-V}}
\index{_LCB_EVT_DSC_V@{\_\-LCB\_\-EVT\_\-DSC\_\-V}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-EVT\_\-DSC\_\-V]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a259}{\_\-LCB\_\-EVT\_\-DSC\_\-V}}}
\label{LCB_8h_a259}


Right justified bit offsets of the event descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_EVT_DSC_V_OFFSET@{LCB\_\-EVT\_\-DSC\_\-V\_\-OFFSET}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_V_OFFSET@{LCB\_\-EVT\_\-DSC\_\-V\_\-OFFSET}}\item[{\em 
\hypertarget{LCB_8h_a259a86}{
LCB\_\-EVT\_\-DSC\_\-V\_\-OFFSET}
\label{LCB_8h_a259a86}
}]Circular buffer offset, bit field offset \index{LCB_EVT_DSC_V_LEN@{LCB\_\-EVT\_\-DSC\_\-V\_\-LEN}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_V_LEN@{LCB\_\-EVT\_\-DSC\_\-V\_\-LEN}}\item[{\em 
\hypertarget{LCB_8h_a259a87}{
LCB\_\-EVT\_\-DSC\_\-V\_\-LEN}
\label{LCB_8h_a259a87}
}]Size of the event in units of 32-bit words, bit field offset \index{LCB_EVT_DSC_V_STATUS@{LCB\_\-EVT\_\-DSC\_\-V\_\-STATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_V_STATUS@{LCB\_\-EVT\_\-DSC\_\-V\_\-STATUS}}\item[{\em 
\hypertarget{LCB_8h_a259a88}{
LCB\_\-EVT\_\-DSC\_\-V\_\-STATUS}
\label{LCB_8h_a259a88}
}]Combined status, bit field offset \index{LCB_EVT_DSC_V_XSTATUS@{LCB\_\-EVT\_\-DSC\_\-V\_\-XSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_V_XSTATUS@{LCB\_\-EVT\_\-DSC\_\-V\_\-XSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a259a89}{
LCB\_\-EVT\_\-DSC\_\-V\_\-XSTATUS}
\label{LCB_8h_a259a89}
}]Transfer status, bit field offset \index{LCB_EVT_DSC_V_RSTATUS@{LCB\_\-EVT\_\-DSC\_\-V\_\-RSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_DSC_V_RSTATUS@{LCB\_\-EVT\_\-DSC\_\-V\_\-RSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a259a90}{
LCB\_\-EVT\_\-DSC\_\-V\_\-RSTATUS}
\label{LCB_8h_a259a90}
}]Receive status, bit field offset \end{description}
\end{Desc}

\hypertarget{LCB_8h_a264}{
\index{LCB.h@{LCB.h}!_LCB_EVT_ERR_RCV@{\_\-LCB\_\-EVT\_\-ERR\_\-RCV}}
\index{_LCB_EVT_ERR_RCV@{\_\-LCB\_\-EVT\_\-ERR\_\-RCV}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-EVT\_\-ERR\_\-RCV]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a264}{\_\-LCB\_\-EVT\_\-ERR\_\-RCV}}}
\label{LCB_8h_a264}


Enumeration of possible LCB receive errors. 

These are errors that the LCB detects when accepting data from a LATp event fabric. These map the 2-bit field in event descriptor.\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_EVT_ERR_RCV_SUCCESS@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-SUCCESS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_RCV_SUCCESS@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-SUCCESS}}\item[{\em 
\hypertarget{LCB_8h_a264a131}{
LCB\_\-EVT\_\-ERR\_\-RCV\_\-SUCCESS}
\label{LCB_8h_a264a131}
}]LATp success \index{LCB_EVT_ERR_RCV_UNDEFINED_1@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-UNDEFINED\_\-1}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_RCV_UNDEFINED_1@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-UNDEFINED\_\-1}}\item[{\em 
\hypertarget{LCB_8h_a264a132}{
LCB\_\-EVT\_\-ERR\_\-RCV\_\-UNDEFINED\_\-1}
\label{LCB_8h_a264a132}
}]Undefined error \#1 \index{LCB_EVT_ERR_RCV_INVALID_DATA_PARITY@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_RCV_INVALID_DATA_PARITY@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY}}\item[{\em 
\hypertarget{LCB_8h_a264a133}{
LCB\_\-EVT\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY}
\label{LCB_8h_a264a133}
}]LATp data parity error \index{LCB_EVT_ERR_RCV_PACKET_TRUNCATED@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-PACKET\_\-TRUNCATED}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_RCV_PACKET_TRUNCATED@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-PACKET\_\-TRUNCATED}}\item[{\em 
\hypertarget{LCB_8h_a264a134}{
LCB\_\-EVT\_\-ERR\_\-RCV\_\-PACKET\_\-TRUNCATED}
\label{LCB_8h_a264a134}
}]LATp packet truncated error \index{LCB_EVT_ERR_RCV_CNT@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-CNT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_RCV_CNT@{LCB\_\-EVT\_\-ERR\_\-RCV\_\-CNT}}\item[{\em 
\hypertarget{LCB_8h_a264a135}{
LCB\_\-EVT\_\-ERR\_\-RCV\_\-CNT}
\label{LCB_8h_a264a135}
}]Count of these error types \end{description}
\end{Desc}

\hypertarget{LCB_8h_a263}{
\index{LCB.h@{LCB.h}!_LCB_EVT_ERR_XFR@{\_\-LCB\_\-EVT\_\-ERR\_\-XFR}}
\index{_LCB_EVT_ERR_XFR@{\_\-LCB\_\-EVT\_\-ERR\_\-XFR}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-EVT\_\-ERR\_\-XFR]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a263}{\_\-LCB\_\-EVT\_\-ERR\_\-XFR}}}
\label{LCB_8h_a263}


Enumeration of possible EVENT transfer errros. 

These errors occur when the LCB transfers data across the PCI bus into the circular buffer.\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_EVT_ERR_XFR_SUCCESS@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-SUCCESS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_SUCCESS@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-SUCCESS}}\item[{\em 
\hypertarget{LCB_8h_a263a122}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-SUCCESS}
\label{LCB_8h_a263a122}
}]Transfer okay \index{LCB_EVT_ERR_XFR_PCI_MASTER_ABORT@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-MASTER\_\-ABORT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_PCI_MASTER_ABORT@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-MASTER\_\-ABORT}}\item[{\em 
\hypertarget{LCB_8h_a263a123}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-MASTER\_\-ABORT}
\label{LCB_8h_a263a123}
}]PCI Master Abort error \index{LCB_EVT_ERR_XFR_PCI_PARITY_ERROR@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-PARITY\_\-ERROR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_PCI_PARITY_ERROR@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-PARITY\_\-ERROR}}\item[{\em 
\hypertarget{LCB_8h_a263a124}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-PARITY\_\-ERROR}
\label{LCB_8h_a263a124}
}]PCI Parity Error,NOT REPORTED \index{LCB_EVT_ERR_XFR_PCI_TARGET_ABORT@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-TARGET\_\-ABORT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_PCI_TARGET_ABORT@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-TARGET\_\-ABORT}}\item[{\em 
\hypertarget{LCB_8h_a263a125}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-PCI\_\-TARGET\_\-ABORT}
\label{LCB_8h_a263a125}
}]PCI Target Abort error \index{LCB_EVT_ERR_XFR_UNDEFINED_4@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-4}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_UNDEFINED_4@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-4}}\item[{\em 
\hypertarget{LCB_8h_a263a126}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-4}
\label{LCB_8h_a263a126}
}]PCI Stop asserted, DEFUNCT \index{LCB_EVT_ERR_XFR_BUFFER_EMPTY@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-BUFFER\_\-EMPTY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_BUFFER_EMPTY@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-BUFFER\_\-EMPTY}}\item[{\em 
\hypertarget{LCB_8h_a263a127}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-BUFFER\_\-EMPTY}
\label{LCB_8h_a263a127}
}]Undefined error \#4 \index{LCB_EVT_ERR_XFR_UNDEFINED_6@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-6}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_UNDEFINED_6@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-6}}\item[{\em 
\hypertarget{LCB_8h_a263a128}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-UNDEFINED\_\-6}
\label{LCB_8h_a263a128}
}]Insufficient memory, DEFUNCT \index{LCB_EVT_ERR_XFR_Q_EMPTY@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-Q\_\-EMPTY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_Q_EMPTY@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-Q\_\-EMPTY}}\item[{\em 
\hypertarget{LCB_8h_a263a129}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-Q\_\-EMPTY}
\label{LCB_8h_a263a129}
}]Undefined error \#6 \index{LCB_EVT_ERR_XFR_CNT@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-CNT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_EVT_ERR_XFR_CNT@{LCB\_\-EVT\_\-ERR\_\-XFR\_\-CNT}}\item[{\em 
\hypertarget{LCB_8h_a263a130}{
LCB\_\-EVT\_\-ERR\_\-XFR\_\-CNT}
\label{LCB_8h_a263a130}
}]Count of RESULT in errors \end{description}
\end{Desc}

\hypertarget{LCB_8h_a251}{
\index{LCB.h@{LCB.h}!_LCB_IRQ_COND@{\_\-LCB\_\-IRQ\_\-COND}}
\index{_LCB_IRQ_COND@{\_\-LCB\_\-IRQ\_\-COND}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-IRQ\_\-COND]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a251}{\_\-LCB\_\-IRQ\_\-COND}}}
\label{LCB_8h_a251}


Enumerates the Interrupt Request conditions, both event buffer and event queue. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_IRQ_COND_75_FULL@{LCB\_\-IRQ\_\-COND\_\-75\_\-FULL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_COND_75_FULL@{LCB\_\-IRQ\_\-COND\_\-75\_\-FULL}}\item[{\em 
\hypertarget{LCB_8h_a251a59}{
LCB\_\-IRQ\_\-COND\_\-75\_\-FULL}
\label{LCB_8h_a251a59}
}]Interrupt condition -- 75\% full \index{LCB_IRQ_COND_50_FULL@{LCB\_\-IRQ\_\-COND\_\-50\_\-FULL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_COND_50_FULL@{LCB\_\-IRQ\_\-COND\_\-50\_\-FULL}}\item[{\em 
\hypertarget{LCB_8h_a251a60}{
LCB\_\-IRQ\_\-COND\_\-50\_\-FULL}
\label{LCB_8h_a251a60}
}]Interrupt condition -- 50\% full \index{LCB_IRQ_COND_25_FULL@{LCB\_\-IRQ\_\-COND\_\-25\_\-FULL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_COND_25_FULL@{LCB\_\-IRQ\_\-COND\_\-25\_\-FULL}}\item[{\em 
\hypertarget{LCB_8h_a251a61}{
LCB\_\-IRQ\_\-COND\_\-25\_\-FULL}
\label{LCB_8h_a251a61}
}]Interrupt condition -- 25\% full \index{LCB_IRQ_COND_NOT_EMPTY@{LCB\_\-IRQ\_\-COND\_\-NOT\_\-EMPTY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_COND_NOT_EMPTY@{LCB\_\-IRQ\_\-COND\_\-NOT\_\-EMPTY}}\item[{\em 
\hypertarget{LCB_8h_a251a62}{
LCB\_\-IRQ\_\-COND\_\-NOT\_\-EMPTY}
\label{LCB_8h_a251a62}
}]Interrupt condition -- NOT empty \end{description}
\end{Desc}

\hypertarget{LCB_8h_a269}{
\index{LCB.h@{LCB.h}!_LCB_IRQ_K@{\_\-LCB\_\-IRQ\_\-K}}
\index{_LCB_IRQ_K@{\_\-LCB\_\-IRQ\_\-K}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-IRQ\_\-K]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a269}{\_\-LCB\_\-IRQ\_\-K}}}
\label{LCB_8h_a269}


Enumerates the 4 interrupt sources. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_IRQ_K_RESULT@{LCB\_\-IRQ\_\-K\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_K_RESULT@{LCB\_\-IRQ\_\-K\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a269a164}{
LCB\_\-IRQ\_\-K\_\-RESULT}
\label{LCB_8h_a269a164}
}]The interrupt associated with the result que \index{LCB_IRQ_K_EVENT@{LCB\_\-IRQ\_\-K\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_K_EVENT@{LCB\_\-IRQ\_\-K\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a269a165}{
LCB\_\-IRQ\_\-K\_\-EVENT}
\label{LCB_8h_a269a165}
}]The interrupt associated with the event que \index{LCB_IRQ_K_CLK_ON@{LCB\_\-IRQ\_\-K\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_K_CLK_ON@{LCB\_\-IRQ\_\-K\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a269a166}{
LCB\_\-IRQ\_\-K\_\-CLK\_\-ON}
\label{LCB_8h_a269a166}
}]The interrupt associated with the clock {\em off -$>$ on\/} tranistion \index{LCB_IRQ_K_CLK_OFF@{LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_K_CLK_OFF@{LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a269a167}{
LCB\_\-IRQ\_\-K\_\-CLK\_\-OFF}
\label{LCB_8h_a269a167}
}]The interrupt associated with the clock {\em on -$>$ off,\/} tranistion \index{LCB_IRQ_K_SRC_CNT@{LCB\_\-IRQ\_\-K\_\-SRC\_\-CNT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_K_SRC_CNT@{LCB\_\-IRQ\_\-K\_\-SRC\_\-CNT}}\item[{\em 
\hypertarget{LCB_8h_a269a168}{
LCB\_\-IRQ\_\-K\_\-SRC\_\-CNT}
\label{LCB_8h_a269a168}
}]The number of interrupt sources \end{description}
\end{Desc}

\hypertarget{LCB_8h_a270}{
\index{LCB.h@{LCB.h}!_LCB_IRQ_M@{\_\-LCB\_\-IRQ\_\-M}}
\index{_LCB_IRQ_M@{\_\-LCB\_\-IRQ\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-IRQ\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a270}{\_\-LCB\_\-IRQ\_\-M}}}
\label{LCB_8h_a270}


Enumerates the bit mask for the 4 interrupt sources. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_IRQ_M_RESULT@{LCB\_\-IRQ\_\-M\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_M_RESULT@{LCB\_\-IRQ\_\-M\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a270a169}{
LCB\_\-IRQ\_\-M\_\-RESULT}
\label{LCB_8h_a270a169}
}]Bit mask for result \index{LCB_IRQ_M_EVENT@{LCB\_\-IRQ\_\-M\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_M_EVENT@{LCB\_\-IRQ\_\-M\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a270a170}{
LCB\_\-IRQ\_\-M\_\-EVENT}
\label{LCB_8h_a270a170}
}]Bit mask for event \index{LCB_IRQ_M_CLK_ON@{LCB\_\-IRQ\_\-M\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_M_CLK_ON@{LCB\_\-IRQ\_\-M\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a270a171}{
LCB\_\-IRQ\_\-M\_\-CLK\_\-ON}
\label{LCB_8h_a270a171}
}]Bit mask for clock on \index{LCB_IRQ_M_CLK_OFF@{LCB\_\-IRQ\_\-M\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_M_CLK_OFF@{LCB\_\-IRQ\_\-M\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a270a172}{
LCB\_\-IRQ\_\-M\_\-CLK\_\-OFF}
\label{LCB_8h_a270a172}
}]Bit mask for clock off \index{LCB_IRQ_M_CLKS@{LCB\_\-IRQ\_\-M\_\-CLKS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_IRQ_M_CLKS@{LCB\_\-IRQ\_\-M\_\-CLKS}}\item[{\em 
\hypertarget{LCB_8h_a270a173}{
LCB\_\-IRQ\_\-M\_\-CLKS}
\label{LCB_8h_a270a173}
}]Bit mask for both clock on and clock off \end{description}
\end{Desc}

\hypertarget{LCB_8h_a268}{
\index{LCB.h@{LCB.h}!_LCB_PCI_CSR_IRQEVTQUE_M@{\_\-LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M}}
\index{_LCB_PCI_CSR_IRQEVTQUE_M@{\_\-LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a268}{\_\-LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M}}}
\label{LCB_8h_a268}


Enumerates the event buffer interrupt conditions as in place values. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_CSR_IRQEVTQUE_M_COND_75_FULL@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-75\_\-FULL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_IRQEVTQUE_M_COND_75_FULL@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-75\_\-FULL}}\item[{\em 
\hypertarget{LCB_8h_a268a160}{
LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-75\_\-FULL}
\label{LCB_8h_a268a160}
}]Interrupt when event queue is at least 75\% full \index{LCB_PCI_CSR_IRQEVTQUE_M_COND_50_FULL@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-50\_\-FULL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_IRQEVTQUE_M_COND_50_FULL@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-50\_\-FULL}}\item[{\em 
\hypertarget{LCB_8h_a268a161}{
LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-50\_\-FULL}
\label{LCB_8h_a268a161}
}]Interrupt when event queue is at least 50\% full \index{LCB_PCI_CSR_IRQEVTQUE_M_COND_25_FULL@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-25\_\-FULL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_IRQEVTQUE_M_COND_25_FULL@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-25\_\-FULL}}\item[{\em 
\hypertarget{LCB_8h_a268a162}{
LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-25\_\-FULL}
\label{LCB_8h_a268a162}
}]Interrupt when event queue is at least 75\% full \index{LCB_PCI_CSR_IRQEVTQUE_M_COND_NOT_EMPTY@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-NOT\_\-EMPTY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_IRQEVTQUE_M_COND_NOT_EMPTY@{LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-NOT\_\-EMPTY}}\item[{\em 
\hypertarget{LCB_8h_a268a163}{
LCB\_\-PCI\_\-CSR\_\-IRQEVTQUE\_\-M\_\-COND\_\-NOT\_\-EMPTY}
\label{LCB_8h_a268a163}
}]Interrupt when event queue is not empty \end{description}
\end{Desc}

\hypertarget{LCB_8h_a267}{
\index{LCB.h@{LCB.h}!_LCB_PCI_CSR_M@{\_\-LCB\_\-PCI\_\-CSR\_\-M}}
\index{_LCB_PCI_CSR_M@{\_\-LCB\_\-PCI\_\-CSR\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-CSR\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a267}{\_\-LCB\_\-PCI\_\-CSR\_\-M}}}
\label{LCB_8h_a267}


Defines bit masks for the various fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_CSR_M_INHBREQX@{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBREQX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_INHBREQX@{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBREQX}}\item[{\em 
\hypertarget{LCB_8h_a267a152}{
LCB\_\-PCI\_\-CSR\_\-M\_\-INHBREQX}
\label{LCB_8h_a267a152}
}]Inhibit request transfer, testing only \index{LCB_PCI_CSR_M_INHBRSTX@{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBRSTX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_INHBRSTX@{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBRSTX}}\item[{\em 
\hypertarget{LCB_8h_a267a153}{
LCB\_\-PCI\_\-CSR\_\-M\_\-INHBRSTX}
\label{LCB_8h_a267a153}
}]Inhibit result transfer, testing only \index{LCB_PCI_CSR_M_INHBEVTX@{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBEVTX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_INHBEVTX@{LCB\_\-PCI\_\-CSR\_\-M\_\-INHBEVTX}}\item[{\em 
\hypertarget{LCB_8h_a267a154}{
LCB\_\-PCI\_\-CSR\_\-M\_\-INHBEVTX}
\label{LCB_8h_a267a154}
}]Inhibit event transfer, testing only \index{LCB_PCI_CSR_M_IRQEVTQUE@{LCB\_\-PCI\_\-CSR\_\-M\_\-IRQEVTQUE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_IRQEVTQUE@{LCB\_\-PCI\_\-CSR\_\-M\_\-IRQEVTQUE}}\item[{\em 
\hypertarget{LCB_8h_a267a155}{
LCB\_\-PCI\_\-CSR\_\-M\_\-IRQEVTQUE}
\label{LCB_8h_a267a155}
}]Event queue interrupt condition \index{LCB_PCI_CSR_M_MBZ@{LCB\_\-PCI\_\-CSR\_\-M\_\-MBZ}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_MBZ@{LCB\_\-PCI\_\-CSR\_\-M\_\-MBZ}}\item[{\em 
\hypertarget{LCB_8h_a267a156}{
LCB\_\-PCI\_\-CSR\_\-M\_\-MBZ}
\label{LCB_8h_a267a156}
}]Former Event buffer interrupt condition, now MBZ \index{LCB_PCI_CSR_M_CLK@{LCB\_\-PCI\_\-CSR\_\-M\_\-CLK}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_CLK@{LCB\_\-PCI\_\-CSR\_\-M\_\-CLK}}\item[{\em 
\hypertarget{LCB_8h_a267a157}{
LCB\_\-PCI\_\-CSR\_\-M\_\-CLK}
\label{LCB_8h_a267a157}
}]Clock present, read-only \index{LCB_PCI_CSR_M_UNUSED1@{LCB\_\-PCI\_\-CSR\_\-M\_\-UNUSED1}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_UNUSED1@{LCB\_\-PCI\_\-CSR\_\-M\_\-UNUSED1}}\item[{\em 
\hypertarget{LCB_8h_a267a158}{
LCB\_\-PCI\_\-CSR\_\-M\_\-UNUSED1}
\label{LCB_8h_a267a158}
}]Unused -- must be zero \index{LCB_PCI_CSR_M_LCB_RESET@{LCB\_\-PCI\_\-CSR\_\-M\_\-LCB\_\-RESET}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_M_LCB_RESET@{LCB\_\-PCI\_\-CSR\_\-M\_\-LCB\_\-RESET}}\item[{\em 
\hypertarget{LCB_8h_a267a159}{
LCB\_\-PCI\_\-CSR\_\-M\_\-LCB\_\-RESET}
\label{LCB_8h_a267a159}
}]Initiate a reset of the LCB itself \end{description}
\end{Desc}

\hypertarget{LCB_8h_a265}{
\index{LCB.h@{LCB.h}!_LCB_PCI_CSR_S@{\_\-LCB\_\-PCI\_\-CSR\_\-S}}
\index{_LCB_PCI_CSR_S@{\_\-LCB\_\-PCI\_\-CSR\_\-S}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-CSR\_\-S]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a265}{\_\-LCB\_\-PCI\_\-CSR\_\-S}}}
\label{LCB_8h_a265}


Defines the size, in bits, for the various fields. 

;\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_CSR_S_INHBREQX@{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBREQX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_INHBREQX@{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBREQX}}\item[{\em 
\hypertarget{LCB_8h_a265a136}{
LCB\_\-PCI\_\-CSR\_\-S\_\-INHBREQX}
\label{LCB_8h_a265a136}
}]Inhibit request transfer,testing only \index{LCB_PCI_CSR_S_INHBRSTX@{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBRSTX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_INHBRSTX@{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBRSTX}}\item[{\em 
\hypertarget{LCB_8h_a265a137}{
LCB\_\-PCI\_\-CSR\_\-S\_\-INHBRSTX}
\label{LCB_8h_a265a137}
}]Inhibit result transfer, testing only \index{LCB_PCI_CSR_S_INHBEVTX@{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBEVTX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_INHBEVTX@{LCB\_\-PCI\_\-CSR\_\-S\_\-INHBEVTX}}\item[{\em 
\hypertarget{LCB_8h_a265a138}{
LCB\_\-PCI\_\-CSR\_\-S\_\-INHBEVTX}
\label{LCB_8h_a265a138}
}]Inhibit event transfer, testing only \index{LCB_PCI_CSR_S_IRQEVTQUE@{LCB\_\-PCI\_\-CSR\_\-S\_\-IRQEVTQUE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_IRQEVTQUE@{LCB\_\-PCI\_\-CSR\_\-S\_\-IRQEVTQUE}}\item[{\em 
\hypertarget{LCB_8h_a265a139}{
LCB\_\-PCI\_\-CSR\_\-S\_\-IRQEVTQUE}
\label{LCB_8h_a265a139}
}]event queue interrupt condition \index{LCB_PCI_CSR_S_MBZ@{LCB\_\-PCI\_\-CSR\_\-S\_\-MBZ}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_MBZ@{LCB\_\-PCI\_\-CSR\_\-S\_\-MBZ}}\item[{\em 
\hypertarget{LCB_8h_a265a140}{
LCB\_\-PCI\_\-CSR\_\-S\_\-MBZ}
\label{LCB_8h_a265a140}
}]former event buffer interrupt condition, now MBZ \index{LCB_PCI_CSR_S_CLK@{LCB\_\-PCI\_\-CSR\_\-S\_\-CLK}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_CLK@{LCB\_\-PCI\_\-CSR\_\-S\_\-CLK}}\item[{\em 
\hypertarget{LCB_8h_a265a141}{
LCB\_\-PCI\_\-CSR\_\-S\_\-CLK}
\label{LCB_8h_a265a141}
}]Clock present, read-only \index{LCB_PCI_CSR_S_UNUSED1@{LCB\_\-PCI\_\-CSR\_\-S\_\-UNUSED1}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_UNUSED1@{LCB\_\-PCI\_\-CSR\_\-S\_\-UNUSED1}}\item[{\em 
\hypertarget{LCB_8h_a265a142}{
LCB\_\-PCI\_\-CSR\_\-S\_\-UNUSED1}
\label{LCB_8h_a265a142}
}]Unused -- must be zero \index{LCB_PCI_CSR_S_LCB_RESET@{LCB\_\-PCI\_\-CSR\_\-S\_\-LCB\_\-RESET}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_S_LCB_RESET@{LCB\_\-PCI\_\-CSR\_\-S\_\-LCB\_\-RESET}}\item[{\em 
\hypertarget{LCB_8h_a265a143}{
LCB\_\-PCI\_\-CSR\_\-S\_\-LCB\_\-RESET}
\label{LCB_8h_a265a143}
}]Initiate a reset of the LCB itself \end{description}
\end{Desc}

\hypertarget{LCB_8h_a266}{
\index{LCB.h@{LCB.h}!_LCB_PCI_CSR_V@{\_\-LCB\_\-PCI\_\-CSR\_\-V}}
\index{_LCB_PCI_CSR_V@{\_\-LCB\_\-PCI\_\-CSR\_\-V}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-CSR\_\-V]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a266}{\_\-LCB\_\-PCI\_\-CSR\_\-V}}}
\label{LCB_8h_a266}


Defines right shift amounts for the various fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_CSR_V_INHBREQX@{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBREQX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_INHBREQX@{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBREQX}}\item[{\em 
\hypertarget{LCB_8h_a266a144}{
LCB\_\-PCI\_\-CSR\_\-V\_\-INHBREQX}
\label{LCB_8h_a266a144}
}]Inhibit request transfer,testing only \index{LCB_PCI_CSR_V_INHBRSTX@{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBRSTX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_INHBRSTX@{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBRSTX}}\item[{\em 
\hypertarget{LCB_8h_a266a145}{
LCB\_\-PCI\_\-CSR\_\-V\_\-INHBRSTX}
\label{LCB_8h_a266a145}
}]Inhibit result transfer,testing only \index{LCB_PCI_CSR_V_INHBEVTX@{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBEVTX}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_INHBEVTX@{LCB\_\-PCI\_\-CSR\_\-V\_\-INHBEVTX}}\item[{\em 
\hypertarget{LCB_8h_a266a146}{
LCB\_\-PCI\_\-CSR\_\-V\_\-INHBEVTX}
\label{LCB_8h_a266a146}
}]Inhibit event transfer, testing only \index{LCB_PCI_CSR_V_IRQEVTQUE@{LCB\_\-PCI\_\-CSR\_\-V\_\-IRQEVTQUE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_IRQEVTQUE@{LCB\_\-PCI\_\-CSR\_\-V\_\-IRQEVTQUE}}\item[{\em 
\hypertarget{LCB_8h_a266a147}{
LCB\_\-PCI\_\-CSR\_\-V\_\-IRQEVTQUE}
\label{LCB_8h_a266a147}
}]event queue interrupt condition \index{LCB_PCI_CSR_V_MBZ@{LCB\_\-PCI\_\-CSR\_\-V\_\-MBZ}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_MBZ@{LCB\_\-PCI\_\-CSR\_\-V\_\-MBZ}}\item[{\em 
\hypertarget{LCB_8h_a266a148}{
LCB\_\-PCI\_\-CSR\_\-V\_\-MBZ}
\label{LCB_8h_a266a148}
}]former event buffer interrupt condition now mbz \index{LCB_PCI_CSR_V_CLK@{LCB\_\-PCI\_\-CSR\_\-V\_\-CLK}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_CLK@{LCB\_\-PCI\_\-CSR\_\-V\_\-CLK}}\item[{\em 
\hypertarget{LCB_8h_a266a149}{
LCB\_\-PCI\_\-CSR\_\-V\_\-CLK}
\label{LCB_8h_a266a149}
}]Clock present, read-only \index{LCB_PCI_CSR_V_UNUSED1@{LCB\_\-PCI\_\-CSR\_\-V\_\-UNUSED1}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_UNUSED1@{LCB\_\-PCI\_\-CSR\_\-V\_\-UNUSED1}}\item[{\em 
\hypertarget{LCB_8h_a266a150}{
LCB\_\-PCI\_\-CSR\_\-V\_\-UNUSED1}
\label{LCB_8h_a266a150}
}]Unused -- must be zero \index{LCB_PCI_CSR_V_LCB_RESET@{LCB\_\-PCI\_\-CSR\_\-V\_\-LCB\_\-RESET}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_CSR_V_LCB_RESET@{LCB\_\-PCI\_\-CSR\_\-V\_\-LCB\_\-RESET}}\item[{\em 
\hypertarget{LCB_8h_a266a151}{
LCB\_\-PCI\_\-CSR\_\-V\_\-LCB\_\-RESET}
\label{LCB_8h_a266a151}
}]Initiate a reset of the LCB itself \end{description}
\end{Desc}

\hypertarget{LCB_8h_a277}{
\index{LCB.h@{LCB.h}!_LCB_PCI_FABRIC_SELECT_M@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M}}
\index{_LCB_PCI_FABRIC_SELECT_M@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a277}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M}}}
\label{LCB_8h_a277}


Enumerates the mask field of the fields in the fabric select register. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_FABRIC_SELECT_M_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-PATH}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_M_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-PATH}}\item[{\em 
\hypertarget{LCB_8h_a277a249}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-PATH}
\label{LCB_8h_a277a249}
}]Path field, mask \index{LCB_PCI_FABRIC_SELECT_M_UNUSED@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-UNUSED}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_M_UNUSED@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-UNUSED}}\item[{\em 
\hypertarget{LCB_8h_a277a250}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-M\_\-UNUSED}
\label{LCB_8h_a277a250}
}]Unused field, mask \end{description}
\end{Desc}

\hypertarget{LCB_8h_a274}{
\index{LCB.h@{LCB.h}!_LCB_PCI_FABRIC_SELECT_PATH@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH}}
\index{_LCB_PCI_FABRIC_SELECT_PATH@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a274}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH}}}
\label{LCB_8h_a274}


Enumerates the possible values of the path field in the fabric select register. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_FABRIC_SELECT_PATH_K_PRIMARY@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-PRIMARY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_PATH_K_PRIMARY@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-PRIMARY}}\item[{\em 
\hypertarget{LCB_8h_a274a243}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-PRIMARY}
\label{LCB_8h_a274a243}
}]Use primary path \index{LCB_PCI_FABRIC_SELECT_PATH_K_REDUNDANT@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-REDUNDANT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_PATH_K_REDUNDANT@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-REDUNDANT}}\item[{\em 
\hypertarget{LCB_8h_a274a244}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-PATH\_\-K\_\-REDUNDANT}
\label{LCB_8h_a274a244}
}]Use redundant path \end{description}
\end{Desc}

\hypertarget{LCB_8h_a275}{
\index{LCB.h@{LCB.h}!_LCB_PCI_FABRIC_SELECT_S@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S}}
\index{_LCB_PCI_FABRIC_SELECT_S@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a275}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S}}}
\label{LCB_8h_a275}


Enumerates the size, in bits, of the fields in the fabric select register. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_FABRIC_SELECT_S_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-PATH}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_S_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-PATH}}\item[{\em 
\hypertarget{LCB_8h_a275a245}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-PATH}
\label{LCB_8h_a275a245}
}]Path size, in bits \index{LCB_PCI_FABRIC_SELECT_S_UNUSED@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-UNUSED}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_S_UNUSED@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-UNUSED}}\item[{\em 
\hypertarget{LCB_8h_a275a246}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-S\_\-UNUSED}
\label{LCB_8h_a275a246}
}]Unused size, in bits, MBZ \end{description}
\end{Desc}

\hypertarget{LCB_8h_a276}{
\index{LCB.h@{LCB.h}!_LCB_PCI_FABRIC_SELECT_V@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V}}
\index{_LCB_PCI_FABRIC_SELECT_V@{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a276}{\_\-LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V}}}
\label{LCB_8h_a276}


Enumerates the right justified bit offsets of the fields in the fabric select register. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_FABRIC_SELECT_V_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-PATH}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_V_PATH@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-PATH}}\item[{\em 
\hypertarget{LCB_8h_a276a247}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-PATH}
\label{LCB_8h_a276a247}
}]Path size, in bits \index{LCB_PCI_FABRIC_SELECT_V_UNUSED@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-UNUSED}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_FABRIC_SELECT_V_UNUSED@{LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-UNUSED}}\item[{\em 
\hypertarget{LCB_8h_a276a248}{
LCB\_\-PCI\_\-FABRIC\_\-SELECT\_\-V\_\-UNUSED}
\label{LCB_8h_a276a248}
}]Unused size, in bits, MBZ \end{description}
\end{Desc}

\hypertarget{LCB_8h_a273}{
\index{LCB.h@{LCB.h}!_LCB_PCI_IRQ_M@{\_\-LCB\_\-PCI\_\-IRQ\_\-M}}
\index{_LCB_PCI_IRQ_M@{\_\-LCB\_\-PCI\_\-IRQ\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-IRQ\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a273}{\_\-LCB\_\-PCI\_\-IRQ\_\-M}}}
\label{LCB_8h_a273}


Enumerates the IRQ enable/disable/pending bits. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_IRQ_M_ENABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_ENABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a273a216}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-RESULT}
\label{LCB_8h_a273a216}
}]Enable the result interrupt, mask field \index{LCB_PCI_IRQ_M_ENABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_ENABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a273a217}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-EVENT}
\label{LCB_8h_a273a217}
}]Enable the event interrupt, mask field \index{LCB_PCI_IRQ_M_ENABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_ENABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a273a218}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-ON}
\label{LCB_8h_a273a218}
}]Enable the clock on interrupt, mask field \index{LCB_PCI_IRQ_M_ENABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_ENABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a273a219}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLK\_\-OFF}
\label{LCB_8h_a273a219}
}]Enable the clock off interrupt, mask field \index{LCB_PCI_IRQ_M_ENABLE_CLKS@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLKS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_ENABLE_CLKS@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLKS}}\item[{\em 
\hypertarget{LCB_8h_a273a221}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-CLKS}
\label{LCB_8h_a273a221}
}]Enable both result and event interrupts \index{LCB_PCI_IRQ_M_ENABLE_ALL@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-ALL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_ENABLE_ALL@{LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-ALL}}\item[{\em 
\hypertarget{LCB_8h_a273a222}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-ENABLE\_\-ALL}
\label{LCB_8h_a273a222}
}]Enable both clock on and clock off interrupts \index{LCB_PCI_IRQ_M_DISABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_DISABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a273a223}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-RESULT}
\label{LCB_8h_a273a223}
}]Enable all the interrupts, mask field Disable the result interrupt, mask field \index{LCB_PCI_IRQ_M_DISABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_DISABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a273a224}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-EVENT}
\label{LCB_8h_a273a224}
}]Disable the event interrupt, mask field \index{LCB_PCI_IRQ_M_DISABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_DISABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a273a225}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-ON}
\label{LCB_8h_a273a225}
}]Disable the clock on interrupt, mask field \index{LCB_PCI_IRQ_M_DISABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_DISABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a273a226}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLK\_\-OFF}
\label{LCB_8h_a273a226}
}]Disable the clock off interrupt, mask field \index{LCB_PCI_IRQ_M_DISABLE_CLKS@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLKS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_DISABLE_CLKS@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLKS}}\item[{\em 
\hypertarget{LCB_8h_a273a228}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-CLKS}
\label{LCB_8h_a273a228}
}]Disable both the result and event interrupts \index{LCB_PCI_IRQ_M_DISABLE_ALL@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-ALL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_DISABLE_ALL@{LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-ALL}}\item[{\em 
\hypertarget{LCB_8h_a273a229}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-DISABLE\_\-ALL}
\label{LCB_8h_a273a229}
}]Enable both clock on and clock off interrupts \index{LCB_PCI_IRQ_M_PENDING_RESULT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_PENDING_RESULT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a273a230}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-RESULT}
\label{LCB_8h_a273a230}
}]Enable all the interrupts, mask field Result pending, read-only, mask field \index{LCB_PCI_IRQ_M_PENDING_EVENT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_PENDING_EVENT@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a273a231}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-EVENT}
\label{LCB_8h_a273a231}
}]Event pending, read-only, mask field \index{LCB_PCI_IRQ_M_PENDING_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_PENDING_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a273a232}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-ON}
\label{LCB_8h_a273a232}
}]Clock on pending, read-only, mask field \index{LCB_PCI_IRQ_M_PENDING_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_PENDING_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a273a233}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-CLK\_\-OFF}
\label{LCB_8h_a273a233}
}]Clock off pending, read-only, mask field \index{LCB_PCI_IRQ_M_PENDING_QUES@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-QUES}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_PENDING_QUES@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-QUES}}\item[{\em 
\hypertarget{LCB_8h_a273a234}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-QUES}
\label{LCB_8h_a273a234}
}]State of both result and event pending bits, read-only, mask field \index{LCB_PCI_IRQ_M_PENDING_ALL@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-ALL}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_PENDING_ALL@{LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-ALL}}\item[{\em 
\hypertarget{LCB_8h_a273a236}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-PENDING\_\-ALL}
\label{LCB_8h_a273a236}
}]State of both clock on and clock off pending bits, read-only mask field \index{LCB_PCI_IRQ_M_CBUF_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-ENABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_CBUF_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-ENABLE}}\item[{\em 
\hypertarget{LCB_8h_a273a237}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-ENABLE}
\label{LCB_8h_a273a237}
}]State of all the pending bits, read-only, mask field Enable the circular buffer full interrupt, on write; on read 0 = disabled, 1 = enabled \index{LCB_PCI_IRQ_M_CBUF_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-DISABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_CBUF_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-DISABLE}}\item[{\em 
\hypertarget{LCB_8h_a273a238}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-DISABLE}
\label{LCB_8h_a273a238}
}]Disable the circular buffer full interrupt, on write; on read, mbz \index{LCB_PCI_IRQ_M_CBUF_PENDING_BUF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-BUF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_CBUF_PENDING_BUF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-BUF}}\item[{\em 
\hypertarget{LCB_8h_a273a239}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-BUF}
\label{LCB_8h_a273a239}
}]State of interrupt of circular buffer full condition (read-only) \index{LCB_PCI_IRQ_M_CBUF_PENDING_QUE@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-QUE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_CBUF_PENDING_QUE@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-QUE}}\item[{\em 
\hypertarget{LCB_8h_a273a240}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF\_\-PENDING\_\-QUE}
\label{LCB_8h_a273a240}
}]State of interrupt of circular queue condition (read-only) \index{LCB_PCI_IRQ_M_CBUF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_CBUF@{LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF}}\item[{\em 
\hypertarget{LCB_8h_a273a241}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-CBUF}
\label{LCB_8h_a273a241}
}]Mask for the circular buffer set \index{LCB_PCI_IRQ_M_UNUSED1@{LCB\_\-PCI\_\-IRQ\_\-M\_\-UNUSED1}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_M_UNUSED1@{LCB\_\-PCI\_\-IRQ\_\-M\_\-UNUSED1}}\item[{\em 
\hypertarget{LCB_8h_a273a242}{
LCB\_\-PCI\_\-IRQ\_\-M\_\-UNUSED1}
\label{LCB_8h_a273a242}
}]Unused, mbz \end{description}
\end{Desc}

\hypertarget{LCB_8h_a271}{
\index{LCB.h@{LCB.h}!_LCB_PCI_IRQ_S@{\_\-LCB\_\-PCI\_\-IRQ\_\-S}}
\index{_LCB_PCI_IRQ_S@{\_\-LCB\_\-PCI\_\-IRQ\_\-S}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-IRQ\_\-S]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a271}{\_\-LCB\_\-PCI\_\-IRQ\_\-S}}}
\label{LCB_8h_a271}


Enumerates bit sizes of the IRQ enable/disable/pending fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_IRQ_S_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE}}\item[{\em 
\hypertarget{LCB_8h_a271a174}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE}
\label{LCB_8h_a271a174}
}]Enable field size, in bits \index{LCB_PCI_IRQ_S_ENABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_ENABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a271a175}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-RESULT}
\label{LCB_8h_a271a175}
}]Enable the result interrupt, size \index{LCB_PCI_IRQ_S_ENABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_ENABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a271a176}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-EVENT}
\label{LCB_8h_a271a176}
}]Enable the event interrupt, size \index{LCB_PCI_IRQ_S_ENABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_ENABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a271a177}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-ON}
\label{LCB_8h_a271a177}
}]Enable clock on interrupt, size \index{LCB_PCI_IRQ_S_ENABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_ENABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a271a178}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-ENABLE\_\-CLK\_\-OFF}
\label{LCB_8h_a271a178}
}]Enable clock off interrupt, size \index{LCB_PCI_IRQ_S_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE}}\item[{\em 
\hypertarget{LCB_8h_a271a179}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE}
\label{LCB_8h_a271a179}
}]Disable field size, in bits \index{LCB_PCI_IRQ_S_DISABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_DISABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a271a180}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-RESULT}
\label{LCB_8h_a271a180}
}]Disable the result interrupt, size \index{LCB_PCI_IRQ_S_DISABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_DISABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a271a181}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-EVENT}
\label{LCB_8h_a271a181}
}]Disable the event interrupt, size \index{LCB_PCI_IRQ_S_DISABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_DISABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a271a182}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-ON}
\label{LCB_8h_a271a182}
}]Disable clock on interrupt, size \index{LCB_PCI_IRQ_S_DISABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_DISABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a271a183}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-DISABLE\_\-CLK\_\-OFF}
\label{LCB_8h_a271a183}
}]Disable clock off interrupt, size \index{LCB_PCI_IRQ_S_PENDING@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_PENDING@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING}}\item[{\em 
\hypertarget{LCB_8h_a271a184}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING}
\label{LCB_8h_a271a184}
}]Pending field size, in bits, \index{LCB_PCI_IRQ_S_PENDING_RESULT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_PENDING_RESULT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a271a185}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-RESULT}
\label{LCB_8h_a271a185}
}]Result pending, read-only, size \index{LCB_PCI_IRQ_S_PENDING_EVENT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_PENDING_EVENT@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a271a186}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-EVENT}
\label{LCB_8h_a271a186}
}]Event pending, read-only, size \index{LCB_PCI_IRQ_S_PENDING_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_PENDING_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a271a187}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-ON}
\label{LCB_8h_a271a187}
}]Clock on pending interrupt, size \index{LCB_PCI_IRQ_S_PENDING_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_PENDING_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a271a188}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-PENDING\_\-CLK\_\-OFF}
\label{LCB_8h_a271a188}
}]Clock off pending interrupt, size \index{LCB_PCI_IRQ_S_CBUF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_CBUF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF}}\item[{\em 
\hypertarget{LCB_8h_a271a189}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF}
\label{LCB_8h_a271a189}
}]Circular buffer status size, in bits \index{LCB_PCI_IRQ_S_CBUF_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-ENABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_CBUF_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-ENABLE}}\item[{\em 
\hypertarget{LCB_8h_a271a190}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-ENABLE}
\label{LCB_8h_a271a190}
}]Circular buffer enable (on write) on read, 0= disabled 1= enabled \index{LCB_PCI_IRQ_S_CBUF_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-DISABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_CBUF_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-DISABLE}}\item[{\em 
\hypertarget{LCB_8h_a271a191}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-DISABLE}
\label{LCB_8h_a271a191}
}]Circular buffer disable (on write) on read, mbz \index{LCB_PCI_IRQ_S_CBUF_PENDING_BUF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-BUF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_CBUF_PENDING_BUF@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-BUF}}\item[{\em 
\hypertarget{LCB_8h_a271a192}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-BUF}
\label{LCB_8h_a271a192}
}]Circular buffer pending, readonly \index{LCB_PCI_IRQ_S_CBUF_PENDING_QUE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-QUE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_CBUF_PENDING_QUE@{LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-QUE}}\item[{\em 
\hypertarget{LCB_8h_a271a193}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-CBUF\_\-PENDING\_\-QUE}
\label{LCB_8h_a271a193}
}]Circular queue pending, readonly \index{LCB_PCI_IRQ_S_UNUSED1@{LCB\_\-PCI\_\-IRQ\_\-S\_\-UNUSED1}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_S_UNUSED1@{LCB\_\-PCI\_\-IRQ\_\-S\_\-UNUSED1}}\item[{\em 
\hypertarget{LCB_8h_a271a194}{
LCB\_\-PCI\_\-IRQ\_\-S\_\-UNUSED1}
\label{LCB_8h_a271a194}
}]Unused, mbz \end{description}
\end{Desc}

\hypertarget{LCB_8h_a272}{
\index{LCB.h@{LCB.h}!_LCB_PCI_IRQ_V@{\_\-LCB\_\-PCI\_\-IRQ\_\-V}}
\index{_LCB_PCI_IRQ_V@{\_\-LCB\_\-PCI\_\-IRQ\_\-V}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-PCI\_\-IRQ\_\-V]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a272}{\_\-LCB\_\-PCI\_\-IRQ\_\-V}}}
\label{LCB_8h_a272}


Enumerates right justified bit offsets the IRQ enable/disable/pending bits. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_PCI_IRQ_V_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE}}\item[{\em 
\hypertarget{LCB_8h_a272a195}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE}
\label{LCB_8h_a272a195}
}]Enable field offset \index{LCB_PCI_IRQ_V_ENABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_ENABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a272a196}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-RESULT}
\label{LCB_8h_a272a196}
}]Enable the result interrupt, offset \index{LCB_PCI_IRQ_V_ENABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_ENABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a272a197}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-EVENT}
\label{LCB_8h_a272a197}
}]Enable the event interrupt, offset \index{LCB_PCI_IRQ_V_ENABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_ENABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a272a198}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-ON}
\label{LCB_8h_a272a198}
}]Enable the clock on interrupt,offset \index{LCB_PCI_IRQ_V_ENABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_ENABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a272a199}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-ENABLE\_\-CLK\_\-OFF}
\label{LCB_8h_a272a199}
}]Enable the clock off interrupt,offset \index{LCB_PCI_IRQ_V_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE}}\item[{\em 
\hypertarget{LCB_8h_a272a200}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE}
\label{LCB_8h_a272a200}
}]Disable field offset \index{LCB_PCI_IRQ_V_DISABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_DISABLE_RESULT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a272a201}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-RESULT}
\label{LCB_8h_a272a201}
}]Disable the result interrupt, offset \index{LCB_PCI_IRQ_V_DISABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_DISABLE_EVENT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a272a202}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-EVENT}
\label{LCB_8h_a272a202}
}]Disable the event interrupt, offset \index{LCB_PCI_IRQ_V_DISABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_DISABLE_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a272a203}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-ON}
\label{LCB_8h_a272a203}
}]Disable the clock on interrupt,offset \index{LCB_PCI_IRQ_V_DISABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_DISABLE_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a272a204}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-DISABLE\_\-CLK\_\-OFF}
\label{LCB_8h_a272a204}
}]Disable the clock off interrupt,offset \index{LCB_PCI_IRQ_V_PENDING@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_PENDING@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING}}\item[{\em 
\hypertarget{LCB_8h_a272a205}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING}
\label{LCB_8h_a272a205}
}]Pending field offset \index{LCB_PCI_IRQ_V_PENDING_RESULT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-RESULT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_PENDING_RESULT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-RESULT}}\item[{\em 
\hypertarget{LCB_8h_a272a206}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-RESULT}
\label{LCB_8h_a272a206}
}]Result pending, read-only, offset \index{LCB_PCI_IRQ_V_PENDING_EVENT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-EVENT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_PENDING_EVENT@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-EVENT}}\item[{\em 
\hypertarget{LCB_8h_a272a207}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-EVENT}
\label{LCB_8h_a272a207}
}]Event pending, read-only, offset \index{LCB_PCI_IRQ_V_PENDING_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-ON}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_PENDING_CLK_ON@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-ON}}\item[{\em 
\hypertarget{LCB_8h_a272a208}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-ON}
\label{LCB_8h_a272a208}
}]Clock on pending, read-only, offset \index{LCB_PCI_IRQ_V_PENDING_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-OFF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_PENDING_CLK_OFF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-OFF}}\item[{\em 
\hypertarget{LCB_8h_a272a209}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-PENDING\_\-CLK\_\-OFF}
\label{LCB_8h_a272a209}
}]Clock off pending, read-only, offset \index{LCB_PCI_IRQ_V_CBUF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_CBUF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF}}\item[{\em 
\hypertarget{LCB_8h_a272a210}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF}
\label{LCB_8h_a272a210}
}]Circular buffer field offset \index{LCB_PCI_IRQ_V_CBUF_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-ENABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_CBUF_ENABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-ENABLE}}\item[{\em 
\hypertarget{LCB_8h_a272a211}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-ENABLE}
\label{LCB_8h_a272a211}
}]Circular buffer enable (on write) on read, 0= disabled 1= enabled \index{LCB_PCI_IRQ_V_CBUF_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-DISABLE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_CBUF_DISABLE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-DISABLE}}\item[{\em 
\hypertarget{LCB_8h_a272a212}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-DISABLE}
\label{LCB_8h_a272a212}
}]Circular buffer disable (on write) on read, mbz \index{LCB_PCI_IRQ_V_CBUF_PENDING_BUF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-BUF}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_CBUF_PENDING_BUF@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-BUF}}\item[{\em 
\hypertarget{LCB_8h_a272a213}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-BUF}
\label{LCB_8h_a272a213}
}]Circular buffer interrupt pending, readonly \index{LCB_PCI_IRQ_V_CBUF_PENDING_QUE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-QUE}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_CBUF_PENDING_QUE@{LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-QUE}}\item[{\em 
\hypertarget{LCB_8h_a272a214}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-CBUF\_\-PENDING\_\-QUE}
\label{LCB_8h_a272a214}
}]Circular queue interrupt pending, readonly \index{LCB_PCI_IRQ_V_UNUSED1@{LCB\_\-PCI\_\-IRQ\_\-V\_\-UNUSED1}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_PCI_IRQ_V_UNUSED1@{LCB\_\-PCI\_\-IRQ\_\-V\_\-UNUSED1}}\item[{\em 
\hypertarget{LCB_8h_a272a215}{
LCB\_\-PCI\_\-IRQ\_\-V\_\-UNUSED1}
\label{LCB_8h_a272a215}
}]Unused, mbz \end{description}
\end{Desc}

\hypertarget{LCB_8h_a257}{
\index{LCB.h@{LCB.h}!_LCB_RST_DSC_M@{\_\-LCB\_\-RST\_\-DSC\_\-M}}
\index{_LCB_RST_DSC_M@{\_\-LCB\_\-RST\_\-DSC\_\-M}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-RST\_\-DSC\_\-M]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a257}{\_\-LCB\_\-RST\_\-DSC\_\-M}}}
\label{LCB_8h_a257}


Masks of the result descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_RST_DSC_M_STATUS@{LCB\_\-RST\_\-DSC\_\-M\_\-STATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_M_STATUS@{LCB\_\-RST\_\-DSC\_\-M\_\-STATUS}}\item[{\em 
\hypertarget{LCB_8h_a257a77}{
LCB\_\-RST\_\-DSC\_\-M\_\-STATUS}
\label{LCB_8h_a257a77}
}]Transfer status only, bit field mask \index{LCB_RST_DSC_M_DIR@{LCB\_\-RST\_\-DSC\_\-M\_\-DIR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_M_DIR@{LCB\_\-RST\_\-DSC\_\-M\_\-DIR}}\item[{\em 
\hypertarget{LCB_8h_a257a78}{
LCB\_\-RST\_\-DSC\_\-M\_\-DIR}
\label{LCB_8h_a257a78}
}]Direction only, bit field mask \index{LCB_RST_DSC_M_XSTATUS@{LCB\_\-RST\_\-DSC\_\-M\_\-XSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_M_XSTATUS@{LCB\_\-RST\_\-DSC\_\-M\_\-XSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a257a79}{
LCB\_\-RST\_\-DSC\_\-M\_\-XSTATUS}
\label{LCB_8h_a257a79}
}]Transfer status + direction \index{LCB_RST_DSC_M_ADR@{LCB\_\-RST\_\-DSC\_\-M\_\-ADR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_M_ADR@{LCB\_\-RST\_\-DSC\_\-M\_\-ADR}}\item[{\em 
\hypertarget{LCB_8h_a257a80}{
LCB\_\-RST\_\-DSC\_\-M\_\-ADR}
\label{LCB_8h_a257a80}
}]PCI address field, bit field mask \end{description}
\end{Desc}

\hypertarget{LCB_8h_a255}{
\index{LCB.h@{LCB.h}!_LCB_RST_DSC_S@{\_\-LCB\_\-RST\_\-DSC\_\-S}}
\index{_LCB_RST_DSC_S@{\_\-LCB\_\-RST\_\-DSC\_\-S}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-RST\_\-DSC\_\-S]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a255}{\_\-LCB\_\-RST\_\-DSC\_\-S}}}
\label{LCB_8h_a255}


Size, in bits, of the result descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_RST_DSC_S_STATUS@{LCB\_\-RST\_\-DSC\_\-S\_\-STATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_S_STATUS@{LCB\_\-RST\_\-DSC\_\-S\_\-STATUS}}\item[{\em 
\hypertarget{LCB_8h_a255a69}{
LCB\_\-RST\_\-DSC\_\-S\_\-STATUS}
\label{LCB_8h_a255a69}
}]Transfer status field only, bit field size \index{LCB_RST_DSC_S_DIR@{LCB\_\-RST\_\-DSC\_\-S\_\-DIR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_S_DIR@{LCB\_\-RST\_\-DSC\_\-S\_\-DIR}}\item[{\em 
\hypertarget{LCB_8h_a255a70}{
LCB\_\-RST\_\-DSC\_\-S\_\-DIR}
\label{LCB_8h_a255a70}
}]Transfer direction, bit field size \index{LCB_RST_DSC_S_XSTATUS@{LCB\_\-RST\_\-DSC\_\-S\_\-XSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_S_XSTATUS@{LCB\_\-RST\_\-DSC\_\-S\_\-XSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a255a71}{
LCB\_\-RST\_\-DSC\_\-S\_\-XSTATUS}
\label{LCB_8h_a255a71}
}]Transfer status field + direction, bit field size \index{LCB_RST_DSC_S_ADR@{LCB\_\-RST\_\-DSC\_\-S\_\-ADR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_S_ADR@{LCB\_\-RST\_\-DSC\_\-S\_\-ADR}}\item[{\em 
\hypertarget{LCB_8h_a255a72}{
LCB\_\-RST\_\-DSC\_\-S\_\-ADR}
\label{LCB_8h_a255a72}
}]PCI address field, bit field size \end{description}
\end{Desc}

\hypertarget{LCB_8h_a256}{
\index{LCB.h@{LCB.h}!_LCB_RST_DSC_V@{\_\-LCB\_\-RST\_\-DSC\_\-V}}
\index{_LCB_RST_DSC_V@{\_\-LCB\_\-RST\_\-DSC\_\-V}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-RST\_\-DSC\_\-V]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a256}{\_\-LCB\_\-RST\_\-DSC\_\-V}}}
\label{LCB_8h_a256}


Right justified bit offsets of the result descriptor fields. 

\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_RST_DSC_V_STATUS@{LCB\_\-RST\_\-DSC\_\-V\_\-STATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_V_STATUS@{LCB\_\-RST\_\-DSC\_\-V\_\-STATUS}}\item[{\em 
\hypertarget{LCB_8h_a256a73}{
LCB\_\-RST\_\-DSC\_\-V\_\-STATUS}
\label{LCB_8h_a256a73}
}]Transfer status field only, bit field offset \index{LCB_RST_DSC_V_XSTATUS@{LCB\_\-RST\_\-DSC\_\-V\_\-XSTATUS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_V_XSTATUS@{LCB\_\-RST\_\-DSC\_\-V\_\-XSTATUS}}\item[{\em 
\hypertarget{LCB_8h_a256a74}{
LCB\_\-RST\_\-DSC\_\-V\_\-XSTATUS}
\label{LCB_8h_a256a74}
}]Transfer status field + direction, bit field offset \index{LCB_RST_DSC_V_DIR@{LCB\_\-RST\_\-DSC\_\-V\_\-DIR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_V_DIR@{LCB\_\-RST\_\-DSC\_\-V\_\-DIR}}\item[{\em 
\hypertarget{LCB_8h_a256a75}{
LCB\_\-RST\_\-DSC\_\-V\_\-DIR}
\label{LCB_8h_a256a75}
}]Transfer direction, bit field offset 0 = out-bound, 1 = in-bound \index{LCB_RST_DSC_V_ADR@{LCB\_\-RST\_\-DSC\_\-V\_\-ADR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_DSC_V_ADR@{LCB\_\-RST\_\-DSC\_\-V\_\-ADR}}\item[{\em 
\hypertarget{LCB_8h_a256a76}{
LCB\_\-RST\_\-DSC\_\-V\_\-ADR}
\label{LCB_8h_a256a76}
}]PCI address field, bit field offset \end{description}
\end{Desc}

\hypertarget{LCB_8h_a262}{
\index{LCB.h@{LCB.h}!_LCB_RST_ERR_RCV@{\_\-LCB\_\-RST\_\-ERR\_\-RCV}}
\index{_LCB_RST_ERR_RCV@{\_\-LCB\_\-RST\_\-ERR\_\-RCV}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-RST\_\-ERR\_\-RCV]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a262}{\_\-LCB\_\-RST\_\-ERR\_\-RCV}}}
\label{LCB_8h_a262}


Enumeration of possible LCB RESULT receive errors in result items. 

These are errors that the LCB detects when accepting data from a LATp fabric. That is these errors occur when the LCB reads response data.

The documentation only defines errors up to number 6, for a maximum of 7 errors. However the code index this with a 3-bit field. To be safe all 8 states must be covered

Code number 6 bears some special explanation. This happens when the LCB is asked to execute an illegal of inconsistent list. Examples of such lists are

\begin{itemize}
\item Request List with a 0 length\item Request Item with length not match the opcode\item Request Item that goes past the end of the request list\end{itemize}


Since the inconsistency may be encountered at any point during the execution of the request list, the error cannot practically be reported in the result descriptor. (Perhaps it can, but the LCB has potentially already started writing the result list, so..) Anyway for whatever reason, this error is reported in the result item. Since the LCB does not in all cases know what the opcode of the request item is, the result item is always filled in with as OPCODE 0 result item with a length of 2 words and the error word set to 6.

The proper response by the software when encountering such an item is to immediately stop processing the result items.

\begin{Desc}
\item[Warning:]This makes processing statically defined request/result list a bit dicey. Suppose one defines a list with two items to access the CSR and FAULTS register, so that one knows apriori that the result list will consist of 2 result items corresponding to the responses to the register access requests. With errors of type 6, the software is likely required to make sure the opcode of the returned item is what is expected (i.e. it did not get transformed into an OPCODE 0, error = 6 response) and that the error is not 6.\end{Desc}
\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_RST_ERR_RCV_SUCCESS@{LCB\_\-RST\_\-ERR\_\-RCV\_\-SUCCESS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_SUCCESS@{LCB\_\-RST\_\-ERR\_\-RCV\_\-SUCCESS}}\item[{\em 
\hypertarget{LCB_8h_a262a113}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-SUCCESS}
\label{LCB_8h_a262a113}
}]LATp success \index{LCB_RST_ERR_RCV_INVALID_HEADER_PARITY@{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-HEADER\_\-PARITY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_INVALID_HEADER_PARITY@{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-HEADER\_\-PARITY}}\item[{\em 
\hypertarget{LCB_8h_a262a114}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-HEADER\_\-PARITY}
\label{LCB_8h_a262a114}
}]LATp header parity error \index{LCB_RST_ERR_RCV_INVALID_DATA_PARITY@{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_INVALID_DATA_PARITY@{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY}}\item[{\em 
\hypertarget{LCB_8h_a262a115}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-DATA\_\-PARITY}
\label{LCB_8h_a262a115}
}]LATp data parity error \index{LCB_RST_ERR_RCV_UNDEFINED_3@{LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-3}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_UNDEFINED_3@{LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-3}}\item[{\em 
\hypertarget{LCB_8h_a262a116}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-3}
\label{LCB_8h_a262a116}
}]LATp packet truncated error \index{LCB_RST_ERR_RCV_TRANSMIT_UNDERRUN@{LCB\_\-RST\_\-ERR\_\-RCV\_\-TRANSMIT\_\-UNDERRUN}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_TRANSMIT_UNDERRUN@{LCB\_\-RST\_\-ERR\_\-RCV\_\-TRANSMIT\_\-UNDERRUN}}\item[{\em 
\hypertarget{LCB_8h_a262a117}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-TRANSMIT\_\-UNDERRUN}
\label{LCB_8h_a262a117}
}]LATp result with transmit underrun error \index{LCB_RST_ERR_RCV_TIMEOUT@{LCB\_\-RST\_\-ERR\_\-RCV\_\-TIMEOUT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_TIMEOUT@{LCB\_\-RST\_\-ERR\_\-RCV\_\-TIMEOUT}}\item[{\em 
\hypertarget{LCB_8h_a262a118}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-TIMEOUT}
\label{LCB_8h_a262a118}
}]LATp result with timeout error \index{LCB_RST_ERR_RCV_INVALID_LIST@{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-LIST}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_INVALID_LIST@{LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-LIST}}\item[{\em 
\hypertarget{LCB_8h_a262a119}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-INVALID\_\-LIST}
\label{LCB_8h_a262a119}
}]LATp invalid or internally inconsistent list encountered \index{LCB_RST_ERR_RCV_UNDEFINED_7@{LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-7}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_UNDEFINED_7@{LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-7}}\item[{\em 
\hypertarget{LCB_8h_a262a120}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-UNDEFINED\_\-7}
\label{LCB_8h_a262a120}
}]LATp undefined \#7 \index{LCB_RST_ERR_RCV_CNT@{LCB\_\-RST\_\-ERR\_\-RCV\_\-CNT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_RCV_CNT@{LCB\_\-RST\_\-ERR\_\-RCV\_\-CNT}}\item[{\em 
\hypertarget{LCB_8h_a262a121}{
LCB\_\-RST\_\-ERR\_\-RCV\_\-CNT}
\label{LCB_8h_a262a121}
}]LATp maximum number of error \end{description}
\end{Desc}

\hypertarget{LCB_8h_a261}{
\index{LCB.h@{LCB.h}!_LCB_RST_ERR_XFR@{\_\-LCB\_\-RST\_\-ERR\_\-XFR}}
\index{_LCB_RST_ERR_XFR@{\_\-LCB\_\-RST\_\-ERR\_\-XFR}!LCB.h@{LCB.h}}
\subsubsection[\_\-LCB\_\-RST\_\-ERR\_\-XFR]{\setlength{\rightskip}{0pt plus 5cm}enum \hyperlink{LCB_8h_a261}{\_\-LCB\_\-RST\_\-ERR\_\-XFR}}}
\label{LCB_8h_a261}


Enumeration of possible LCB RESULT in/out errors. 

These errors occur when the LCB imports/exports data from the single board computer across the PCI bus and are reported as the low 4 bits of the result descriptor. Note that in/out is from the perspective of the LCB and includes both the 3 bit status field as well as the 1 bit direction flag.\begin{Desc}
\item[Enumerator: ]\par
\begin{description}
\index{LCB_RST_ERR_XFR_OUT_SUCCESS@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-SUCCESS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_SUCCESS@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-SUCCESS}}\item[{\em 
\hypertarget{LCB_8h_a261a96}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-SUCCESS}
\label{LCB_8h_a261a96}
}]Outbound transaction okay \index{LCB_RST_ERR_XFR_OUT_PCI_MASTER_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-MASTER\_\-ABORT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_PCI_MASTER_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-MASTER\_\-ABORT}}\item[{\em 
\hypertarget{LCB_8h_a261a97}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-MASTER\_\-ABORT}
\label{LCB_8h_a261a97}
}]PCI Master Abort \index{LCB_RST_ERR_XFR_OUT_PCI_PARITY_ERROR@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-PARITY\_\-ERROR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_PCI_PARITY_ERROR@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-PARITY\_\-ERROR}}\item[{\em 
\hypertarget{LCB_8h_a261a98}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-PARITY\_\-ERROR}
\label{LCB_8h_a261a98}
}]PCI Parity Error \index{LCB_RST_ERR_XFR_OUT_PCI_TARGET_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-TARGET\_\-ABORT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_PCI_TARGET_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-TARGET\_\-ABORT}}\item[{\em 
\hypertarget{LCB_8h_a261a99}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-PCI\_\-TARGET\_\-ABORT}
\label{LCB_8h_a261a99}
}]PCI Target Abort \index{LCB_RST_ERR_XFR_OUT_UNDEFINED_4@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-4}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_UNDEFINED_4@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-4}}\item[{\em 
\hypertarget{LCB_8h_a261a100}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-4}
\label{LCB_8h_a261a100}
}]Undefined error \#4 \index{LCB_RST_ERR_XFR_OUT_BUFFER_EMPTY@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-BUFFER\_\-EMPTY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_BUFFER_EMPTY@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-BUFFER\_\-EMPTY}}\item[{\em 
\hypertarget{LCB_8h_a261a101}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-BUFFER\_\-EMPTY}
\label{LCB_8h_a261a101}
}]Buffer empty \index{LCB_RST_ERR_XFR_OUT_UNDEFINED_6@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-6}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_UNDEFINED_6@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-6}}\item[{\em 
\hypertarget{LCB_8h_a261a102}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-UNDEFINED\_\-6}
\label{LCB_8h_a261a102}
}]Undefined error \#6 \index{LCB_RST_ERR_XFR_OUT_Q_EMPTY@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-Q\_\-EMPTY}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_OUT_Q_EMPTY@{LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-Q\_\-EMPTY}}\item[{\em 
\hypertarget{LCB_8h_a261a103}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-OUT\_\-Q\_\-EMPTY}
\label{LCB_8h_a261a103}
}]Result queue empty \index{LCB_RST_ERR_XFR_IN_SUCCESS@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-SUCCESS}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_SUCCESS@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-SUCCESS}}\item[{\em 
\hypertarget{LCB_8h_a261a104}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-SUCCESS}
\label{LCB_8h_a261a104}
}]Inbound transaction okay \index{LCB_RST_ERR_XFR_IN_PCI_MASTER_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-MASTER\_\-ABORT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_PCI_MASTER_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-MASTER\_\-ABORT}}\item[{\em 
\hypertarget{LCB_8h_a261a105}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-MASTER\_\-ABORT}
\label{LCB_8h_a261a105}
}]PCI Master Abort \index{LCB_RST_ERR_XFR_IN_PCI_PARITY_ERROR@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-PARITY\_\-ERROR}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_PCI_PARITY_ERROR@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-PARITY\_\-ERROR}}\item[{\em 
\hypertarget{LCB_8h_a261a106}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-PARITY\_\-ERROR}
\label{LCB_8h_a261a106}
}]PCI parity error \index{LCB_RST_ERR_XFR_IN_PCI_TARGET_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-TARGET\_\-ABORT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_PCI_TARGET_ABORT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-TARGET\_\-ABORT}}\item[{\em 
\hypertarget{LCB_8h_a261a107}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-PCI\_\-TARGET\_\-ABORT}
\label{LCB_8h_a261a107}
}]PCI Target Abort \index{LCB_RST_ERR_XFR_IN_UNDEFINED_4@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-4}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_UNDEFINED_4@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-4}}\item[{\em 
\hypertarget{LCB_8h_a261a108}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-4}
\label{LCB_8h_a261a108}
}]PCI buffer full \index{LCB_RST_ERR_XFR_IN_UNDEFINED_5@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-5}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_UNDEFINED_5@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-5}}\item[{\em 
\hypertarget{LCB_8h_a261a109}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-5}
\label{LCB_8h_a261a109}
}]Undefined error \#5 \index{LCB_RST_ERR_XFR_IN_UNDEFINED_6@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-6}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_UNDEFINED_6@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-6}}\item[{\em 
\hypertarget{LCB_8h_a261a110}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-6}
\label{LCB_8h_a261a110}
}]Undefined error \#6 \index{LCB_RST_ERR_XFR_IN_UNDEFINED_7@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-7}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_IN_UNDEFINED_7@{LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-7}}\item[{\em 
\hypertarget{LCB_8h_a261a111}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-IN\_\-UNDEFINED\_\-7}
\label{LCB_8h_a261a111}
}]Undefined error \#7 \index{LCB_RST_ERR_XFR_CNT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-CNT}!LCB.h@{LCB.h}}\index{LCB.h@{LCB.h}!LCB_RST_ERR_XFR_CNT@{LCB\_\-RST\_\-ERR\_\-XFR\_\-CNT}}\item[{\em 
\hypertarget{LCB_8h_a261a112}{
LCB\_\-RST\_\-ERR\_\-XFR\_\-CNT}
\label{LCB_8h_a261a112}
}]RESULT XFR error count \end{description}
\end{Desc}