\section{File List}
Here is a list of all documented files with brief descriptions:\begin{CompactList}
\item\contentsline{section}{\hyperlink{TCU__access_8c}{TCU\_\-access.c} (Implements access to TCU constants)}{\pageref{TCU__access_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__bitCopy_8c}{TCU\_\-bit\-Copy.c} (Torturous piece of code to do arbitrary length and order bit copies)}{\pageref{TCU__bitCopy_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__init_8c}{TCU\_\-init.c} (All the intialization for the TCU package)}{\pageref{TCU__init_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__loadConfig_8c}{TCU\_\-load\-Config.c} (Implements the loading of a configuration)}{\pageref{TCU__loadConfig_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__loadFE_8c}{TCU\_\-load\-FE.c} (Implements the loading of a front end (FE) TKR chip)}{\pageref{TCU__loadFE_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__loadFPGA_8c}{TCU\_\-load\-FPGA.c} (Implements the loading of the (TKR sepcific) FPGA registers)}{\pageref{TCU__loadFPGA_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__loadRC_8c}{TCU\_\-load\-RC.c} (Implements the loading of a readout controller (RC) TKR chip)}{\pageref{TCU__loadRC_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__mappings_8c}{TCU\_\-mappings.c} (Implements everything to do with tower mappings)}{\pageref{TCU__mappings_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__prvdefs_8h}{TCU\_\-prvdefs.h} (Private include file for the TCU package)}{\pageref{TCU__prvdefs_8h}}{}
\item\contentsline{section}{\hyperlink{TCU__pubdefs_8h}{TCU\_\-pubdefs.h} (Standard public include file for the TCU package)}{\pageref{TCU__pubdefs_8h}}{}
\item\contentsline{section}{\hyperlink{TCU__refreshFPGA_8c}{TCU\_\-refresh\-FPGA.c} (Implements the refresh of the FPGA caches)}{\pageref{TCU__refreshFPGA_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__resetFEsoft_8c}{TCU\_\-reset\-FEsoft.c} (Implements a software reset of FE chip(s). This is the FIFO reset)}{\pageref{TCU__resetFEsoft_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__resetRCsoft_8c}{TCU\_\-reset\-RCsoft.c} (Implements a software reset of RC chip(s))}{\pageref{TCU__resetRCsoft_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__resetTowerFront_8c}{TCU\_\-reset\-Tower\-Front.c} (Implements the loading of a readout controller (RC) TKR chip)}{\pageref{TCU__resetTowerFront_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__resetTowerHard_8c}{TCU\_\-reset\-Tower\-Hard.c} (Implements the tower hardware reset)}{\pageref{TCU__resetTowerHard_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__resetTowerPower_8c}{TCU\_\-reset\-Tower\-Power.c} (Implements the reflection of a power cycle)}{\pageref{TCU__resetTowerPower_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__resetTowerSoft_8c}{TCU\_\-reset\-Tower\-Soft.c} (Implements the tower software reset)}{\pageref{TCU__resetTowerSoft_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setFEDAC_8c}{TCU\_\-set\-FEDAC.c} (Implements the setting of an FE chip DAC)}{\pageref{TCU__setFEDAC_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setFEmask_8c}{TCU\_\-set\-FEmask.c} (Implements FE chip mask manipulation)}{\pageref{TCU__setFEmask_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setFEsplit_8c}{TCU\_\-set\-FEsplit.c} (Implements the setting of a split point in a TKR plane readout)}{\pageref{TCU__setFEsplit_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setFEstrip_8c}{TCU\_\-set\-FEstrip.c} (Implements the setting or clearing of a single strip mask bit)}{\pageref{TCU__setFEstrip_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setPlaneEnable_8c}{TCU\_\-set\-Plane\-Enable.c} (Implements the management of the layer-OR TREQ enable bits)}{\pageref{TCU__setPlaneEnable_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setPlaneEnableBits_8c}{TCU\_\-set\-Plane\-Enable\-Bits.c} (Implements the management of the layer-OR TREQ enable bits into TIR)}{\pageref{TCU__setPlaneEnableBits_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setPlaneMask_8c}{TCU\_\-set\-Plane\-Mask.c} (Implements the management of the layer-OR TREQ masks bits)}{\pageref{TCU__setPlaneMask_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setPlaneMaskBits_8c}{TCU\_\-set\-Plane\-Mask\-Bits.c} (Implements the management of the layer-OR TREQ masks bits)}{\pageref{TCU__setPlaneMaskBits_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setTIRenable_8c}{TCU\_\-set\-TIRenable.c} (Implements the management of the TIR trigger enable bits)}{\pageref{TCU__setTIRenable_8c}}{}
\item\contentsline{section}{\hyperlink{TCU__setTIRenableBits_8c}{TCU\_\-set\-TIRenable\-Bits.c} (Implements the management of three-in-a-row (TIR) trigger enable bits)}{\pageref{TCU__setTIRenableBits_8c}}{}
\end{CompactList}
