\hypertarget{TEM_8h}{ \section{TEM.h File Reference} \label{TEM_8h}\index{TEM.h@{TEM.h}} } TEM Utilities, Interface. {\tt \#include $<$time.h$>$}\par {\tt \#include \char`\"{}BTU/TEM\_\-ids.h\char`\"{}}\par {\tt \#include \char`\"{}BTU/TEM\_\-tem\-Int.h\char`\"{}}\par {\tt \#include \char`\"{}BTU/TEM\_\-tem\-Trg.h\char`\"{}}\par \subsection*{Data Structures} \begin{CompactItemize} \item struct \hyperlink{struct__TEM__fpga}{\_\-TEM\_\-fpga} \begin{CompactList}\small\item\em This defines the physical properties of a FPGA.\item\end{CompactList}\item struct \hyperlink{struct__TEM__fpgaLog}{\_\-TEM\_\-fpga\-Log} \begin{CompactList}\small\item\em Logging structure to record information about a particular operation on an FPGA.\item\end{CompactList}\item struct \hyperlink{struct__TEM__tem}{\_\-TEM\_\-tem} \begin{CompactList}\small\item\em This defines the physical properties of a TEM.\item\end{CompactList}\end{CompactItemize} \subsection*{Typedefs} \begin{CompactItemize} \item \hypertarget{TEM_8h_a0}{ \index{TEM_temState@{TEM\_\-temState}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_temState@{TEM\_\-tem\-State}} typedef enum \hyperlink{TEM_8h_a130}{\_\-TEM\_\-tem\-State} \hyperlink{TEM_8h_a0}{TEM\_\-tem\-State}} \label{TEM_8h_a0} \begin{CompactList}\small\item\em Typedef for enum \_\-TEM\_\-tem\-State.\item\end{CompactList}\item \hypertarget{TEM_8h_a1}{ \index{TEM_fpgaState@{TEM\_\-fpgaState}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_fpgaState@{TEM\_\-fpga\-State}} typedef enum \hyperlink{TEM_8h_a131}{\_\-TEM\_\-fpga\-State} \hyperlink{TEM_8h_a1}{TEM\_\-fpga\-State}} \label{TEM_8h_a1} \begin{CompactList}\small\item\em Typedef for enum \_\-TEM\_\-fpga\-State.\item\end{CompactList}\item typedef \hyperlink{struct__TEM__tem}{\_\-TEM\_\-tem} \hyperlink{TEM_8h_a2}{TEM\_\-tem} \begin{CompactList}\small\item\em Typedef for struct \hyperlink{struct__TEM__tem}{\_\-TEM\_\-tem}.\item\end{CompactList}\item typedef \hyperlink{struct__TEM__fpgaLog}{\_\-TEM\_\-fpga\-Log} \hyperlink{TEM_8h_a3}{TEM\_\-fpga\-Log} \begin{CompactList}\small\item\em Typedef for struct \hyperlink{struct__TEM__fpgaLog}{\_\-TEM\_\-fpga\-Log}.\item\end{CompactList}\item typedef enum \hyperlink{TEM_8h_a132}{\_\-TEM\_\-fpga\-Log\-Id} \hyperlink{TEM_8h_a4}{TEM\_\-fpga\-Log\-Id} \begin{CompactList}\small\item\em Typedef for struct \_\-TEM\_\-fpga\-Log\-Id.\item\end{CompactList}\item \hypertarget{TEM_8h_a5}{ \index{TEM_fpga@{TEM\_\-fpga}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_fpga@{TEM\_\-fpga}} typedef \hyperlink{struct__TEM__fpga}{\_\-TEM\_\-fpga} \hyperlink{TEM_8h_a5}{TEM\_\-fpga}} \label{TEM_8h_a5} \begin{CompactList}\small\item\em Typedef for struct \hyperlink{struct__TEM__fpga}{\_\-TEM\_\-fpga}.\item\end{CompactList}\item typedef unsigned int($\ast$ \hyperlink{TEM_8h_a6}{TEM\_\-fpga\-Action} )(\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Defines the signature of a generic TEM FPGA action routine.\item\end{CompactList}\end{CompactItemize} \subsection*{Enumerations} \begin{CompactItemize} \item enum \hyperlink{TEM_8h_a130}{\_\-TEM\_\-tem\-State} \{ \hyperlink{TEM_8h_a130a7}{TEM\_\-C\_\-TEM\_\-STATE\_\-IGNORE} = -1, \hyperlink{TEM_8h_a130a8}{TEM\_\-C\_\-TEM\_\-STATE\_\-EXCLUDED} = 0, \hyperlink{TEM_8h_a130a9}{TEM\_\-C\_\-TEM\_\-STATE\_\-INCLUDED} = 1, \hyperlink{TEM_8h_a130a10}{TEM\_\-C\_\-TEM\_\-STATE\_\-PRESENT} = 2, \hyperlink{TEM_8h_a130a11}{TEM\_\-C\_\-TEM\_\-STATE\_\-PRESET} = 3, \hyperlink{TEM_8h_a130a12}{TEM\_\-C\_\-TEM\_\-STATE\_\-LOADED} = 4, \hyperlink{TEM_8h_a130a13}{TEM\_\-C\_\-TEM\_\-STATE\_\-RESET} = 5, \hyperlink{TEM_8h_a130a14}{TEM\_\-C\_\-TEM\_\-STATE\_\-READY} = 6 \} \begin{CompactList}\small\item\em Enumerates names of all the states that a TEM can be in.\item\end{CompactList}\item enum \hyperlink{TEM_8h_a131}{\_\-TEM\_\-fpga\-State} \{ \hyperlink{TEM_8h_a131a15}{TEM\_\-C\_\-FPGA\_\-STATE\_\-EXCLUDED} = 0, \hyperlink{TEM_8h_a131a16}{TEM\_\-C\_\-FPGA\_\-STATE\_\-INCLUDED} = 1, \hyperlink{TEM_8h_a131a17}{TEM\_\-C\_\-FPGA\_\-STATE\_\-PRESENT} = 2, \hyperlink{TEM_8h_a131a18}{TEM\_\-C\_\-FPGA\_\-STATE\_\-LOADED} = 3 \} \begin{CompactList}\small\item\em Enumerates names of all the states that a FPGA can be in.\item\end{CompactList}\item enum \hyperlink{TEM_8h_a132}{\_\-TEM\_\-fpga\-Log\-Id} \{ \hyperlink{TEM_8h_a132a19}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-ADD} = 0, \hyperlink{TEM_8h_a132a20}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-LOGIC} = 1, \hyperlink{TEM_8h_a132a21}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-REGS} = 2, \hyperlink{TEM_8h_a132a22}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-TIMER} = 3, \hyperlink{TEM_8h_a132a23}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-COUNTER} = 4, \hyperlink{TEM_8h_a132a24}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR} = 5, \hyperlink{TEM_8h_a132a25}{TEM\_\-C\_\-FPGA\_\-LOGIC\_\-RESET} = 6, \hyperlink{TEM_8h_a132a26}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-UNLOAD} = 7, \hyperlink{TEM_8h_a132a27}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-LOAD} = 8, \hyperlink{TEM_8h_a132a28}{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CNT} = 9 \} \begin{CompactList}\small\item\em Enumerates the various actions on an FPGA which are logged.\item\end{CompactList}\end{CompactItemize} \subsection*{Functions} \begin{CompactItemize} \item unsigned int \hyperlink{TEM_8h_a29}{TEM\_\-tems\-Add} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const unsigned int vme\-Adrs\mbox{[}TEM\_\-C\_\-CNT\mbox{]}, const struct \hyperlink{struct__TEM__temDsc}{\_\-TEM\_\-tem\-Dsc} $\ast$const tem\-Dscs\mbox{[}TEM\_\-C\_\-CNT\mbox{]}) \begin{CompactList}\small\item\em Completes a high level description of each active TEM.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a30}{TEM\_\-tems\-Adrs\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int vme\-Adrs\mbox{[}TEM\_\-C\_\-CNT\mbox{]}, volatile unsigned int $\ast$lcl\-Adrs\mbox{[}TEM\_\-C\_\-CNT\mbox{]}) \begin{CompactList}\small\item\em Fills in arrays of the VME and LOCAL addresss of the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a31}{TEM\_\-tems\-Dets\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Issues a reset to the detector specific registers on the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a32}{TEM\_\-tems\-Fifos\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Issues a reset to the all FIFOs on the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a33}{TEM\_\-tems\-Fpgas\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of the FPGAs associated with the requested set of TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a34}{TEM\_\-tems\-Fpgas\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Issues a reset to the all FPGAs on the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a35}{TEM\_\-tems\-Preset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Puts the TEM control registers in a known state so the TEM's FPGAs can be loaded.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a36}{TEM\_\-tems\-Probe} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Probes the VME bus for the present of the specified list of.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a37}{TEM\_\-tems\-Ready} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Toggles the RESET FPGA and RESET FIFOs bit in the control register.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a38}{TEM\_\-tems\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Resets all FPGAs, FIFOs and DETs on the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a39}{TEM\_\-tems\-Scope\-Bit\-Clear} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the scope bit on the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a40}{TEM\_\-tems\-Scope\-Bit\-Set} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the scope bit on the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a41}{TEM\_\-tems\-Scope\-Bit\-Toggle} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Toggles the scope bit on the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Simply query routine to learn which TEMs are not ready.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a43}{TEM\_\-fpgas\-Add} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, const struct \hyperlink{struct__TEM__fpgaDsc}{\_\-TEM\_\-fpga\-Dsc} $\ast$const fpga\-Dscs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, const struct \_\-FPGA\_\-ttc\-Hdr $\ast$const fpga\-Ttcs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem) \begin{CompactList}\small\item\em Adds the specified FPGAs to the internal database.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a44}{TEM\_\-fpgas\-Adrs\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int vme\-Adrs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, volatile unsigned int $\ast$lcl\-Adrs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}) \begin{CompactList}\small\item\em Fills in arrays of the VME and LOCAL addresss of the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a45}{TEM\_\-fpgas\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Clears the specified list of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a46}{TEM\_\-fpgas\-L1t\-Counter\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Does a L1T COUNTER CLEAR on the specified list of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a47}{TEM\_\-fpgas\-L1t\-Timer\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Does a CLEAR L1T TIMER on the specified list of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a48}{TEM\_\-fpgas\-Load} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Loads the specified list of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a49}{TEM\_\-fpgas\-Logic\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Does a CLEAR LOGIC on the specified list of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a50}{TEM\_\-fpgas\-Regs\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Does a CLEAR REGS on the specified list of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a51}{TEM\_\-fpgas\-Tems\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Returns a bit mask of the TEMs associated with the requested set of FPGASs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a52}{TEM\_\-fpgas\-Unload} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Unloads the specified list of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a53}{TEM\_\-fpgas\-Bist\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Clears the self test bit for the selected FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a54}{TEM\_\-fpgas\-Bist\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$bist\-List) \begin{CompactList}\small\item\em Returns the state of the Self Test for the specified fpgas.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a55}{TEM\_\-fpgas\-Bist\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Sets the Self Test for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a56}{TEM\_\-fpgas\-Bist\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpgas\-List) \begin{CompactList}\small\item\em Returns which of the specified FPGAs support a self-test mode.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a57}{TEM\_\-fpgas\-Bist\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int bist\-List) \begin{CompactList}\small\item\em Writes the Self Test for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a58}{TEM\_\-fpgas\-Hfull\-Enb\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Clears the FIFO Half Full Throttle for the selected FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a59}{TEM\_\-fpgas\-Hfull\-Enb\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$hfull\-List) \begin{CompactList}\small\item\em Returns the state of the FIFO Half Full Throttle for the specified fpgas.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a60}{TEM\_\-fpgas\-Hfull\-Enb\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Sets the FIFO Half Full Throttle for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a61}{TEM\_\-fpgas\-Hfull\-Enb\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int hfull\-List) \begin{CompactList}\small\item\em Writes the Half Full Throttle mode for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a62}{TEM\_\-fpgas\-Hfull\-Clr\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Clears the FIFO Half Full Throttle Manual Clear for the selected FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a63}{TEM\_\-fpgas\-Hfull\-Clr\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$hfull\-List) \begin{CompactList}\small\item\em Returns the state of the FIFO Half Full Throttle Manual Clear. for the specified fpgas.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a64}{TEM\_\-fpgas\-Hfull\-Clr\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Sets the FIFO Half Full Throttle for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a65}{TEM\_\-fpgas\-Hfull\-Clr\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int hfull\-List) \begin{CompactList}\small\item\em Writes the Half Full Throttle Manual Clear mode for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a66}{TEM\_\-fpgas\-Rdo\-Mode\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Clears the Readout Mode for the selected FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a67}{TEM\_\-fpgas\-Rdo\-Mode\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$rdo\-List) \begin{CompactList}\small\item\em Returns the state of the Readout Mode for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a68}{TEM\_\-fpgas\-Rdo\-Mode\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Sets the Readout Mode to 1, for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a69}{TEM\_\-fpgas\-Rdo\-Mode\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Returns a bit list indicating which FPGAs support an alternative Readout Mode.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a70}{TEM\_\-fpgas\-Rdo\-Mode\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int rdo\-List) \begin{CompactList}\small\item\em Writes the Readout Mode for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a71}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Clears the Readout Min/Max\-Mode for the selected FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a72}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$rdo\-List) \begin{CompactList}\small\item\em Returns the state of the Readout Min/Max\-Mode for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a73}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Sets the Readout Busy Min/Max 1, for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a74}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Returns a bit list indicating which FPGAs support the Readout Busy Min/Max mode.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a75}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int rdo\-List) \begin{CompactList}\small\item\em Writes the Readout Busy Min/Max mode for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a76}{TEM\_\-fpgas\-Rdo\-To\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$rdo\-To\-List) \begin{CompactList}\small\item\em Returns the state of the Readout Timeout status bit for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a77}{TEM\_\-fpgas\-Rdo\-To\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Returns a bit list indicating which FPGAs support the Readout Timeout status bit.\item\end{CompactList}\item int \hyperlink{TEM_8h_a78}{TEM\_\-tem\-Ints\-Min\-Events\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$nevts) \begin{CompactList}\small\item\em Returns the minimum number of events pending from the specified list of TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a79}{TEM\_\-tem\-Ints\-Enable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int irpts) \begin{CompactList}\small\item\em Enables the specified list of interrupts on all specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a80}{TEM\_\-tem\-Ints\-Disable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int irpts) \begin{CompactList}\small\item\em Disables the specified list of interrupts on all specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a81}{TEM\_\-tem\-Ints\-Master\-Enable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Enables the master interrupt on the specified list of TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a82}{TEM\_\-tem\-Ints\-Master\-Disable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Disables the master interrupt on the specified list of TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a83}{TEM\_\-tem\-Ints\-Master\-Reset} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Resets the master interrupt on the specified list of TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a84}{TEM\_\-tem\-Ints\-Iscs\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const struct \hyperlink{struct__TEM__temInt}{\_\-TEM\_\-tem\-Int} $\ast$iscs\mbox{[}$\,$\mbox{]}) \begin{CompactList}\small\item\em Returns a pointer to an array of TEM interrupt structures.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a85}{TEM\_\-tem\-Ints\-Init} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const unsigned int $\ast$levels, const unsigned int $\ast$bases) \begin{CompactList}\small\item\em Initializes the TEM interrupt registers.\item\end{CompactList}\item int \hyperlink{TEM_8h_a86}{TEM\_\-tem\-Int\-Connect} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, \hyperlink{TEM__ids_8h_a0}{TEM\_\-tem\-Id} tem\-Id, unsigned int vector, \hyperlink{TEM__temInt_8h_a7}{TEM\_\-tem\-Int\-Cb\-Rtn} cb\_\-rtn, \hyperlink{TEM__temInt_8h_a6}{TEM\_\-tem\-Int\-Cb\-Prm} cb\_\-prm) \begin{CompactList}\small\item\em Connects the interrupt vector on a individual TEM basis. The TEM must be at least in the PRESENT state.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a87}{TEM\_\-tem\-Ints\-Vme\-Enable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Enables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a88}{TEM\_\-tem\-Ints\-Vme\-Disable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Disables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a89}{TEM\_\-tem\-Ints\-Threshold\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const unsigned int $\ast$thresholds) \begin{CompactList}\small\item\em Sets the event threshold on the specified list of TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a90}{TEM\_\-tem\-Trgs\-Tcss\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const struct \hyperlink{struct__TEM__temTrg}{\_\-TEM\_\-tem\-Trg} $\ast$trgs\mbox{[}$\,$\mbox{]}) \begin{CompactList}\small\item\em Returns a pointer to an array of TEM trigger structures.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a91}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the CPU BSY bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a92}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$cpu\-Bsy) \begin{CompactList}\small\item\em Gets the state of the CPU BSY bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a93}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the CPU BSY bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a94}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of TEMs which support the CPU BSY bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a95}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int cpu\-Bsy) \begin{CompactList}\small\item\em Writes the CPU BSY bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a96}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the L1T ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a97}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Enb) \begin{CompactList}\small\item\em Gets the state of the L1T ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a98}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the L1T ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a99}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of TEMs which support the L1T ENABLE bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a100}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Enb) \begin{CompactList}\small\item\em Writes the L1T ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a101}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the L1T TMR bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a102}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Tmr) \begin{CompactList}\small\item\em Gets the state of the L1T TMR bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a103}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the L1T TMR bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a104}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of TEMs which support the L1T TMR bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a105}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Tmr) \begin{CompactList}\small\item\em Writes the L1T TMR bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a106}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the TREQ ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a107}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$treq\-Enb) \begin{CompactList}\small\item\em Gets the state of the TREQ ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a108}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the TREQ ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a109}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of TEMs which support the TREQ ENABLE bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a110}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int treq\-Enb) \begin{CompactList}\small\item\em Writes the TREQ ENABLE bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a111}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the EXT TREQ ENB bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a112}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Enb) \begin{CompactList}\small\item\em Gets the state of the EXT TREQ ENB bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a113}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the EXT TREQ ENB bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a114}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of TEMs which support the EXT TREQ ENB bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a115}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Enb) \begin{CompactList}\small\item\em Writes the EXT TREQ ENB bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a116}{TEM\_\-tem\-Trgs\-L1t\-In\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-In) \begin{CompactList}\small\item\em Gets the state of the L1T IN mask for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a117}{TEM\_\-tem\-Trgs\-L1t\-In\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-In) \begin{CompactList}\small\item\em Writes the L1T IN mask for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a118}{TEM\_\-tem\-Trgs\-L1t\-Out\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Out) \begin{CompactList}\small\item\em Gets the state of the L1T OUT mask for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a119}{TEM\_\-tem\-Trgs\-L1t\-Out\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Out) \begin{CompactList}\small\item\em Writes the L1T OUT mask for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a120}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the Global L1t Arm bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a121}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Arm) \begin{CompactList}\small\item\em Gets the state of the Global L1t Arm bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a122}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the Global L1t Enable bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a123}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of TEMs which support a Global L1t Arm.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a124}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Arm) \begin{CompactList}\small\item\em Writes the Global L1t Enable bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a125}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Clears the Global L1t Enable bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a126}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Enb) \begin{CompactList}\small\item\em Gets the state of the Global L1t Enable bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a127}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Sets the Global L1t Enable bit for the selected TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a128}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List) \begin{CompactList}\small\item\em Returns a bit mask of TEMs which support a Global L1t Enable.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8h_a129}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Enb) \begin{CompactList}\small\item\em Writes the Global L1t Enable bit for the selected TEMs.\item\end{CompactList}\end{CompactItemize} \subsection{Detailed Description} TEM Utilities, Interface. \begin{Desc} \item[Author: ]\par JJRussell - \href{mailto:russell@slac.stanford.edu}{\tt russell@slac.stanford.edu}\end{Desc} Provides utilities to perform operations on TEMs and their FPGAs in a generic fashion. \subsection{Typedef Documentation} \hypertarget{TEM_8h_a6}{ \index{TEM.h@{TEM.h}!TEM_fpgaAction@{TEM\_\-fpgaAction}} \index{TEM_fpgaAction@{TEM\_\-fpgaAction}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgaAction]{\setlength{\rightskip}{0pt plus 5cm}TEM\_\-fpga\-Action}} \label{TEM_8h_a6} Defines the signature of a generic TEM FPGA action routine. Many of the TEM FPGA routines have the same form \footnotesize\begin{verbatim} unsigned int TEM_fpgas (TEM_fpgas *fpgas, unsigned int fpgaList); where fpgas: Is the array FPGA descriptions fpgaList: Is the list of FPGAs to perform the action on \end{verbatim}\normalsize This typedef allows the user to construct generic TEM FPGA manipulation routines on a list of FPGAs which not only have their FPGA properties parameterized by the FPGA description, but also the actions, in the form of a callback routine with this signature. \hypertarget{TEM_8h_a3}{ \index{TEM.h@{TEM.h}!TEM_fpgaLog@{TEM\_\-fpgaLog}} \index{TEM_fpgaLog@{TEM\_\-fpgaLog}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgaLog]{\setlength{\rightskip}{0pt plus 5cm}TEM\_\-fpga\-Log}} \label{TEM_8h_a3} Typedef for struct \hyperlink{struct__TEM__fpgaLog}{\_\-TEM\_\-fpga\-Log}. Information about each operation performed on a FPGA is logged in this structure. See the enumeration, TEM\_\-fpga\-Log\-Id, for a list of all logged operations. \hypertarget{TEM_8h_a4}{ \index{TEM.h@{TEM.h}!TEM_fpgaLogId@{TEM\_\-fpgaLogId}} \index{TEM_fpgaLogId@{TEM\_\-fpgaLogId}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgaLogId]{\setlength{\rightskip}{0pt plus 5cm}TEM\_\-fpga\-Log\-Id}} \label{TEM_8h_a4} Typedef for struct \_\-TEM\_\-fpga\-Log\-Id. Information about each operation performed on a FPGA is logged in this structure. See the structure, TEM\_\-fpga\-Log, for what information is logged. \hypertarget{TEM_8h_a2}{ \index{TEM.h@{TEM.h}!TEM_tem@{TEM\_\-tem}} \index{TEM_tem@{TEM\_\-tem}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-tem]{\setlength{\rightskip}{0pt plus 5cm}TEM\_\-tem}} \label{TEM_8h_a2} Typedef for struct \hyperlink{struct__TEM__tem}{\_\-TEM\_\-tem}. \subsection{Enumeration Type Documentation} \hypertarget{TEM_8h_a132}{ \index{TEM.h@{TEM.h}!_TEM_fpgaLogId@{\_\-TEM\_\-fpgaLogId}} \index{_TEM_fpgaLogId@{\_\-TEM\_\-fpgaLogId}!TEM.h@{TEM.h}} \subsubsection[\_\-TEM\_\-fpgaLogId]{\setlength{\rightskip}{0pt plus 5cm}enum \_\-TEM\_\-fpga\-Log\-Id}} \label{TEM_8h_a132} Enumerates the various actions on an FPGA which are logged. \begin{Desc} \item[Enumeration values:]\par \begin{description} \index{TEM_C_FPGA_LOGID_ADD@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-ADD}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_ADD@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-ADD}}\item[{\em \hypertarget{TEM_8h_a132a19}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-ADD}} \label{TEM_8h_a132a19} }]Added FPGA to database \index{TEM_C_FPGA_LOGID_CLEAR_LOGIC@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-LOGIC}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_CLEAR_LOGIC@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-LOGIC}}\item[{\em \hypertarget{TEM_8h_a132a20}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-LOGIC}} \label{TEM_8h_a132a20} }]Clear Logic operation \index{TEM_C_FPGA_LOGID_CLEAR_REGS@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-REGS}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_CLEAR_REGS@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-REGS}}\item[{\em \hypertarget{TEM_8h_a132a21}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-REGS}} \label{TEM_8h_a132a21} }]Clear Register operation \index{TEM_C_FPGA_LOGID_CLEAR_L1T_TIMER@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-TIMER}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_CLEAR_L1T_TIMER@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-TIMER}}\item[{\em \hypertarget{TEM_8h_a132a22}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-TIMER}} \label{TEM_8h_a132a22} }]Clear L1t timer operation \index{TEM_C_FPGA_LOGID_CLEAR_L1T_COUNTER@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-COUNTER}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_CLEAR_L1T_COUNTER@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-COUNTER}}\item[{\em \hypertarget{TEM_8h_a132a23}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR\_\-L1T\_\-COUNTER}} \label{TEM_8h_a132a23} }]Clear L1t counter operation \index{TEM_C_FPGA_LOGID_CLEAR@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_CLEAR@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR}}\item[{\em \hypertarget{TEM_8h_a132a24}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-CLEAR}} \label{TEM_8h_a132a24} }]FPGA clear operation \index{TEM_C_FPGA_LOGIC_RESET@{TEM\_\-C\_\-FPGA\_\-LOGIC\_\-RESET}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGIC_RESET@{TEM\_\-C\_\-FPGA\_\-LOGIC\_\-RESET}}\item[{\em \hypertarget{TEM_8h_a132a25}{ {\em TEM\_\-C\_\-FPGA\_\-LOGIC\_\-RESET}} \label{TEM_8h_a132a25} }]FPGA reset operation \index{TEM_C_FPGA_LOGID_UNLOAD@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-UNLOAD}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_UNLOAD@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-UNLOAD}}\item[{\em \hypertarget{TEM_8h_a132a26}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-UNLOAD}} \label{TEM_8h_a132a26} }]FPGA unload operation \index{TEM_C_FPGA_LOGID_LOAD@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-LOAD}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_LOAD@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-LOAD}}\item[{\em \hypertarget{TEM_8h_a132a27}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-LOAD}} \label{TEM_8h_a132a27} }]FPGA load operation \index{TEM_C_FPGA_LOGID_CNT@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CNT}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_LOGID_CNT@{TEM\_\-C\_\-FPGA\_\-LOGID\_\-CNT}}\item[{\em \hypertarget{TEM_8h_a132a28}{ {\em TEM\_\-C\_\-FPGA\_\-LOGID\_\-CNT}} \label{TEM_8h_a132a28} }]Count of all FPGA ops \end{description} \end{Desc} \hypertarget{TEM_8h_a131}{ \index{TEM.h@{TEM.h}!_TEM_fpgaState@{\_\-TEM\_\-fpgaState}} \index{_TEM_fpgaState@{\_\-TEM\_\-fpgaState}!TEM.h@{TEM.h}} \subsubsection[\_\-TEM\_\-fpgaState]{\setlength{\rightskip}{0pt plus 5cm}enum \_\-TEM\_\-fpga\-State}} \label{TEM_8h_a131} Enumerates names of all the states that a FPGA can be in. \begin{Desc} \item[Enumeration values:]\par \begin{description} \index{TEM_C_FPGA_STATE_EXCLUDED@{TEM\_\-C\_\-FPGA\_\-STATE\_\-EXCLUDED}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_STATE_EXCLUDED@{TEM\_\-C\_\-FPGA\_\-STATE\_\-EXCLUDED}}\item[{\em \hypertarget{TEM_8h_a131a15}{ {\em TEM\_\-C\_\-FPGA\_\-STATE\_\-EXCLUDED}} \label{TEM_8h_a131a15} }]Deliberately excluded \index{TEM_C_FPGA_STATE_INCLUDED@{TEM\_\-C\_\-FPGA\_\-STATE\_\-INCLUDED}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_STATE_INCLUDED@{TEM\_\-C\_\-FPGA\_\-STATE\_\-INCLUDED}}\item[{\em \hypertarget{TEM_8h_a131a16}{ {\em TEM\_\-C\_\-FPGA\_\-STATE\_\-INCLUDED}} \label{TEM_8h_a131a16} }]FPGA is included \index{TEM_C_FPGA_STATE_PRESENT@{TEM\_\-C\_\-FPGA\_\-STATE\_\-PRESENT}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_STATE_PRESENT@{TEM\_\-C\_\-FPGA\_\-STATE\_\-PRESENT}}\item[{\em \hypertarget{TEM_8h_a131a17}{ {\em TEM\_\-C\_\-FPGA\_\-STATE\_\-PRESENT}} \label{TEM_8h_a131a17} }]FPGA is on a TEM that is present \index{TEM_C_FPGA_STATE_LOADED@{TEM\_\-C\_\-FPGA\_\-STATE\_\-LOADED}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_FPGA_STATE_LOADED@{TEM\_\-C\_\-FPGA\_\-STATE\_\-LOADED}}\item[{\em \hypertarget{TEM_8h_a131a18}{ {\em TEM\_\-C\_\-FPGA\_\-STATE\_\-LOADED}} \label{TEM_8h_a131a18} }]FPGA is loaded \end{description} \end{Desc} \hypertarget{TEM_8h_a130}{ \index{TEM.h@{TEM.h}!_TEM_temState@{\_\-TEM\_\-temState}} \index{_TEM_temState@{\_\-TEM\_\-temState}!TEM.h@{TEM.h}} \subsubsection[\_\-TEM\_\-temState]{\setlength{\rightskip}{0pt plus 5cm}enum \_\-TEM\_\-tem\-State}} \label{TEM_8h_a130} Enumerates names of all the states that a TEM can be in. \begin{Desc} \item[Enumeration values:]\par \begin{description} \index{TEM_C_TEM_STATE_IGNORE@{TEM\_\-C\_\-TEM\_\-STATE\_\-IGNORE}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_IGNORE@{TEM\_\-C\_\-TEM\_\-STATE\_\-IGNORE}}\item[{\em \hypertarget{TEM_8h_a130a7}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-IGNORE}} \label{TEM_8h_a130a7} }]Dummy state \index{TEM_C_TEM_STATE_EXCLUDED@{TEM\_\-C\_\-TEM\_\-STATE\_\-EXCLUDED}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_EXCLUDED@{TEM\_\-C\_\-TEM\_\-STATE\_\-EXCLUDED}}\item[{\em \hypertarget{TEM_8h_a130a8}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-EXCLUDED}} \label{TEM_8h_a130a8} }]Is excluded from the system \index{TEM_C_TEM_STATE_INCLUDED@{TEM\_\-C\_\-TEM\_\-STATE\_\-INCLUDED}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_INCLUDED@{TEM\_\-C\_\-TEM\_\-STATE\_\-INCLUDED}}\item[{\em \hypertarget{TEM_8h_a130a9}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-INCLUDED}} \label{TEM_8h_a130a9} }]Is described to the database \index{TEM_C_TEM_STATE_PRESENT@{TEM\_\-C\_\-TEM\_\-STATE\_\-PRESENT}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_PRESENT@{TEM\_\-C\_\-TEM\_\-STATE\_\-PRESENT}}\item[{\em \hypertarget{TEM_8h_a130a10}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-PRESENT}} \label{TEM_8h_a130a10} }]Is physically present \index{TEM_C_TEM_STATE_PRESET@{TEM\_\-C\_\-TEM\_\-STATE\_\-PRESET}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_PRESET@{TEM\_\-C\_\-TEM\_\-STATE\_\-PRESET}}\item[{\em \hypertarget{TEM_8h_a130a11}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-PRESET}} \label{TEM_8h_a130a11} }]Is in a known initialization state \index{TEM_C_TEM_STATE_LOADED@{TEM\_\-C\_\-TEM\_\-STATE\_\-LOADED}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_LOADED@{TEM\_\-C\_\-TEM\_\-STATE\_\-LOADED}}\item[{\em \hypertarget{TEM_8h_a130a12}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-LOADED}} \label{TEM_8h_a130a12} }]All FPGAs are loaded, if failure need to check FPGA list for which FPGA failed to load \index{TEM_C_TEM_STATE_RESET@{TEM\_\-C\_\-TEM\_\-STATE\_\-RESET}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_RESET@{TEM\_\-C\_\-TEM\_\-STATE\_\-RESET}}\item[{\em \hypertarget{TEM_8h_a130a13}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-RESET}} \label{TEM_8h_a130a13} }]Has been reset \index{TEM_C_TEM_STATE_READY@{TEM\_\-C\_\-TEM\_\-STATE\_\-READY}!TEM.h@{TEM.h}}\index{TEM.h@{TEM.h}!TEM_C_TEM_STATE_READY@{TEM\_\-C\_\-TEM\_\-STATE\_\-READY}}\item[{\em \hypertarget{TEM_8h_a130a14}{ {\em TEM\_\-C\_\-TEM\_\-STATE\_\-READY}} \label{TEM_8h_a130a14} }]Is ready to take data \end{description} \end{Desc} \subsection{Function Documentation} \hypertarget{TEM_8h_a43}{ \index{TEM.h@{TEM.h}!TEM_fpgasAdd@{TEM\_\-fpgasAdd}} \index{TEM_fpgasAdd@{TEM\_\-fpgasAdd}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasAdd]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Add (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, const struct \hyperlink{struct__TEM__fpgaDsc}{\_\-TEM\_\-fpga\-Dsc} $\ast$const {\em fpga\-Dscs}\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, const struct \_\-FPGA\_\-ttc\-Hdr $\ast$const {\em fpga\-Ttcs}\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem})}} \label{TEM_8h_a43} Adds the specified FPGAs to the internal database. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]An array to be filled in with the information about the requested FPGAs. \item[{\em fpga\-List}]A list of FPGAs to add, expressed as a bit mask. Only FPGAs selected by this bit mask and which are are also part of the system can eventually be loaded. \item[{\em fpga\-Dscs}]An array of pointers to the FPGA descriptors. This gives the static properties of each FPGA. It is an array indexed by the TEM FPGA ID. FPGAs not present in {\em fpga\-List} may be represented by a NULL pointer. \item[{\em fpga\-Ttcs}]An array of pointers to FPGA TTC programs. It is an array indexed by the TEM FPGA ID. FPGAs not present in {\em fpga\-List} may be represented by a NULL pointer. \item[{\em tem}]The TEM database. To properly enter an FPGA, the parent TEM must have already been added to the TEM database. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of FPGAs which failed to be added. A value of 0 indicates all requested FPGAs were added.\end{Desc} Note that this routine only adds the FPGAs to the FPGA database. Do operations are performed on the FPGAs. For example, the actual loading is done with TEM\_\-load\-Fpgas. The TEM that the FPGAs reside on must be at least to the state INCLUDED. \hypertarget{TEM_8h_a44}{ \index{TEM.h@{TEM.h}!TEM_fpgasAdrsGet@{TEM\_\-fpgasAdrsGet}} \index{TEM_fpgasAdrsGet@{TEM\_\-fpgasAdrsGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasAdrsGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Adrs\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em vme\-Adrs}\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, volatile unsigned int $\ast$ {\em lcl\-Adrs}\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]})}} \label{TEM_8h_a44} Fills in arrays of the VME and LOCAL addresss of the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGAs database array. \item[{\em fpga\-List}]The list of TEMs to get the addresses of. \item[{\em vme\-Adrs}]Array to receive the VME addresses. \item[{\em lcl\-Adrs}]Array to receive the LCL addresses. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs did not have addresses.\end{Desc} Only FPGAs which have been INCLUDED have addresses. Addresses which are requested but not present are filled with NULL. \hypertarget{TEM_8h_a53}{ \index{TEM.h@{TEM.h}!TEM_fpgasBistClear@{TEM\_\-fpgasBistClear}} \index{TEM_fpgasBistClear@{TEM\_\-fpgasBistClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasBistClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Bist\-Clear (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a53} Clears the self test bit for the selected FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the self-test mode could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a56}{TEM\_\-fpgas\-Bist\-Supported}(), to get a list of the FPGAs which support a self-test and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a54}{ \index{TEM.h@{TEM.h}!TEM_fpgasBistGet@{TEM\_\-fpgasBistGet}} \index{TEM_fpgasBistGet@{TEM\_\-fpgasBistGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasBistGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Bist\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int $\ast$ {\em bist\-List})}} \label{TEM_8h_a54} Returns the state of the Self Test for the specified fpgas. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em bist\-List}]Returned as a bit mask of the state of the self test, one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the self-test mode could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a56}{TEM\_\-fpgas\-Bist\-Supported}(), to get a list of the FPGAs which support a self-test and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a55}{ \index{TEM.h@{TEM.h}!TEM_fpgasBistSet@{TEM\_\-fpgasBistSet}} \index{TEM_fpgasBistSet@{TEM\_\-fpgasBistSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasBistSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Bist\-Set (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a55} Sets the Self Test for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The list of FPGAs to set the self-test mode. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a56}{TEM\_\-fpgas\-Bist\-Supported}(), to get a list of the FPGAs which support a self-test and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a56}{ \index{TEM.h@{TEM.h}!TEM_fpgasBistSupported@{TEM\_\-fpgasBistSupported}} \index{TEM_fpgasBistSupported@{TEM\_\-fpgasBistSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasBistSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Bist\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a56} Returns which of the specified FPGAs support a self-test mode. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support a self-test. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports a self test mode. It does not in any way indicate that the self-test mode can be set. For example, if the FPGA is not loaded, the self-test mode cannot be set. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8h_a57}{ \index{TEM.h@{TEM.h}!TEM_fpgasBistWrite@{TEM\_\-fpgasBistWrite}} \index{TEM_fpgasBistWrite@{TEM\_\-fpgasBistWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasBistWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Bist\-Write (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em bist\-List})}} \label{TEM_8h_a57} Writes the Self Test for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to write the self-test mode. \item[{\em bist\-List}]The value of the self-test bit to write, expressed as a bit mask, 1 bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a self-test mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a56}{TEM\_\-fpgas\-Bist\-Supported}(), to get a list of the FPGAs which support a self-test and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a45}{ \index{TEM.h@{TEM.h}!TEM_fpgasClear@{TEM\_\-fpgasClear}} \index{TEM_fpgasClear@{TEM\_\-fpgasClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Clear (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a45} Clears the specified list of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask to clear.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs failed to properly clear.\end{Desc} Does a clear of the specified FPGAs. For most FPGAs this consists of toggling the CLEAR LOGIC, CLEAR REGISTER, CLEAR L1T TIMER and CLEAR L1T COUNTER. The TKR FPGA does not have a CLEAR TIMER. The return value is a bit mask indicating which FPGAs failed to properly clear. The corresponding status of each TEM\_\-fpga structure must be examined for details of what went wrong. \hypertarget{TEM_8h_a62}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullClrClear@{TEM\_\-fpgasHfullClrClear}} \index{TEM_fpgasHfullClrClear@{TEM\_\-fpgasHfullClrClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullClrClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Clr\-Clear (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a62} Clears the FIFO Half Full Throttle Manual Clear for the selected FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the self-test mode could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a62}{TEM\_\-fpgas\-Hfull\-Clr\-Supported}(), to get a list of the FPGAs which support a this feature and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a63}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullClrGet@{TEM\_\-fpgasHfullClrGet}} \index{TEM_fpgasHfullClrGet@{TEM\_\-fpgasHfullClrGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullClrGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Clr\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int $\ast$ {\em hfull\-List})}} \label{TEM_8h_a63} Returns the state of the FIFO Half Full Throttle Manual Clear. for the specified fpgas. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em hfull\-List}]Returned as a bit mask of the state of the FIFO Half Full Throttle Manual Clear,one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the FIFO Half Full Throttle Manual Clear is set. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a62}{TEM\_\-fpgas\-Hfull\-Clr\-Supported}(), to get a list of the FPGAs which support this feature and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a64}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullClrSet@{TEM\_\-fpgasHfullClrSet}} \index{TEM_fpgasHfullClrSet@{TEM\_\-fpgasHfullClrSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullClrSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Clr\-Set (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a64} Sets the FIFO Half Full Throttle for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to set the FIFO Half Full Throttle Manual Clear \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a62}{TEM\_\-fpgas\-Hfull\-Clr\-Supported}(), to get a list of the FPGAs which support this feature and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a65}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullClrWrite@{TEM\_\-fpgasHfullClrWrite}} \index{TEM_fpgasHfullClrWrite@{TEM\_\-fpgasHfullClrWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullClrWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Clr\-Write (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em hfull\-List})}} \label{TEM_8h_a65} Writes the Half Full Throttle Manual Clear mode for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to write the bits to. \item[{\em hfullist}]The value of the HFULL Clr bit to write, expressed as a bit mask, 1 bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle Manual Clear mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a62}{TEM\_\-fpgas\-Hfull\-Clr\-Supported}(), to get a list of the FPGAs which support this mode and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a58}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullEnbClear@{TEM\_\-fpgasHfullEnbClear}} \index{TEM_fpgasHfullEnbClear@{TEM\_\-fpgasHfullEnbClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullEnbClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Enb\-Clear (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a58} Clears the FIFO Half Full Throttle for the selected FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the self-test mode could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a67}{TEM\_\-fpgas\-Hfull\-Enb\-Supported}(), to get a list of the FPGAs which support a this feature and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a59}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullEnbGet@{TEM\_\-fpgasHfullEnbGet}} \index{TEM_fpgasHfullEnbGet@{TEM\_\-fpgasHfullEnbGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullEnbGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Enb\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int $\ast$ {\em hfull\-List})}} \label{TEM_8h_a59} Returns the state of the FIFO Half Full Throttle for the specified fpgas. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em hfull\-List}]Returned as a bit mask of the state of the FIFO Half Full Throttle,one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the FIFO Half Full Throttle mode could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a67}{TEM\_\-fpgas\-Hfull\-Enb\-Supported}(), to get a list of the FPGAs which support a FIFO Half Full Throttle and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a60}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullEnbSet@{TEM\_\-fpgasHfullEnbSet}} \index{TEM_fpgasHfullEnbSet@{TEM\_\-fpgasHfullEnbSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullEnbSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Enb\-Set (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a60} Sets the FIFO Half Full Throttle for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to set the FIFO Half Full Throttle. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a67}{TEM\_\-fpgas\-Hfull\-Enb\-Supported}(), to get a list of the FPGAs which support a FIFO Half Full Throttle Enable and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a61}{ \index{TEM.h@{TEM.h}!TEM_fpgasHfullEnbWrite@{TEM\_\-fpgasHfullEnbWrite}} \index{TEM_fpgasHfullEnbWrite@{TEM\_\-fpgasHfullEnbWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasHfullEnbWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Enb\-Write (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em hfull\-List})}} \label{TEM_8h_a61} Writes the Half Full Throttle mode for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to write the self-test mode. \item[{\em hfullist}]The value of the HFULL enable bit to write, expressed as a bit mask, 1 bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a FIFO Half Full Throttle mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a67}{TEM\_\-fpgas\-Hfull\-Enb\-Supported}(), to get a list of the FPGAs which support this mode and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a46}{ \index{TEM.h@{TEM.h}!TEM_fpgasL1tCounterClear@{TEM\_\-fpgasL1tCounterClear}} \index{TEM_fpgasL1tCounterClear@{TEM\_\-fpgasL1tCounterClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasL1tCounterClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-L1t\-Counter\-Clear (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a46} Does a L1T COUNTER CLEAR on the specified list of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask to do the CLEAR L1T COUNTER to.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs failed to properly clear there L1T counters. \end{Desc} \hypertarget{TEM_8h_a47}{ \index{TEM.h@{TEM.h}!TEM_fpgasL1tTimerClear@{TEM\_\-fpgasL1tTimerClear}} \index{TEM_fpgasL1tTimerClear@{TEM\_\-fpgasL1tTimerClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasL1tTimerClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-L1t\-Timer\-Clear (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a47} Does a CLEAR L1T TIMER on the specified list of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask to do the CLEAR L1T TIMER to.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs failed to properly clear there L1T timers. \end{Desc} \hypertarget{TEM_8h_a48}{ \index{TEM.h@{TEM.h}!TEM_fpgasLoad@{TEM\_\-fpgasLoad}} \index{TEM_fpgasLoad@{TEM\_\-fpgasLoad}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasLoad]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Load (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a48} Loads the specified list of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask to load\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs failed to properly load.\end{Desc} The FPGA code to load was set when the FPGA was added to the FPGA database. Note also that this is a time consuming activity, taking on the order on 1/2 second per FPGA. \hypertarget{TEM_8h_a49}{ \index{TEM.h@{TEM.h}!TEM_fpgasLogicClear@{TEM\_\-fpgasLogicClear}} \index{TEM_fpgasLogicClear@{TEM\_\-fpgasLogicClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasLogicClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Logic\-Clear (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a49} Does a CLEAR LOGIC on the specified list of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask to do the CLEAR LOGIC to.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs failed to properly clear. \end{Desc} \hypertarget{TEM_8h_a71}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoBsyMinMaxClear@{TEM\_\-fpgasRdoBsyMinMaxClear}} \index{TEM_fpgasRdoBsyMinMaxClear@{TEM\_\-fpgasRdoBsyMinMaxClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoBsyMinMaxClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Clear (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a71} Clears the Readout Min/Max\-Mode for the selected FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the Readout Busy Min/Max Mode could not be cleared. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a Readout Min/Max mode or it is incapable of returning it. One should call \hyperlink{TEM_8h_a74}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported}(), to get a list of the FPGAs which support the Readout Busy MIN/MAX mode and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a72}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoBsyMinMaxGet@{TEM\_\-fpgasRdoBsyMinMaxGet}} \index{TEM_fpgasRdoBsyMinMaxGet@{TEM\_\-fpgasRdoBsyMinMaxGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoBsyMinMaxGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int $\ast$ {\em rdo\-Bsy\-Min\-Max\-List})}} \label{TEM_8h_a72} Returns the state of the Readout Min/Max\-Mode for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em rdo\-List}]Returned as a bit mask of the state of the readout Min/Max mode, one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the Readout Min/Max mode could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a Readout Min/Max mode or it is incapable of returning it. One should call \hyperlink{TEM_8h_a74}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported}(), to get a list of the FPGAs which support a Min/Max mode and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a73}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoBsyMinMaxSet@{TEM\_\-fpgasRdoBsyMinMaxSet}} \index{TEM_fpgasRdoBsyMinMaxSet@{TEM\_\-fpgasRdoBsyMinMaxSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoBsyMinMaxSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Set (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a73} Sets the Readout Busy Min/Max 1, for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The list of FPGAs to set the Readout Busy Min/Max mode. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a readout Min/Max or it is incapable of returning it. One should call \hyperlink{TEM_8h_a74}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported}(), to get a list of the FPGAs which support a readout Min/Max mode and TEM\_\-fpgas\-Loaded to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a74}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoBsyMinMaxSupported@{TEM\_\-fpgasRdoBsyMinMaxSupported}} \index{TEM_fpgasRdoBsyMinMaxSupported@{TEM\_\-fpgasRdoBsyMinMaxSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoBsyMinMaxSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a74} Returns a bit list indicating which FPGAs support the Readout Busy Min/Max mode. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support the Readout Busy Min/Max mode. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports a Readout Busy Min/Max mode. It does not in any way indicate that the Readout Busy Min/Max mode can be set. For example, if the FPGA is not loaded, the Readout Busy Min/Max Mode cannot be set. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8h_a75}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoBsyMinMaxWrite@{TEM\_\-fpgasRdoBsyMinMaxWrite}} \index{TEM_fpgasRdoBsyMinMaxWrite@{TEM\_\-fpgasRdoBsyMinMaxWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoBsyMinMaxWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Write (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em rdo\-Bsy\-Min\-Max\-List})}} \label{TEM_8h_a75} Writes the Readout Busy Min/Max mode for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to write the Readout Busy Min/Max mode. \item[{\em rdo\-Bsy\-Min\-Max\-List}]The value of the Readout Busy Min/Max mode to write, expressed as a bit mask, 1 bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support the Readout Busy Min/Max or it is incapable of returning it. One should call \hyperlink{TEM_8h_a74}{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported}(), to get a list of the FPGAs which support an the Readout Busy Min/Max mode and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a66}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoModeClear@{TEM\_\-fpgasRdoModeClear}} \index{TEM_fpgasRdoModeClear@{TEM\_\-fpgasRdoModeClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoModeClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Mode\-Clear (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a66} Clears the Readout Mode for the selected FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the Readout Mode could not be cleared. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a Readout mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a69}{TEM\_\-fpgas\-Rdo\-Mode\-Supported}(), to get a list of the FPGAs which support an alternative readout mode and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a67}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoModeGet@{TEM\_\-fpgasRdoModeGet}} \index{TEM_fpgasRdoModeGet@{TEM\_\-fpgasRdoModeGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoModeGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Mode\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int $\ast$ {\em rdo\-List})}} \label{TEM_8h_a67} Returns the state of the Readout Mode for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em rdo\-List}]Returned as a bit mask of the state of the readout mode, one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the Readout Mode mode could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support a Readout mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a69}{TEM\_\-fpgas\-Rdo\-Mode\-Supported}(), to get a list of the FPGAs which support an alternative readout mode and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a68}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoModeSet@{TEM\_\-fpgasRdoModeSet}} \index{TEM_fpgasRdoModeSet@{TEM\_\-fpgasRdoModeSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoModeSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Mode\-Set (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a68} Sets the Readout Mode to 1, for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The list of FPGAs to set the readout mode. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support an alternate mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a69}{TEM\_\-fpgas\-Rdo\-Mode\-Supported}(), to get a list of the FPGAs which support an alternative readout mode and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a69}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoModeSupported@{TEM\_\-fpgasRdoModeSupported}} \index{TEM_fpgasRdoModeSupported@{TEM\_\-fpgasRdoModeSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoModeSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Mode\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a69} Returns a bit list indicating which FPGAs support an alternative Readout Mode. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support an alternative Readout mode. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports an alternate Readout Mode. It does not in any way indicate that the self-test mode can be set. For example, if the FPGA is not loaded, the alternative Readout Mode cannot be set. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8h_a70}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoModeWrite@{TEM\_\-fpgasRdoModeWrite}} \index{TEM_fpgasRdoModeWrite@{TEM\_\-fpgasRdoModeWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoModeWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-Mode\-Write (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em rdo\-List})}} \label{TEM_8h_a70} Writes the Readout Mode for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to write the Readout Mode. \item[{\em rdo\-List}]The value of the Readout Mode to write, expressed as a bit mask, 1 bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support an alternative mode or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a69}{TEM\_\-fpgas\-Rdo\-Mode\-Supported}(), to get a list of the FPGAs which support an alternative Readout Mode and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a76}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoToGet@{TEM\_\-fpgasRdoToGet}} \index{TEM_fpgasRdoToGet@{TEM\_\-fpgasRdoToGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoToGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-To\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int $\ast$ {\em rdo\-To\-List})}} \label{TEM_8h_a76} Returns the state of the Readout Timeout status bit for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs \item[{\em rdo\-List}]Returned as a bit mask of the state of the Readout Timeout status bit, one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the Readout Busy Bit could not be read.\end{Desc} A non-0 return value indicates either the FPGA does not support a Readout Busy Bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8h_a77}{TEM\_\-fpgas\-Rdo\-To\-Supported}(), to get a list of the FPGAs which support a readout timeout status bit and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8h_a77}{ \index{TEM.h@{TEM.h}!TEM_fpgasRdoToSupported@{TEM\_\-fpgasRdoToSupported}} \index{TEM_fpgasRdoToSupported@{TEM\_\-fpgasRdoToSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRdoToSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Rdo\-To\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a77} Returns a bit list indicating which FPGAs support the Readout Timeout status bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support the Readout Timeout status bit. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports a Readout Timeout status bit. If the FPGA is not loaded, the Readout Timeout status bit cannot be read. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8h_a50}{ \index{TEM.h@{TEM.h}!TEM_fpgasRegsClear@{TEM\_\-fpgasRegsClear}} \index{TEM_fpgasRegsClear@{TEM\_\-fpgasRegsClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasRegsClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Regs\-Clear (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a50} Does a CLEAR REGS on the specified list of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask to do the CLEAR REGS to.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs failed to properly clear. \end{Desc} \hypertarget{TEM_8h_a51}{ \index{TEM.h@{TEM.h}!TEM_fpgasTemsGet@{TEM\_\-fpgasTemsGet}} \index{TEM_fpgasTemsGet@{TEM\_\-fpgasTemsGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasTemsGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Tems\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a51} Returns a bit mask of the TEMs associated with the requested set of FPGASs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database array. \item[{\em fpga\-List}]Which FPGAs to check for TEMs, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of the associated TEMs.\end{Desc} This routine translate a list of FPGAs to the their parent list of TEMs. See \hyperlink{TEM_8h_a33}{TEM\_\-tems\-Fpgas\-Get}() for the opposite direction of the translation. \hypertarget{TEM_8h_a52}{ \index{TEM.h@{TEM.h}!TEM_fpgasUnload@{TEM\_\-fpgasUnload}} \index{TEM_fpgasUnload@{TEM\_\-fpgasUnload}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-fpgasUnload]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Unload (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8h_a52} Unloads the specified list of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask to unload.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which FPGAs failed to properly unload.\end{Desc} In reality, there is no real way to {\em unload} an FPGA. All this routine really does it to make the FPGA forget that it was loaded. \hypertarget{TEM_8h_a86}{ \index{TEM.h@{TEM.h}!TEM_temIntConnect@{TEM\_\-temIntConnect}} \index{TEM_temIntConnect@{TEM\_\-temIntConnect}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntConnect]{\setlength{\rightskip}{0pt plus 5cm}int TEM\_\-tem\-Int\-Connect (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, \hyperlink{TEM__ids_8h_a0}{TEM\_\-tem\-Id} {\em tem\-Id}, unsigned int {\em vector}, \hyperlink{TEM__temInt_8h_a7}{TEM\_\-tem\-Int\-Cb\-Rtn} {\em cb\_\-rtn}, \hyperlink{TEM__temInt_8h_a6}{TEM\_\-tem\-Int\-Cb\-Prm} {\em cb\_\-prm})}} \label{TEM_8h_a86} Connects the interrupt vector on a individual TEM basis. The TEM must be at least in the PRESENT state. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-Id}]The target TEM. \item[{\em vector}]The interrupt vector, sans the base address. \item[{\em cb\_\-rtn}]The interrupt callback routine. \item[{\em cb\_\-prm}]The interrupt callback parameter. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Status \end{Desc} \hypertarget{TEM_8h_a80}{ \index{TEM.h@{TEM.h}!TEM_temIntsDisable@{TEM\_\-temIntsDisable}} \index{TEM_temIntsDisable@{TEM\_\-temIntsDisable}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsDisable]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Disable (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em irpts})}} \label{TEM_8h_a80} Disables the specified list of interrupts on all specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database. \item[{\em tem\-List}]The list of TEMs to enable the interrupts on \item[{\em irpts}]The interrupts to enable. Note that this is not an array, but one for all TEMs. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs failed to have their interrupts enabled.\end{Desc} Disables the specified list of interrupts. The TEMs must be at least in the PRESENT state. This is a weaker condition than demanding that they are READY. This condition is imposed when setting the MASTER ENABLE. So one can set the interrupt sources, on TEMs that are present, but one can not use them unless in the READY state. The return value is a bit mask indicating which TEMs of the requested set failed to have their interrupts disabled. The only known failure mode that the TEM is not at least in the PRESENT state. \hypertarget{TEM_8h_a79}{ \index{TEM.h@{TEM.h}!TEM_temIntsEnable@{TEM\_\-temIntsEnable}} \index{TEM_temIntsEnable@{TEM\_\-temIntsEnable}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsEnable]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Enable (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em irpts})}} \label{TEM_8h_a79} Enables the specified list of interrupts on all specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database. \item[{\em tem\-List}]The list of TEMs to enable the interrupts on \item[{\em irpts}]The interrupts to enable. Note that this is not an array, but one for all TEMs. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs failed to have their interrupts enabled.\end{Desc} Enables the specified list of interrupts. The TEMs must be at least in the PRESENT state. This is a weaker condition than demanding that they are READY. This condition is imposed when setting the MASTER ENABLE. So one can set the interrupt sources, on TEMs that are present, but one can not use them unless in the READY state. The return value is a bit mask indicating which TEMs of the requested set failed to have their interrupts enabled. The only known failure mode that the TEM is not at least in the PRESENT state. \hypertarget{TEM_8h_a85}{ \index{TEM.h@{TEM.h}!TEM_temIntsInit@{TEM\_\-temIntsInit}} \index{TEM_temIntsInit@{TEM\_\-temIntsInit}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsInit]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Init (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, const unsigned int $\ast$ {\em levels}, const unsigned int $\ast$ {\em bases})}} \label{TEM_8h_a85} Initializes the TEM interrupt registers. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database TEMs. \item[{\em tem\-List}]The list of TEMs to setup. \item[{\em levels}]The array of VME levels. Must be in the range 1-7. \item[{\em bases}]The array of VME bases. These must be unique and must be selected from the set 0x60, 0x80, 0x\-C0, 0x\-A0. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of those TEMs which could not be properly initialized.\end{Desc} Sets the VME interrupt level and the vector base offset for each of the specified TEMs. Since this requires VME operations to the TEM, the TEM must be at least PRESENT in the system. The return value is a bit mask indicating those TEMs which were requested to be initialized but which failed. Common errors are \footnotesize\begin{verbatim} a. TEM is not PRESENT b. LEVEL is out of range or duplicated. c. BASE is out of range or duplicated. \end{verbatim}\normalsize \begin{Desc} \item[Warning: ]\par PROGRAMMERS NOTE: One should also check whether there are any TEMs which are present on the bus but which also have the same base vector and/or same VME level. Unfortunately this is almost impossible to do correctly since technically, unless the software is told, it cannot discover either which modules are on the bus (there is no BUS map facility) or what the interrupt structure of the encountered modules is (there is no MODULE ID).\end{Desc} One could kludge this by claiming the only VME modules of interest are the TEMs and the interrupt structure is the same and we know what the addresses are. This is all a house-of-cards. I think I'd rather have no protection than halfway measure. \hypertarget{TEM_8h_a84}{ \index{TEM.h@{TEM.h}!TEM_temIntsIscsGet@{TEM\_\-temIntsIscsGet}} \index{TEM_temIntsIscsGet@{TEM\_\-temIntsIscsGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsIscsGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Iscs\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, const struct \hyperlink{struct__TEM__temInt}{\_\-TEM\_\-tem\-Int} $\ast$ {\em isc}\mbox{[}$\,$\mbox{]})}} \label{TEM_8h_a84} Returns a pointer to an array of TEM interrupt structures. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The list of TEMs. \item[{\em isc}]An array, indexed by TEM ID, which will be filled with pointers to the TEM interrupt control structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A mask of those TEMs for which an address was requested, but could not provided.\end{Desc} Returns a pointer to an array of TEM interrupt structures. This breaks the modularity, but the gain in efficiency dictates this strategy. This operation requires no VME operations and, so, does not depend on the module actually existing. It only depends on the TEM being included in the system. The return value is a mask of those TEMs for which an address was requested, but was not provided. These are usually TEMs which are not at least in the INCLUDED state.) \hypertarget{TEM_8h_a82}{ \index{TEM.h@{TEM.h}!TEM_temIntsMasterDisable@{TEM\_\-temIntsMasterDisable}} \index{TEM_temIntsMasterDisable@{TEM\_\-temIntsMasterDisable}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsMasterDisable]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Master\-Disable (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a82} Disables the master interrupt on the specified list of TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database. \item[{\em tem\-List}]The list of TEMs to enable the master interrupt on. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs of the requested set failed to have their master interrupts disabled.\end{Desc} Disables the master interrupt on the specified list of tems. The TEMs must be in the READY state. The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts disabled. The only known failure mode that the TEM is not at least in the READY state. \hypertarget{TEM_8h_a81}{ \index{TEM.h@{TEM.h}!TEM_temIntsMasterEnable@{TEM\_\-temIntsMasterEnable}} \index{TEM_temIntsMasterEnable@{TEM\_\-temIntsMasterEnable}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsMasterEnable]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Master\-Enable (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a81} Enables the master interrupt on the specified list of TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database. \item[{\em tem\-List}]The list of TEMs to enable the master interrupt on. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled.\end{Desc} Enables the master interrupt on the specified list of tems. The TEMs must be in the READY state. The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled. The only known failure mode that the TEM is not at least in the READY state. \hypertarget{TEM_8h_a83}{ \index{TEM.h@{TEM.h}!TEM_temIntsMasterReset@{TEM\_\-temIntsMasterReset}} \index{TEM_temIntsMasterReset@{TEM\_\-temIntsMasterReset}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsMasterReset]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Master\-Reset (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a83} Resets the master interrupt on the specified list of TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database. \item[{\em tem\-List}]The list of TEMs to reset the master interrupt on. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs of the requested set failed to have their master interrupts reset.\end{Desc} Resets the master interrupt on the specified list of tems. The TEMs must be in the READY state. This operation is typically used at initialization time or when in an error state to clear all pending interrupts. The return value is a bit mask indicating which TEMs of the requested set failed to have their master interrupts enabled. The only known failure mode that the TEM is not at least in the READY state. \hypertarget{TEM_8h_a78}{ \index{TEM.h@{TEM.h}!TEM_temIntsMinEventsGet@{TEM\_\-temIntsMinEventsGet}} \index{TEM_temIntsMinEventsGet@{TEM\_\-temIntsMinEventsGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsMinEventsGet]{\setlength{\rightskip}{0pt plus 5cm}int TEM\_\-tem\-Ints\-Min\-Events\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em nevts})}} \label{TEM_8h_a78} Returns the minimum number of events pending from the specified list of TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database. \item[{\em tem\-List}]The list of TEMs to check \item[{\em nevts}]Returned as the number of events in each TEM. Maybe specified as NULL. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The minimum number of pending events.\end{Desc} Returns the minimum number of events pending from the specified list of TEMS. It is assumed that the list of tems has been properly trimmed to reflect those TEMs which are present and ready to go. Reading TEMs which are not PRESENT should return a -1, leaving the EVTS to be the maximum, thus not affecting the result. Given this and the small efficiency hit to do the check, it was decided not to make it. Technically this is not a TEM interrupt routine, but, since it is almost exclusively used in that context, it was included with them. \hypertarget{TEM_8h_a89}{ \index{TEM.h@{TEM.h}!TEM_temIntsThresholdSet@{TEM\_\-temIntsThresholdSet}} \index{TEM_temIntsThresholdSet@{TEM\_\-temIntsThresholdSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsThresholdSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Threshold\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, const unsigned int $\ast$ {\em thresholds})}} \label{TEM_8h_a89} Sets the event threshold on the specified list of TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The list of TEMs to set the event threshold on. \item[{\em thresholds}]The array of thresholds, indexed by TEM id. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The list of TEMs requested to be, but not set.\end{Desc} Sets the event threshold for the specified set of TEMS. In most cases it makes no sense to set the thresholds at different values. This interface is provided more in the sense of uniformity, than for than the increase functionality one gets with an array of thresholds. The return value is a list of TEMs requested but not set. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system. \hypertarget{TEM_8h_a88}{ \index{TEM.h@{TEM.h}!TEM_temIntsVmeDisable@{TEM\_\-temIntsVmeDisable}} \index{TEM_temIntsVmeDisable@{TEM\_\-temIntsVmeDisable}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsVmeDisable]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Vme\-Disable (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a88} Disables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The list of TEMs to disable the master interrupt on. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The list of TEMs requested to be, but not disabled.\end{Desc} The return value is the list of TEMs requested but not disabled. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system. The only other possibility is that the interrupt DISABLE routine fails. This is highly unlikely since the only failure mode listed in the documentation is if one requested interrupt level is out of range. This is very hard to do, since the level is always read from the hardware (it is not cached) and only 3 bits are valid, automatically limiting the return value to the legitimate level. \hypertarget{TEM_8h_a87}{ \index{TEM.h@{TEM.h}!TEM_temIntsVmeEnable@{TEM\_\-temIntsVmeEnable}} \index{TEM_temIntsVmeEnable@{TEM\_\-temIntsVmeEnable}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temIntsVmeEnable]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Ints\-Vme\-Enable (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a87} Enables the VME interrupt on the specified list of TEMs. A TEM must be at least PRESENT before its interrupts can be disabled. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The list of TEMs to enable the master interrupt on. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The list of TEMs requested to be, but not enabled.\end{Desc} The return value is the list of TEMs requested but not enabled. Typically the only reason that this will come back non-zero is that one of the target TEMs is not present in the system. The only other possibility is that the interrupt ENABLE routine fails. This is highly unlikely since the only failure mode listed in the documentation is if one requested interrupt level is out of range. This is very hard to do, since the level is always read from the hardware (it is not cached) and only 3 bits are valid, auto-matically limiting the return value to the legitimate level. \hypertarget{TEM_8h_a29}{ \index{TEM.h@{TEM.h}!TEM_temsAdd@{TEM\_\-temsAdd}} \index{TEM_temsAdd@{TEM\_\-temsAdd}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsAdd]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Add (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List}, const unsigned int {\em vme\-Adrs}\mbox{[}TEM\_\-C\_\-CNT\mbox{]}, const struct \hyperlink{struct__TEM__temDsc}{\_\-TEM\_\-tem\-Dsc} $\ast$const {\em tem\-Dscs}\mbox{[}TEM\_\-C\_\-CNT\mbox{]})}} \label{TEM_8h_a29} Completes a high level description of each active TEM. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]Pointer to the high level description of the TEM to be completed. Only active TEMs are entered, so the TEM ID must be contained within this structure. \item[{\em tem\-List}]A bit mask representing the list of TEMs to be added. \item[{\em vme\-Adrs}]An array of the VME base addresses of the TEMs. These must be in the canonical order, ie ACD, TKR, CAL, LTC, L1T. \item[{\em tem\-Dscs}]An array of pointers to the TEM descriptors. These descriptors give the static properties of a TEM such as the offsets of key registers and bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of exclude TEMs.\end{Desc} Completes a high level description of each active TEM. This describes only the TEM section. The FPGA section is described by another routine. The return value is a bit mask of the excluded TEMs. These are TEMs which where requested to be in the system, but where rejected because they could not be included. At this point only a configuration inconsistency would led to a rejection. A value of 0 indicates that all TEMs requested have been added to the system. \hypertarget{TEM_8h_a30}{ \index{TEM.h@{TEM.h}!TEM_temsAdrsGet@{TEM\_\-temsAdrsGet}} \index{TEM_temsAdrsGet@{TEM\_\-temsAdrsGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsAdrsGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Adrs\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em vme\-Adrs}\mbox{[}TEM\_\-C\_\-CNT\mbox{]}, volatile unsigned int $\ast$ {\em lcl\-Adrs}\mbox{[}TEM\_\-C\_\-CNT\mbox{]})}} \label{TEM_8h_a30} Fills in arrays of the VME and LOCAL addresss of the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to get the addresses of. \item[{\em vme\-Adrs}]Array to receive the VME addresses. \item[{\em lcl\-Adrs}]Array to receive the LCL addresses. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs did not have addresses.\end{Desc} Only TEMs which have been INCLUDED have addresses. Addresses which are requested but not present are filled with NULL. \hypertarget{TEM_8h_a31}{ \index{TEM.h@{TEM.h}!TEM_temsDetsReset@{TEM\_\-temsDetsReset}} \index{TEM_temsDetsReset@{TEM\_\-temsDetsReset}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsDetsReset]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Dets\-Reset (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a31} Issues a reset to the detector specific registers on the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List:}]The list of TEMs to issue a RESET TEM DETECTORS. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs detector registers failed to properly reset.\end{Desc} Issues a resets to the detector specific registers on the specified TEMs. This usually corresponds to toggling bit 2 of the board control registers. Not all TEMs have this capability. The return value is bit mask indicating which TEMs detector registers failed to properly reset. The corresponding status of each TEM\_\-tem structure must be examined for details of what went wrong. \hypertarget{TEM_8h_a32}{ \index{TEM.h@{TEM.h}!TEM_temsFifosReset@{TEM\_\-temsFifosReset}} \index{TEM_temsFifosReset@{TEM\_\-temsFifosReset}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsFifosReset]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Fifos\-Reset (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a32} Issues a reset to the all FIFOs on the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List:}]The list of TEMs to issue a RESET FIFO. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs FIFOs failed to properly reset.\end{Desc} Issues a resets to all FIFOs on the specified TEMs. The return value is bit mask indicating which TEMs had FIFOs which failed to properly reset. The corresponding status of each TEM\_\-tem structure must be examined for details of what went wrong. Practically speaking, the board FIFOs must come to their empty state. If not, they are in error. \hypertarget{TEM_8h_a33}{ \index{TEM.h@{TEM.h}!TEM_temsFpgasGet@{TEM\_\-temsFpgasGet}} \index{TEM_temsFpgasGet@{TEM\_\-temsFpgasGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsFpgasGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Fpgas\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a33} Returns a bit mask of the FPGAs associated with the requested set of TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]Which TEMs to check for FPGAs, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of the associated FPGAs.\end{Desc} This routine translate a list of TEMs to the their a list of FPGAs. See \hyperlink{TEM_8h_a51}{TEM\_\-fpgas\-Tems\-Get}() for the opposite direction of the translation. \hypertarget{TEM_8h_a34}{ \index{TEM.h@{TEM.h}!TEM_temsFpgasReset@{TEM\_\-temsFpgasReset}} \index{TEM_temsFpgasReset@{TEM\_\-temsFpgasReset}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsFpgasReset]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Fpgas\-Reset (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a34} Issues a reset to the all FPGAs on the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List:}]The list of TEMs to issue a RESET FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs had FPGAs whic failed to properly reset.\end{Desc} The return value is a bit mask indicating which TEMs had FPGAs which failed to properly reset. The corresponding status of each TEM\_\-tem structure must be examined for details of what went wrong. \hypertarget{TEM_8h_a35}{ \index{TEM.h@{TEM.h}!TEM_temsPreset@{TEM\_\-temsPreset}} \index{TEM_temsPreset@{TEM\_\-temsPreset}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsPreset]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Preset (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a35} Puts the TEM control registers in a known state so the TEM's FPGAs can be loaded. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List:}]The list of TEMs to issue a RESET FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of which TEMs failed to ready themselves. A value of 0 indicates all TEMs are ready.\end{Desc} This puts the TEM control registers in a know state so that the TEM's FPGAs can be loaded. Currently this consists of doing a READY, but if this proves insufficient... \hypertarget{TEM_8h_a36}{ \index{TEM.h@{TEM.h}!TEM_temsProbe@{TEM\_\-temsProbe}} \index{TEM_temsProbe@{TEM\_\-temsProbe}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsProbe]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Probe (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a36} Probes the VME bus for the present of the specified list of. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to be probed.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The list of TEMs in the requested set, but {\bf not} present on the bus.\end{Desc} Probes the VME bus for the present of the specified list of TEM modules. If the module is present, the state of the TEM is set to present. The TEM must be in the INCLUDED state. \begin{Desc} \item[Warning: ]\par Note that the return value is the set of TEMs not on the bus. This return value may seem strange, but is in keeping with the TEM routines returning a non-zero value only when something goes wrong. Here {\em wrong} is defined as looking for a non-existent TEM. \end{Desc} \hypertarget{TEM_8h_a37}{ \index{TEM.h@{TEM.h}!TEM_temsReady@{TEM\_\-temsReady}} \index{TEM_temsReady@{TEM\_\-temsReady}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsReady]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Ready (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a37} Toggles the RESET FPGA and RESET FIFOs bit in the control register. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to be readied.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of which TEMs failed to ready themselves. A value of 0 indicates all TEMs are ready.\end{Desc} Toggles the RESET FPGA and RESET FIFOs bit in the control register. This must be done after the FPGAs are loaded. This allows the FPGA registers to be seen by the external world. \hypertarget{TEM_8h_a38}{ \index{TEM.h@{TEM.h}!TEM_temsReset@{TEM\_\-temsReset}} \index{TEM_temsReset@{TEM\_\-temsReset}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsReset]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Reset (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a38} Resets all FPGAs, FIFOs and DETs on the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to be readied.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of which TEMs failed to reset themselves. A value of 0 indicates all TEMs are ready. \end{Desc} \hypertarget{TEM_8h_a39}{ \index{TEM.h@{TEM.h}!TEM_temsScopeBitClear@{TEM\_\-temsScopeBitClear}} \index{TEM_temsScopeBitClear@{TEM\_\-temsScopeBitClear}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsScopeBitClear]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Scope\-Bit\-Clear (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a39} Clears the scope bit on the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to have clear the scope bit on.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.\end{Desc} Not all TEMs have a scope bit. It is not considered a failure to attempt to toggle a non-existent scope bit. So, practically speaking, there is no way (except for a corruption error) for this routine to fail. The interface is keep this way for consistency with the other TEM routines. \hypertarget{TEM_8h_a40}{ \index{TEM.h@{TEM.h}!TEM_temsScopeBitSet@{TEM\_\-temsScopeBitSet}} \index{TEM_temsScopeBitSet@{TEM\_\-temsScopeBitSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsScopeBitSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Scope\-Bit\-Set (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a40} Sets the scope bit on the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to have set the scope bit on.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.\end{Desc} Not all TEMs have a scope bit. It is not considered a failure to attempt to toggle a non-existent scope bit. So, practically speaking, there is no way (except for a corruption error) for this routine to fail. The interface is keep this way for consistency with the other TEM routines. \hypertarget{TEM_8h_a41}{ \index{TEM.h@{TEM.h}!TEM_temsScopeBitToggle@{TEM\_\-temsScopeBitToggle}} \index{TEM_temsScopeBitToggle@{TEM\_\-temsScopeBitToggle}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsScopeBitToggle]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Scope\-Bit\-Toggle (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a41} Toggles the scope bit on the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to have toggle the scope bit on.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of which TEMs failed to toggle there scope bit. A value of 0 indicates all TEMs are ready.\end{Desc} Not all TEMs have a scope bit. It is not considered a failure to attempt to toggle a non-existent scope bit. So, practically speaking, there is no way (except for a corruption error) for this routine to fail. The interface is keep this way for consistency with the other TEM routines. \hypertarget{TEM_8h_a42}{ \index{TEM.h@{TEM.h}!TEM_temsUnreadied@{TEM\_\-temsUnreadied}} \index{TEM_temsUnreadied@{TEM\_\-temsUnreadied}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temsUnreadied]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tems\-Unreadied (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List})}} \label{TEM_8h_a42} Simply query routine to learn which TEMs are not ready. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database array. \item[{\em tem\-List}]The list of TEMs to query.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask of which TEMs are not ready. \end{Desc} \hypertarget{TEM_8h_a91}{ \index{TEM.h@{TEM.h}!TEM_temTrgsCpuBsyClr@{TEM\_\-temTrgsCpuBsyClr}} \index{TEM_temTrgsCpuBsyClr@{TEM\_\-temTrgsCpuBsyClr}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsCpuBsyClr]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Clr (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a91} Clears the CPU BSY bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the CPU BSY bit could not be cleared. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a94}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported}(), to get a list of the TEMs which support a CPU BSY and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a92}{ \index{TEM.h@{TEM.h}!TEM_temTrgsCpuBsyGet@{TEM\_\-temTrgsCpuBsyGet}} \index{TEM_temTrgsCpuBsyGet@{TEM\_\-temTrgsCpuBsyGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsCpuBsyGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em cpu\-Bsy})}} \label{TEM_8h_a92} Gets the state of the CPU BSY bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em cpu\-Bsy}]Returned as the state of the CPU BSY bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the CPU BSY bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a94}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported}(), to get a list of the TEMs which support a CPU BSY and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a93}{ \index{TEM.h@{TEM.h}!TEM_temTrgsCpuBsySet@{TEM\_\-temTrgsCpuBsySet}} \index{TEM_temTrgsCpuBsySet@{TEM\_\-temTrgsCpuBsySet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsCpuBsySet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a93} Sets the CPU BSY bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to sets. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the CPU BSY bit could not be set. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a94}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported}(), to get a list of the TEMs which support a CPU BSY and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a94}{ \index{TEM.h@{TEM.h}!TEM_temTrgsCpuBsySupported@{TEM\_\-temTrgsCpuBsySupported}} \index{TEM_temTrgsCpuBsySupported@{TEM\_\-temTrgsCpuBsySupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsCpuBsySupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a94} Returns a bit mask of TEMs which support the CPU BSY bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which support the CPU BSY bit. This is proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8h_a95}{ \index{TEM.h@{TEM.h}!TEM_temTrgsCpuBsyWrite@{TEM\_\-temTrgsCpuBsyWrite}} \index{TEM_temTrgsCpuBsyWrite@{TEM\_\-temTrgsCpuBsyWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsCpuBsyWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em cpu\-Bsys})}} \label{TEM_8h_a95} Writes the CPU BSY bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to write. \item[{\em cpu\-Bsys}]The value to the CPU BSY bits, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the CPU BSY bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a CPU BSY mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a94}{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported}(), to get a list of the TEMs which support a CPU BSY and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a111}{ \index{TEM.h@{TEM.h}!TEM_temTrgsExtTreqEnbClr@{TEM\_\-temTrgsExtTreqEnbClr}} \index{TEM_temTrgsExtTreqEnbClr@{TEM\_\-temTrgsExtTreqEnbClr}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsExtTreqEnbClr]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Clr (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a111} Clears the EXT TREQ ENB bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the EXT TREQ ENB bit could not be cleared. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a EXT TREQ ENB bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM\_\-tem\-Trgs\-Ext\-Treq\-Bit\-Supported(), to get a list of the TEMs which support a EXT TREQ ENB and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a112}{ \index{TEM.h@{TEM.h}!TEM_temTrgsExtTreqEnbGet@{TEM\_\-temTrgsExtTreqEnbGet}} \index{TEM_temTrgsExtTreqEnbGet@{TEM\_\-temTrgsExtTreqEnbGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsExtTreqEnbGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em ext\-Treq})}} \label{TEM_8h_a112} Gets the state of the EXT TREQ ENB bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em cpu\-Bsy}]Returned as the state of the EXT TREQ ENB bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the EXT TREQ ENB bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a EXT TREQ ENB bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a114}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Supported}(), to get a list of the TEMs which support EXT TREQ ENB, and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a113}{ \index{TEM.h@{TEM.h}!TEM_temTrgsExtTreqEnbSet@{TEM\_\-temTrgsExtTreqEnbSet}} \index{TEM_temTrgsExtTreqEnbSet@{TEM\_\-temTrgsExtTreqEnbSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsExtTreqEnbSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a113} Sets the EXT TREQ ENB bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to sets. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the EXT TREQ ENB bit could not be set. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a EXT TREQ ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a114}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Supported}(), to get a list of the TEMs which support a EXT TREQ ENB and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a114}{ \index{TEM.h@{TEM.h}!TEM_temTrgsExtTreqEnbSupported@{TEM\_\-temTrgsExtTreqEnbSupported}} \index{TEM_temTrgsExtTreqEnbSupported@{TEM\_\-temTrgsExtTreqEnbSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsExtTreqEnbSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a114} Returns a bit mask of TEMs which support the EXT TREQ ENB bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which support the EXT TREQ ENB bit. This is proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8h_a115}{ \index{TEM.h@{TEM.h}!TEM_temTrgsExtTreqEnbWrite@{TEM\_\-temTrgsExtTreqEnbWrite}} \index{TEM_temTrgsExtTreqEnbWrite@{TEM\_\-temTrgsExtTreqEnbWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsExtTreqEnbWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em ext\-Treq})}} \label{TEM_8h_a115} Writes the EXT TREQ ENB bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to write. \item[{\em cpu\-Bsys}]The value to the EXT TREQ ENB bits, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the EXT TREQ ENB bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a EXT TREQ ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a114}{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Supported}(), to get a list of the TEMs which support a EXT TREQ ENB and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a120}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tArmClr@{TEM\_\-temTrgsGblL1tArmClr}} \index{TEM_temTrgsGblL1tArmClr@{TEM\_\-temTrgsGblL1tArmClr}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tArmClr]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Clr (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a120} Clears the Global L1t Arm bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T ARM bit could not be cleared. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM\_\-tem\-Trgs\-Gbl\-L1TArm\-Supported(), to get a list of the TEMs which support GBL L1T ARM and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a121}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tArmGet@{TEM\_\-temTrgsGblL1tArmGet}} \index{TEM_temTrgsGblL1tArmGet@{TEM\_\-temTrgsGblL1tArmGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tArmGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em gbl\-L1t\-Arm})}} \label{TEM_8h_a121} Gets the state of the Global L1t Arm bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em cpu\-Bsy}]Returned as the state of the GBL L1T ARM bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T ARM bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a123}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Supported}(), to get a list of the TEMs which support GBL L1T ARM and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a122}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tArmSet@{TEM\_\-temTrgsGblL1tArmSet}} \index{TEM_temTrgsGblL1tArmSet@{TEM\_\-temTrgsGblL1tArmSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tArmSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a122} Sets the Global L1t Enable bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to sets. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T Arm bit could not be set. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ARM or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a123}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Supported}(), to get a list of the TEMs which support a GBL L1T ARM and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a123}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tArmSupported@{TEM\_\-temTrgsGblL1tArmSupported}} \index{TEM_temTrgsGblL1tArmSupported@{TEM\_\-temTrgsGblL1tArmSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tArmSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a123} Returns a bit mask of TEMs which support a Global L1t Arm. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which support the GBL L1T ARM bit. This is proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8h_a124}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tArmWrite@{TEM\_\-temTrgsGblL1tArmWrite}} \index{TEM_temTrgsGblL1tArmWrite@{TEM\_\-temTrgsGblL1tArmWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tArmWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em gbl\-L1t\-Arm})}} \label{TEM_8h_a124} Writes the Global L1t Enable bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to write. \item[{\em cpu\-Bsys}]The value to the GBL L1T ARM bits, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ARM mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a123}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Supported}(), to get a list of the TEMs which support a GBL L1T ARM and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a125}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tEnbClr@{TEM\_\-temTrgsGblL1tEnbClr}} \index{TEM_temTrgsGblL1tEnbClr@{TEM\_\-temTrgsGblL1tEnbClr}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tEnbClr]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Clr (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a125} Clears the Global L1t Enable bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T ENB bit could not be cleared. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call TEM\_\-tem\-Trgs\-Gbl\-L1TEnb\-Supported(), to get a list of the TEMs which support GBL L1T ENB and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a126}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tEnbGet@{TEM\_\-temTrgsGblL1tEnbGet}} \index{TEM_temTrgsGblL1tEnbGet@{TEM\_\-temTrgsGblL1tEnbGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tEnbGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em gbl\-L1t\-Enb})}} \label{TEM_8h_a126} Gets the state of the Global L1t Enable bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em gbl\-L1t\-Enb}]Returned as the state of the GBL L1T ENB bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T ENB bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ENB or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a128}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Supported}(), to get a list of the TEMs which support GBL L1T ENB and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a127}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tEnbSet@{TEM\_\-temTrgsGblL1tEnbSet}} \index{TEM_temTrgsGblL1tEnbSet@{TEM\_\-temTrgsGblL1tEnbSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tEnbSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a127} Sets the Global L1t Enable bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to sets. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T ENB bit could not be set. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ENB or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a128}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Supported}(), to get a list of the TEMs which support a GBL L1T ENB and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a128}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tEnbSupported@{TEM\_\-temTrgsGblL1tEnbSupported}} \index{TEM_temTrgsGblL1tEnbSupported@{TEM\_\-temTrgsGblL1tEnbSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tEnbSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a128} Returns a bit mask of TEMs which support a Global L1t Enable. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which support the GBL L1T ENB bit. This is proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8h_a129}{ \index{TEM.h@{TEM.h}!TEM_temTrgsGblL1tEnbWrite@{TEM\_\-temTrgsGblL1tEnbWrite}} \index{TEM_temTrgsGblL1tEnbWrite@{TEM\_\-temTrgsGblL1tEnbWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsGblL1tEnbWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em gbl\-L1t\-Enb})}} \label{TEM_8h_a129} Writes the Global L1t Enable bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to write. \item[{\em gbl\-L1t\-Enb}]The value to the GBL L1T ENB bits, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the GBL L1T bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a GBL L1T ENB mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a128}{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Supported}(), to get a list of the TEMs which support a GBL L1T ENB and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a96}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tEnbClr@{TEM\_\-temTrgsL1tEnbClr}} \index{TEM_temTrgsL1tEnbClr@{TEM\_\-temTrgsL1tEnbClr}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tEnbClr]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Enb\-Clr (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a96} Clears the L1T ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T ENABLE bit could not be cleared. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a99}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported}(), to get a list of the TEMs which support a L1T ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a97}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tEnbGet@{TEM\_\-temTrgsL1tEnbGet}} \index{TEM_temTrgsL1tEnbGet@{TEM\_\-temTrgsL1tEnbGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tEnbGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Enb\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em l1t\-Enb})}} \label{TEM_8h_a97} Gets the state of the L1T ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em enb\-L1t}]Returned as the state of the L1T ENABLE bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T ENABLE bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a99}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported}(), to get a list of the TEMs which support a L1T ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a98}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tEnbSet@{TEM\_\-temTrgsL1tEnbSet}} \index{TEM_temTrgsL1tEnbSet@{TEM\_\-temTrgsL1tEnbSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tEnbSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Enb\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a98} Sets the L1T ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to sets. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T ENABLE bit could not be set. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a99}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported}(), to get a list of the TEMs which support a L1T ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a99}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tEnbSupported@{TEM\_\-temTrgsL1tEnbSupported}} \index{TEM_temTrgsL1tEnbSupported@{TEM\_\-temTrgsL1tEnbSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tEnbSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a99} Returns a bit mask of TEMs which support the L1T ENABLE bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which support the L1T ENABLE bit. This is proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8h_a100}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tEnbWrite@{TEM\_\-temTrgsL1tEnbWrite}} \index{TEM_temTrgsL1tEnbWrite@{TEM\_\-temTrgsL1tEnbWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tEnbWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Enb\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em l1t\-Enbs})}} \label{TEM_8h_a100} Writes the L1T ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to write. \item[{\em l1t\-Enbs}]The value of the L1T ENABLE bits, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T ENABLE bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a99}{TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported}(), to get a list of the TEMs which support a L1T ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a116}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tInGet@{TEM\_\-temTrgsL1tInGet}} \index{TEM_temTrgsL1tInGet@{TEM\_\-temTrgsL1tInGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tInGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-In\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em l1t\-In})}} \label{TEM_8h_a116} Gets the state of the L1T IN mask for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em enb\-L1t}]Returned as the state of the L1T TMR bits. The mask is densely packed, 3 bit per TEM, by TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T IN mask could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM is incapable of having the L1T IN mask read. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to determine this. \hypertarget{TEM_8h_a117}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tInWrite@{TEM\_\-temTrgsL1tInWrite}} \index{TEM_temTrgsL1tInWrite@{TEM\_\-temTrgsL1tInWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tInWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-In\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em l1t\-In})}} \label{TEM_8h_a117} Writes the L1T IN mask for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask to write. \item[{\em l1t\-In}]The value of the L1T IN mask , expressed as a bit mask. 3 bits/per TEM. This limits the number of TEMs that can be supported to 10. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the TREQ ENABLE bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM is incapable of having the L1T IN mask written to it. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to determine this. \hypertarget{TEM_8h_a118}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tOutGet@{TEM\_\-temTrgsL1tOutGet}} \index{TEM_temTrgsL1tOutGet@{TEM\_\-temTrgsL1tOutGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tOutGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Out\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em l1t\-Out})}} \label{TEM_8h_a118} Gets the state of the L1T OUT mask for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em l1t\-Out}]Returned as the state of the L1T OUT bits. The mask is densely packed, 3 bit per TEM, by TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T OUT mask could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM is incapable of having the L1T OUT mask read. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to determine this. \hypertarget{TEM_8h_a119}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tOutWrite@{TEM\_\-temTrgsL1tOutWrite}} \index{TEM_temTrgsL1tOutWrite@{TEM\_\-temTrgsL1tOutWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tOutWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Out\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em l1t\-Out})}} \label{TEM_8h_a119} Writes the L1T OUT mask for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask to write. \item[{\em l1t\-Out}]The value of the L1T OUT mask , expressed as a bit mask. 3 bits/per TEM. This limits the number of TEMs that can be supported to 10. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the TREQ OUT mask could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM is incapable of having the L1T OUT mask written to it. Currently all TEMs support this functionality, so the only failure mode is if the TEM is not in the ready state. The user may call \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to determine this. \hypertarget{TEM_8h_a101}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tTmrClr@{TEM\_\-temTrgsL1tTmrClr}} \index{TEM_temTrgsL1tTmrClr@{TEM\_\-temTrgsL1tTmrClr}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tTmrClr]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Tmr\-Clr (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a101} Clears the L1T TMR bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T TMR bit could not be cleared. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a104}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported}(), to get a list of the TEMs which support a L1T TMR and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a102}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tTmrGet@{TEM\_\-temTrgsL1tTmrGet}} \index{TEM_temTrgsL1tTmrGet@{TEM\_\-temTrgsL1tTmrGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tTmrGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Tmr\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em l1t\-Tmr})}} \label{TEM_8h_a102} Gets the state of the L1T TMR bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em enb\-L1t}]Returned as the state of the L1T TMR bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T TMR bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a104}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported}(), to get a list of the TEMs which support a L1T TMR and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a103}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tTmrSet@{TEM\_\-temTrgsL1tTmrSet}} \index{TEM_temTrgsL1tTmrSet@{TEM\_\-temTrgsL1tTmrSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tTmrSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Tmr\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a103} Sets the L1T TMR bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to sets. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T TMR bit could not be set. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a104}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported}(), to get a list of the TEMs which support a L1T TMR and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a104}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tTmrSupported@{TEM\_\-temTrgsL1tTmrSupported}} \index{TEM_temTrgsL1tTmrSupported@{TEM\_\-temTrgsL1tTmrSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tTmrSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a104} Returns a bit mask of TEMs which support the L1T TMR bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which support the L1T TMR bit. This is proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8h_a105}{ \index{TEM.h@{TEM.h}!TEM_temTrgsL1tTmrWrite@{TEM\_\-temTrgsL1tTmrWrite}} \index{TEM_temTrgsL1tTmrWrite@{TEM\_\-temTrgsL1tTmrWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsL1tTmrWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-L1t\-Tmr\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em l1t\-Tmrs})}} \label{TEM_8h_a105} Writes the L1T TMR bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to write. \item[{\em l1t\-Enbs}]The value of the L1T TMR bits, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the L1T TMR bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a L1T TMR mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a104}{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported}(), to get a list of the TEMs which support a L1T TMR and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a90}{ \index{TEM.h@{TEM.h}!TEM_temTrgsTcssGet@{TEM\_\-temTrgsTcssGet}} \index{TEM_temTrgsTcssGet@{TEM\_\-temTrgsTcssGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsTcssGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Tcss\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, const struct \hyperlink{struct__TEM__temTrg}{\_\-TEM\_\-tem\-Trg} $\ast$ {\em trg}\mbox{[}$\,$\mbox{]})}} \label{TEM_8h_a90} Returns a pointer to an array of TEM trigger structures. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The list of TEMs. \item[{\em isc}]An array, indexed by TEM ID, which will be filled with pointers to the TEM trigger control structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A mask of those TEMs for which an address was requested, but could not provided.\end{Desc} Returns a pointer to an array of TEM trigger control structures. This breaks the modularity, but the gain in efficiency dictates this strategy. This operation requires no VME operations and, so, does not depend on the module actually existing. It only depends on the TEM being included in the system. The return value is a mask of those TEMs for which an address was requested, but was not provided. These are usually TEMs which are not at least in the INCLUDED state.) \hypertarget{TEM_8h_a106}{ \index{TEM.h@{TEM.h}!TEM_temTrgsTreqEnbClr@{TEM\_\-temTrgsTreqEnbClr}} \index{TEM_temTrgsTreqEnbClr@{TEM\_\-temTrgsTreqEnbClr}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsTreqEnbClr]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Treq\-Enb\-Clr (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a106} Clears the TREQ ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to clear. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the TREQ ENABLE bit could not be cleared. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a109}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported}(), to get a list of the TEMs which support a TREQ ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a107}{ \index{TEM.h@{TEM.h}!TEM_temTrgsTreqEnbGet@{TEM\_\-temTrgsTreqEnbGet}} \index{TEM_temTrgsTreqEnbGet@{TEM\_\-temTrgsTreqEnbGet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsTreqEnbGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Treq\-Enb\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int $\ast$ {\em treq\-Enb})}} \label{TEM_8h_a107} Gets the state of the TREQ ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em treq\-Enb}]Returned as the state of the TREQ ENABLE bits. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the TREQ ENABLE bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a109}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported}(), to get a list of the TEMs which support a REQ ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a108}{ \index{TEM.h@{TEM.h}!TEM_temTrgsTreqEnbSet@{TEM\_\-temTrgsTreqEnbSet}} \index{TEM_temTrgsTreqEnbSet@{TEM\_\-temTrgsTreqEnbSet}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsTreqEnbSet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Treq\-Enb\-Set (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a108} Sets the TREQ ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to sets. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the TREQ ENABLE bit could not be set. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a109}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported}(), to get a list of the TEMs which support a TREQ ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8h_a109}{ \index{TEM.h@{TEM.h}!TEM_temTrgsTreqEnbSupported@{TEM\_\-temTrgsTreqEnbSupported}} \index{TEM_temTrgsTreqEnbSupported@{TEM\_\-temTrgsTreqEnbSupported}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsTreqEnbSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List})}} \label{TEM_8h_a109} Returns a bit mask of TEMs which support the TREQ ENABLE bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which support the TREQ ENABLE bit. This is proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8h_a110}{ \index{TEM.h@{TEM.h}!TEM_temTrgsTreqEnbWrite@{TEM\_\-temTrgsTreqEnbWrite}} \index{TEM_temTrgsTreqEnbWrite@{TEM\_\-temTrgsTreqEnbWrite}!TEM.h@{TEM.h}} \subsubsection[TEM\_\-temTrgsTreqEnbWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-tem\-Trgs\-Treq\-Enb\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em treq\-Enb})}} \label{TEM_8h_a110} Writes the TREQ ENABLE bit for the selected TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to write. \item[{\em treq\-Enb}]The value of the TREQ ENABLE bits, expressed as a bit mask. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the TREQ ENABLE bit could not be written. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support a TREQ ENABLE mode or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call \hyperlink{TEM_8h_a109}{TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported}(), to get a list of the TEMs which support a TREQ ENABLE and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active.