\hypertarget{TEM_8c}{ \section{TEM.c File Reference} \label{TEM_8c}\index{TEM.c@{TEM.c}} } TEM Utility Routines, Implementation. {\tt \#include $<$stdlib.h$>$}\par {\tt \#include $<$int\-Lib.h$>$}\par {\tt \#include $<$iv.h$>$}\par {\tt \#include $<$sys\-Lib.h$>$}\par {\tt \#include \char`\"{}BBC/SPIN.h\char`\"{}}\par {\tt \#include \char`\"{}BBC/TIMERS.h\char`\"{}}\par {\tt \#include \char`\"{}BVME/VME.h\char`\"{}}\par {\tt \#include \char`\"{}BFPGA/FPGA\_\-bs.h\char`\"{}}\par {\tt \#include \char`\"{}BFPGA/FPGA\_\-ttc.h\char`\"{}}\par {\tt \#include \char`\"{}BTU/TEM.h\char`\"{}}\par {\tt \#include \char`\"{}BTU/FPGA\_\-vme.h\char`\"{}}\par {\tt \#include \char`\"{}BTU/TEM\_\-tem\-Dsc.h\char`\"{}}\par {\tt \#include \char`\"{}BTU/TEM\_\-fpga\-Dsc.h\char`\"{}}\par \subsection*{Defines} \begin{CompactItemize} \item \#define \hyperlink{TEM_8c_a0}{OFFSET\_\-OF}(\_\-type, \_\-member) \begin{CompactList}\small\item\em Macro to get the byte offset of a structure member.\item\end{CompactList}\item \hypertarget{TEM_8c_a1}{ \index{CNT_OF@{CNT\_\-OF}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!CNT_OF@{CNT\_\-OF}} \#define \hyperlink{TEM_8c_a1}{CNT\_\-OF}(array)\ (sizeof(array)/sizeof($\ast$array))} \label{TEM_8c_a1} \begin{CompactList}\small\item\em Macro to get the number of elements in an array.\item\end{CompactList}\item \#define \hyperlink{TEM_8c_a2}{TEM\_\-REGADR}(lcl, offset)\ (volatile unsigned int $\ast$)((char $\ast$)lcl+offset) \begin{CompactList}\small\item\em Converts a base address and offset to an address.\item\end{CompactList}\item \hypertarget{TEM_8c_a3}{ \index{BASE_K_SHIFT@{BASE\_\-K\_\-SHIFT}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!BASE_K_SHIFT@{BASE\_\-K\_\-SHIFT}} \#define \hyperlink{TEM_8c_a3}{BASE\_\-K\_\-SHIFT}\ 5} \label{TEM_8c_a3} \begin{CompactList}\small\item\em Used in verifying that a VME BASE INTERRUPT VECTOR is valid.\item\end{CompactList}\item \hypertarget{TEM_8c_a4}{ \index{BASE_M_MBZ_BITS@{BASE\_\-M\_\-MBZ\_\-BITS}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!BASE_M_MBZ_BITS@{BASE\_\-M\_\-MBZ\_\-BITS}} \#define \hyperlink{TEM_8c_a4}{BASE\_\-M\_\-MBZ\_\-BITS}\ ((1 $<$$<$ BASE\_\-K\_\-SHIFT) - 1)} \label{TEM_8c_a4} \begin{CompactList}\small\item\em Used in verifying that a VME BASE INTERRUPT VECTOR is valid.\item\end{CompactList}\item \hypertarget{TEM_8c_a5}{ \index{BASE_M_CHECK@{BASE\_\-M\_\-CHECK}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!BASE_M_CHECK@{BASE\_\-M\_\-CHECK}} \#define \hyperlink{TEM_8c_a5}{BASE\_\-M\_\-CHECK}(\_\-base)\ (\_\-base $>$$>$ BASE\_\-K\_\-SHIFT)} \label{TEM_8c_a5} \begin{CompactList}\small\item\em Used in verifying that a VME BASE INTERRUPT VECTOR is valid.\item\end{CompactList}\item \#define \hyperlink{TEM_8c_a6}{BASE\_\-M\_\-VALID} \begin{CompactList}\small\item\em Used in verifying that a VME BASE INTERRUPT VECTOR is valid.\item\end{CompactList}\item \hypertarget{TEM_8c_a7}{ \index{LVL_M_VALID@{LVL\_\-M\_\-VALID}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!LVL_M_VALID@{LVL\_\-M\_\-VALID}} \#define \hyperlink{TEM_8c_a7}{LVL\_\-M\_\-VALID}\ 0x\-FE} \label{TEM_8c_a7} \begin{CompactList}\small\item\em Mask of allowable VME interrupt levels( 1-7).\item\end{CompactList}\item \#define \hyperlink{TEM_8c_a8}{TEM\_\-M\_\-EVT\_\-NEVTS}\ 0x7ff \begin{CompactList}\small\item\em Bit mask used to extract the number of events.\item\end{CompactList}\end{CompactItemize} \subsection*{Typedefs} \begin{CompactItemize} \item typedef enum \hyperlink{TEM_8c_a141}{\_\-Toggle\-And\-Check\-Opts} \hyperlink{TEM_8c_a9}{Toggle\-And\-Check\-Opts} \begin{CompactList}\small\item\em Typedef for enum \_\-Toggle\-And\-Check\-Opts.\item\end{CompactList}\end{CompactItemize} \subsection*{Enumerations} \begin{CompactItemize} \item enum \hyperlink{TEM_8c_a141}{\_\-Toggle\-And\-Check\-Opts} \{ \hyperlink{TEM_8c_a141a10}{OPT\_\-M\_\-SET} = (1 $<$$<$ 0), \hyperlink{TEM_8c_a141a11}{OPT\_\-M\_\-CLR} = (1 $<$$<$ 1), \hyperlink{TEM_8c_a141a12}{OPT\_\-M\_\-TOGGLE}, \hyperlink{TEM_8c_a141a13}{OPT\_\-M\_\-CHECK} = (1 $<$$<$ 2), \hyperlink{TEM_8c_a141a14}{OPT\_\-M\_\-SET\_\-AND\_\-CHECK}, \hyperlink{TEM_8c_a141a15}{OPT\_\-M\_\-CLR\_\-AND\_\-CHECK}, \hyperlink{TEM_8c_a141a16}{OPT\_\-M\_\-TOGGLE\_\-AND\_\-CHECK} \} \begin{CompactList}\small\item\em Enumerates all the action options to the \hyperlink{TEM_8c_a19}{toggle\-And\-Check}() routine.\item\end{CompactList}\end{CompactItemize} \subsection*{Functions} \begin{CompactItemize} \item int \hyperlink{TEM_8c_a17}{get\-Max\-Size} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Finds the maximum size of a set of FPGA download files.\item\end{CompactList}\item void \hyperlink{TEM_8c_a18}{init\-Logs} (\hyperlink{TEM_8h_a3}{TEM\_\-fpga\-Log} $\ast$logs, int cnt) \begin{CompactList}\small\item\em Initializes an array of TEM\_\-fpga\-Log structures.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a19}{toggle\-And\-Check} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List, unsigned int capabilities, \hyperlink{TEM__temDsc_8h_a5}{TEM\_\-tem\-Action\-Id} which, \hyperlink{TEM_8c_a9}{Toggle\-And\-Check\-Opts} opts, \hyperlink{TEM_8h_a0}{TEM\_\-tem\-State} new\-State) \begin{CompactList}\small\item\em Sets, clears, toggles or checks some bits in the TEM registers.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a20}{do\-Fpga\-Action} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpga, unsigned int fpga\-List, \hyperlink{FPGA__vme_8h_a1}{FPGA\_\-vme\-Action} action, \hyperlink{TEM_8h_a4}{TEM\_\-fpga\-Log\-Id} log\-Id) \begin{CompactList}\small\item\em Performs simple actions on a set of FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a21}{fpgas\-Aux\-Ctl\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which, unsigned int $\ast$ret\-List) \begin{CompactList}\small\item\em Returns the state of the specified bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a22}{fpgas\-Aux\-Ctl\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which) \begin{CompactList}\small\item\em Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a23}{fpgas\-Aux\-Ctl\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which, unsigned int list) \begin{CompactList}\small\item\em Writes the bit for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a24}{fpgas\-Ctl\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which, unsigned int $\ast$ret\-List) \begin{CompactList}\small\item\em Returns the state of the specified bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a25}{fpgas\-Ctl\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which) \begin{CompactList}\small\item\em Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a26}{fpgas\-Ctl\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which, unsigned int list) \begin{CompactList}\small\item\em Writes the bit for the specified FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a27}{fpgas\-Stat\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which, unsigned int $\ast$ret\-List) \begin{CompactList}\small\item\em Returns the state of the specified bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a28}{fpgas\-Stat\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int which) \begin{CompactList}\small\item\em Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a29}{tem\-Trgs\-Ctl\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which, unsigned int $\ast$ret\-List) \begin{CompactList}\small\item\em Returns the state of the specified bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a30}{tem\-Trgs\-Ctl\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which) \begin{CompactList}\small\item\em Returns a bit list indicating whether the TEMs support the specified bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a31}{tem\-Trgs\-Ctl\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which, unsigned int list) \begin{CompactList}\small\item\em Writes the bit for the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a32}{tem\-Trgs\-Msk\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int $\ast$ret\-List) \begin{CompactList}\small\item\em Returns the state of the specified msk.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a33}{tem\-Trgs\-Msk\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which) \begin{CompactList}\small\item\em Returns a bit list indicating whether the TEMs support the specified bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a34}{tem\-Trgs\-Msk\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int list) \begin{CompactList}\small\item\em Writes the bit for the specified TEMs.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a35}{tem\-Trgs\-Tst\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int $\ast$ret\-List) \begin{CompactList}\small\item\em Returns the state of the specified msk.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a36}{tem\-Trgs\-Tst\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which) \begin{CompactList}\small\item\em Returns a bit list indicating whether the TEMs support the specified bit.\item\end{CompactList}\item unsigned int \hyperlink{TEM_8c_a37}{tem\-Trgs\-Tst\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int which, unsigned int width, unsigned int lmsk, unsigned int list) \begin{CompactList}\small\item\em Writes the bit for the specified TEMs.\item\end{CompactList}\item \hypertarget{TEM_8c_a38}{ \index{TEM_temsAdd@{TEM\_\-temsAdd}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsAdd@{TEM\_\-tems\-Add}} unsigned int {\bf TEM\_\-tems\-Add} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List, const unsigned int vme\-Adrs\mbox{[}TEM\_\-C\_\-CNT\mbox{]}, const struct \hyperlink{struct__TEM__temDsc}{\_\-TEM\_\-tem\-Dsc} $\ast$const tem\-Dscs\mbox{[}TEM\_\-C\_\-CNT\mbox{]})} \label{TEM_8c_a38} \item \hypertarget{TEM_8c_a39}{ \index{TEM_temsAdrsGet@{TEM\_\-temsAdrsGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsAdrsGet@{TEM\_\-tems\-Adrs\-Get}} unsigned int {\bf TEM\_\-tems\-Adrs\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int vme\-Adrs\mbox{[}TEM\_\-C\_\-CNT\mbox{]}, volatile unsigned int $\ast$lcl\-Adrs\mbox{[}TEM\_\-C\_\-CNT\mbox{]})} \label{TEM_8c_a39} \item \hypertarget{TEM_8c_a40}{ \index{TEM_temsDetsReset@{TEM\_\-temsDetsReset}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsDetsReset@{TEM\_\-tems\-Dets\-Reset}} unsigned int {\bf TEM\_\-tems\-Dets\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a40} \item \hypertarget{TEM_8c_a41}{ \index{TEM_temsFifosReset@{TEM\_\-temsFifosReset}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsFifosReset@{TEM\_\-tems\-Fifos\-Reset}} unsigned int {\bf TEM\_\-tems\-Fifos\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a41} \item \hypertarget{TEM_8c_a42}{ \index{TEM_temsFpgasGet@{TEM\_\-temsFpgasGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsFpgasGet@{TEM\_\-tems\-Fpgas\-Get}} unsigned int {\bf TEM\_\-tems\-Fpgas\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a42} \item \hypertarget{TEM_8c_a43}{ \index{TEM_temsFpgasReset@{TEM\_\-temsFpgasReset}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsFpgasReset@{TEM\_\-tems\-Fpgas\-Reset}} unsigned int {\bf TEM\_\-tems\-Fpgas\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a43} \item \hypertarget{TEM_8c_a44}{ \index{TEM_temsPreset@{TEM\_\-temsPreset}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsPreset@{TEM\_\-tems\-Preset}} unsigned int {\bf TEM\_\-tems\-Preset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned tem\-List)} \label{TEM_8c_a44} \item \hypertarget{TEM_8c_a45}{ \index{TEM_temsProbe@{TEM\_\-temsProbe}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsProbe@{TEM\_\-tems\-Probe}} unsigned int {\bf TEM\_\-tems\-Probe} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a45} \item \hypertarget{TEM_8c_a46}{ \index{TEM_temsReady@{TEM\_\-temsReady}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsReady@{TEM\_\-tems\-Ready}} unsigned int {\bf TEM\_\-tems\-Ready} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned tem\-List)} \label{TEM_8c_a46} \item \hypertarget{TEM_8c_a47}{ \index{TEM_temsReset@{TEM\_\-temsReset}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsReset@{TEM\_\-tems\-Reset}} unsigned int {\bf TEM\_\-tems\-Reset} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a47} \item \hypertarget{TEM_8c_a48}{ \index{TEM_temsScopeBitClear@{TEM\_\-temsScopeBitClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsScopeBitClear@{TEM\_\-tems\-Scope\-Bit\-Clear}} unsigned int {\bf TEM\_\-tems\-Scope\-Bit\-Clear} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a48} \item \hypertarget{TEM_8c_a49}{ \index{TEM_temsScopeBitSet@{TEM\_\-temsScopeBitSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsScopeBitSet@{TEM\_\-tems\-Scope\-Bit\-Set}} unsigned int {\bf TEM\_\-tems\-Scope\-Bit\-Set} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a49} \item \hypertarget{TEM_8c_a50}{ \index{TEM_temsScopeBitToggle@{TEM\_\-temsScopeBitToggle}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsScopeBitToggle@{TEM\_\-tems\-Scope\-Bit\-Toggle}} unsigned int {\bf TEM\_\-tems\-Scope\-Bit\-Toggle} (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a50} \item \hypertarget{TEM_8c_a51}{ \index{TEM_temsUnreadied@{TEM\_\-temsUnreadied}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temsUnreadied@{TEM\_\-tems\-Unreadied}} unsigned int {\bf TEM\_\-tems\-Unreadied} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem, unsigned int tem\-List)} \label{TEM_8c_a51} \item \hypertarget{TEM_8c_a52}{ \index{TEM_fpgasAdd@{TEM\_\-fpgasAdd}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasAdd@{TEM\_\-fpgas\-Add}} unsigned int {\bf TEM\_\-fpgas\-Add} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, const struct \hyperlink{struct__TEM__fpgaDsc}{\_\-TEM\_\-fpga\-Dsc} $\ast$const fpga\-Dscs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, const struct \_\-FPGA\_\-ttc\-Hdr $\ast$const fpga\-Ttcs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tem)} \label{TEM_8c_a52} \item \hypertarget{TEM_8c_a53}{ \index{TEM_fpgasAdrsGet@{TEM\_\-fpgasAdrsGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasAdrsGet@{TEM\_\-fpgas\-Adrs\-Get}} unsigned int {\bf TEM\_\-fpgas\-Adrs\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int vme\-Adrs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]}, volatile unsigned int $\ast$lcl\-Adrs\mbox{[}TEM\_\-C\_\-FPGA\_\-CNT\mbox{]})} \label{TEM_8c_a53} \item \hypertarget{TEM_8c_a54}{ \index{TEM_fpgasBistClear@{TEM\_\-fpgasBistClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasBistClear@{TEM\_\-fpgas\-Bist\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Bist\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a54} \item \hypertarget{TEM_8c_a55}{ \index{TEM_fpgasBistGet@{TEM\_\-fpgasBistGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasBistGet@{TEM\_\-fpgas\-Bist\-Get}} unsigned int {\bf TEM\_\-fpgas\-Bist\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$bist\-List)} \label{TEM_8c_a55} \item \hypertarget{TEM_8c_a56}{ \index{TEM_fpgasBistSet@{TEM\_\-fpgasBistSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasBistSet@{TEM\_\-fpgas\-Bist\-Set}} unsigned int {\bf TEM\_\-fpgas\-Bist\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a56} \item \hypertarget{TEM_8c_a57}{ \index{TEM_fpgasBistSupported@{TEM\_\-fpgasBistSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasBistSupported@{TEM\_\-fpgas\-Bist\-Supported}} unsigned int {\bf TEM\_\-fpgas\-Bist\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a57} \item \hypertarget{TEM_8c_a58}{ \index{TEM_fpgasBistWrite@{TEM\_\-fpgasBistWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasBistWrite@{TEM\_\-fpgas\-Bist\-Write}} unsigned int {\bf TEM\_\-fpgas\-Bist\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int bist\-List)} \label{TEM_8c_a58} \item \hypertarget{TEM_8c_a59}{ \index{TEM_fpgasHfullClrClear@{TEM\_\-fpgasHfullClrClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullClrClear@{TEM\_\-fpgas\-Hfull\-Clr\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Clr\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a59} \item \hypertarget{TEM_8c_a60}{ \index{TEM_fpgasHfullClrGet@{TEM\_\-fpgasHfullClrGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullClrGet@{TEM\_\-fpgas\-Hfull\-Clr\-Get}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Clr\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$hfull\-List)} \label{TEM_8c_a60} \item \hypertarget{TEM_8c_a61}{ \index{TEM_fpgasHfullClrSet@{TEM\_\-fpgasHfullClrSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullClrSet@{TEM\_\-fpgas\-Hfull\-Clr\-Set}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Clr\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a61} \item unsigned int \hyperlink{TEM_8c_a62}{TEM\_\-fpgas\-Hfull\-Clr\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Returns which of the specified FPGAs support a FIFO Half Full Throttle Manual Clear mode.\item\end{CompactList}\item \hypertarget{TEM_8c_a63}{ \index{TEM_fpgasHfullClrWrite@{TEM\_\-fpgasHfullClrWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullClrWrite@{TEM\_\-fpgas\-Hfull\-Clr\-Write}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Clr\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int hfull\-List)} \label{TEM_8c_a63} \item \hypertarget{TEM_8c_a64}{ \index{TEM_fpgasHfullEnbClear@{TEM\_\-fpgasHfullEnbClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullEnbClear@{TEM\_\-fpgas\-Hfull\-Enb\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Enb\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a64} \item \hypertarget{TEM_8c_a65}{ \index{TEM_fpgasHfullEnbGet@{TEM\_\-fpgasHfullEnbGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullEnbGet@{TEM\_\-fpgas\-Hfull\-Enb\-Get}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Enb\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$hfull\-List)} \label{TEM_8c_a65} \item \hypertarget{TEM_8c_a66}{ \index{TEM_fpgasHfullEnbSet@{TEM\_\-fpgasHfullEnbSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullEnbSet@{TEM\_\-fpgas\-Hfull\-Enb\-Set}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Enb\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a66} \item unsigned int \hyperlink{TEM_8c_a67}{TEM\_\-fpgas\-Hfull\-Enb\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List) \begin{CompactList}\small\item\em Returns which of the specified FPGAs support a FIFO Half Full Throttle mode.\item\end{CompactList}\item \hypertarget{TEM_8c_a68}{ \index{TEM_fpgasHfullEnbWrite@{TEM\_\-fpgasHfullEnbWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasHfullEnbWrite@{TEM\_\-fpgas\-Hfull\-Enb\-Write}} unsigned int {\bf TEM\_\-fpgas\-Hfull\-Enb\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int hfull\-List)} \label{TEM_8c_a68} \item \hypertarget{TEM_8c_a69}{ \index{TEM_fpgasRdoModeClear@{TEM\_\-fpgasRdoModeClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoModeClear@{TEM\_\-fpgas\-Rdo\-Mode\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Mode\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a69} \item \hypertarget{TEM_8c_a70}{ \index{TEM_fpgasRdoModeGet@{TEM\_\-fpgasRdoModeGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoModeGet@{TEM\_\-fpgas\-Rdo\-Mode\-Get}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Mode\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$rdo\-List)} \label{TEM_8c_a70} \item \hypertarget{TEM_8c_a71}{ \index{TEM_fpgasRdoModeSet@{TEM\_\-fpgasRdoModeSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoModeSet@{TEM\_\-fpgas\-Rdo\-Mode\-Set}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Mode\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a71} \item \hypertarget{TEM_8c_a72}{ \index{TEM_fpgasRdoModeSupported@{TEM\_\-fpgasRdoModeSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoModeSupported@{TEM\_\-fpgas\-Rdo\-Mode\-Supported}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Mode\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a72} \item \hypertarget{TEM_8c_a73}{ \index{TEM_fpgasRdoModeWrite@{TEM\_\-fpgasRdoModeWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoModeWrite@{TEM\_\-fpgas\-Rdo\-Mode\-Write}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Mode\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int rdo\-List)} \label{TEM_8c_a73} \item \hypertarget{TEM_8c_a74}{ \index{TEM_fpgasRdoBsyMinMaxClear@{TEM\_\-fpgasRdoBsyMinMaxClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoBsyMinMaxClear@{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Clear} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a74} \item \hypertarget{TEM_8c_a75}{ \index{TEM_fpgasRdoBsyMinMaxGet@{TEM\_\-fpgasRdoBsyMinMaxGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoBsyMinMaxGet@{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Get}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$rdo\-Min\-Max\-List)} \label{TEM_8c_a75} \item \hypertarget{TEM_8c_a76}{ \index{TEM_fpgasRdoBsyMinMaxSet@{TEM\_\-fpgasRdoBsyMinMaxSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoBsyMinMaxSet@{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Set}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Set} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a76} \item \hypertarget{TEM_8c_a77}{ \index{TEM_fpgasRdoBsyMinMaxSupported@{TEM\_\-fpgasRdoBsyMinMaxSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoBsyMinMaxSupported@{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a77} \item \hypertarget{TEM_8c_a78}{ \index{TEM_fpgasRdoBsyMinMaxWrite@{TEM\_\-fpgasRdoBsyMinMaxWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoBsyMinMaxWrite@{TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Write}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-Bsy\-Min\-Max\-Write} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int rdo\-Bsy\-Min\-Max\-List)} \label{TEM_8c_a78} \item \hypertarget{TEM_8c_a79}{ \index{TEM_fpgasRdoToGet@{TEM\_\-fpgasRdoToGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoToGet@{TEM\_\-fpgas\-Rdo\-To\-Get}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-To\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List, unsigned int $\ast$rdo\-To\-List)} \label{TEM_8c_a79} \item \hypertarget{TEM_8c_a80}{ \index{TEM_fpgasRdoToSupported@{TEM\_\-fpgasRdoToSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRdoToSupported@{TEM\_\-fpgas\-Rdo\-To\-Supported}} unsigned int {\bf TEM\_\-fpgas\-Rdo\-To\-Supported} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a80} \item \hypertarget{TEM_8c_a81}{ \index{TEM_fpgasClear@{TEM\_\-fpgasClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasClear@{TEM\_\-fpgas\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a81} \item \hypertarget{TEM_8c_a82}{ \index{TEM_fpgasL1tCounterClear@{TEM\_\-fpgasL1tCounterClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasL1tCounterClear@{TEM\_\-fpgas\-L1t\-Counter\-Clear}} unsigned int {\bf TEM\_\-fpgas\-L1t\-Counter\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a82} \item \hypertarget{TEM_8c_a83}{ \index{TEM_fpgasL1tTimerClear@{TEM\_\-fpgasL1tTimerClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasL1tTimerClear@{TEM\_\-fpgas\-L1t\-Timer\-Clear}} unsigned int {\bf TEM\_\-fpgas\-L1t\-Timer\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a83} \item \hypertarget{TEM_8c_a84}{ \index{TEM_fpgasLoad@{TEM\_\-fpgasLoad}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasLoad@{TEM\_\-fpgas\-Load}} unsigned int {\bf TEM\_\-fpgas\-Load} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a84} \item \hypertarget{TEM_8c_a85}{ \index{TEM_fpgasLogicClear@{TEM\_\-fpgasLogicClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasLogicClear@{TEM\_\-fpgas\-Logic\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Logic\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a85} \item \hypertarget{TEM_8c_a86}{ \index{TEM_fpgasRegsClear@{TEM\_\-fpgasRegsClear}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasRegsClear@{TEM\_\-fpgas\-Regs\-Clear}} unsigned int {\bf TEM\_\-fpgas\-Regs\-Clear} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpgas, unsigned int fpga\-List)} \label{TEM_8c_a86} \item \hypertarget{TEM_8c_a87}{ \index{TEM_fpgasTemsGet@{TEM\_\-fpgasTemsGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasTemsGet@{TEM\_\-fpgas\-Tems\-Get}} unsigned int {\bf TEM\_\-fpgas\-Tems\-Get} (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpga, unsigned int fpga\-List)} \label{TEM_8c_a87} \item \hypertarget{TEM_8c_a88}{ \index{TEM_fpgasUnload@{TEM\_\-fpgasUnload}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_fpgasUnload@{TEM\_\-fpgas\-Unload}} unsigned int {\bf TEM\_\-fpgas\-Unload} (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$fpga, unsigned int fpga\-List)} \label{TEM_8c_a88} \item \hypertarget{TEM_8c_a89}{ \index{TEM_temIntsIscsGet@{TEM\_\-temIntsIscsGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsIscsGet@{TEM\_\-tem\-Ints\-Iscs\-Get}} unsigned int {\bf TEM\_\-tem\-Ints\-Iscs\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const struct \hyperlink{struct__TEM__temInt}{\_\-TEM\_\-tem\-Int} $\ast$isc\mbox{[}$\,$\mbox{]})} \label{TEM_8c_a89} \item \hypertarget{TEM_8c_a90}{ \index{TEM_temIntsInit@{TEM\_\-temIntsInit}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsInit@{TEM\_\-tem\-Ints\-Init}} unsigned int {\bf TEM\_\-tem\-Ints\-Init} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const unsigned int $\ast$levels, const unsigned int $\ast$bases)} \label{TEM_8c_a90} \item \hypertarget{TEM_8c_a91}{ \index{TEM_temIntsMinEventsGet@{TEM\_\-temIntsMinEventsGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsMinEventsGet@{TEM\_\-tem\-Ints\-Min\-Events\-Get}} int {\bf TEM\_\-tem\-Ints\-Min\-Events\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$nevts)} \label{TEM_8c_a91} \item \hypertarget{TEM_8c_a92}{ \index{TEM_temIntsDisable@{TEM\_\-temIntsDisable}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsDisable@{TEM\_\-tem\-Ints\-Disable}} unsigned int {\bf TEM\_\-tem\-Ints\-Disable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int irpts)} \label{TEM_8c_a92} \item \hypertarget{TEM_8c_a93}{ \index{TEM_temIntsEnable@{TEM\_\-temIntsEnable}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsEnable@{TEM\_\-tem\-Ints\-Enable}} unsigned int {\bf TEM\_\-tem\-Ints\-Enable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int irpts)} \label{TEM_8c_a93} \item \hypertarget{TEM_8c_a94}{ \index{TEM_temIntsMasterDisable@{TEM\_\-temIntsMasterDisable}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsMasterDisable@{TEM\_\-tem\-Ints\-Master\-Disable}} unsigned int {\bf TEM\_\-tem\-Ints\-Master\-Disable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a94} \item \hypertarget{TEM_8c_a95}{ \index{TEM_temIntsMasterEnable@{TEM\_\-temIntsMasterEnable}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsMasterEnable@{TEM\_\-tem\-Ints\-Master\-Enable}} unsigned int {\bf TEM\_\-tem\-Ints\-Master\-Enable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a95} \item \hypertarget{TEM_8c_a96}{ \index{TEM_temIntsMasterReset@{TEM\_\-temIntsMasterReset}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsMasterReset@{TEM\_\-tem\-Ints\-Master\-Reset}} unsigned int {\bf TEM\_\-tem\-Ints\-Master\-Reset} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a96} \item \hypertarget{TEM_8c_a97}{ \index{TEM_temIntConnect@{TEM\_\-temIntConnect}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntConnect@{TEM\_\-tem\-Int\-Connect}} int {\bf TEM\_\-tem\-Int\-Connect} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, \hyperlink{TEM__ids_8h_a0}{TEM\_\-tem\-Id} tem\-Id, unsigned int vector, \hyperlink{TEM__temInt_8h_a7}{TEM\_\-tem\-Int\-Cb\-Rtn} cb\_\-rtn, \hyperlink{TEM__temInt_8h_a6}{TEM\_\-tem\-Int\-Cb\-Prm} cb\_\-prm)} \label{TEM_8c_a97} \item \hypertarget{TEM_8c_a98}{ \index{TEM_temIntsVmeDisable@{TEM\_\-temIntsVmeDisable}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsVmeDisable@{TEM\_\-tem\-Ints\-Vme\-Disable}} unsigned int {\bf TEM\_\-tem\-Ints\-Vme\-Disable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a98} \item \hypertarget{TEM_8c_a99}{ \index{TEM_temIntsVmeEnable@{TEM\_\-temIntsVmeEnable}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsVmeEnable@{TEM\_\-tem\-Ints\-Vme\-Enable}} unsigned int {\bf TEM\_\-tem\-Ints\-Vme\-Enable} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a99} \item \hypertarget{TEM_8c_a100}{ \index{TEM_temIntsThresholdSet@{TEM\_\-temIntsThresholdSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temIntsThresholdSet@{TEM\_\-tem\-Ints\-Threshold\-Set}} unsigned int {\bf TEM\_\-tem\-Ints\-Threshold\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const unsigned int $\ast$thresholds)} \label{TEM_8c_a100} \item \hypertarget{TEM_8c_a101}{ \index{TEM_temTrgsTcssGet@{TEM\_\-temTrgsTcssGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsTcssGet@{TEM\_\-tem\-Trgs\-Tcss\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-Tcss\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, const struct \hyperlink{struct__TEM__temTrg}{\_\-TEM\_\-tem\-Trg} $\ast$trg\mbox{[}$\,$\mbox{]})} \label{TEM_8c_a101} \item \hypertarget{TEM_8c_a102}{ \index{TEM_temTrgsCpuBsyClr@{TEM\_\-temTrgsCpuBsyClr}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsCpuBsyClr@{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Clr}} unsigned int {\bf TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a102} \item \hypertarget{TEM_8c_a103}{ \index{TEM_temTrgsCpuBsyGet@{TEM\_\-temTrgsCpuBsyGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsCpuBsyGet@{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$cpu\-Bsy)} \label{TEM_8c_a103} \item \hypertarget{TEM_8c_a104}{ \index{TEM_temTrgsCpuBsySet@{TEM\_\-temTrgsCpuBsySet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsCpuBsySet@{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Set}} unsigned int {\bf TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a104} \item \hypertarget{TEM_8c_a105}{ \index{TEM_temTrgsCpuBsySupported@{TEM\_\-temTrgsCpuBsySupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsCpuBsySupported@{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported}} unsigned int {\bf TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a105} \item \hypertarget{TEM_8c_a106}{ \index{TEM_temTrgsCpuBsyWrite@{TEM\_\-temTrgsCpuBsyWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsCpuBsyWrite@{TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-Cpu\-Bsy\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int cpu\-Bsys)} \label{TEM_8c_a106} \item \hypertarget{TEM_8c_a107}{ \index{TEM_temTrgsL1tEnbClr@{TEM\_\-temTrgsL1tEnbClr}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tEnbClr@{TEM\_\-tem\-Trgs\-L1t\-Enb\-Clr}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a107} \item \hypertarget{TEM_8c_a108}{ \index{TEM_temTrgsL1tEnbGet@{TEM\_\-temTrgsL1tEnbGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tEnbGet@{TEM\_\-tem\-Trgs\-L1t\-Enb\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Enb)} \label{TEM_8c_a108} \item \hypertarget{TEM_8c_a109}{ \index{TEM_temTrgsL1tEnbSet@{TEM\_\-temTrgsL1tEnbSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tEnbSet@{TEM\_\-tem\-Trgs\-L1t\-Enb\-Set}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a109} \item \hypertarget{TEM_8c_a110}{ \index{TEM_temTrgsL1tEnbSupported@{TEM\_\-temTrgsL1tEnbSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tEnbSupported@{TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a110} \item \hypertarget{TEM_8c_a111}{ \index{TEM_temTrgsL1tEnbWrite@{TEM\_\-temTrgsL1tEnbWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tEnbWrite@{TEM\_\-tem\-Trgs\-L1t\-Enb\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Enbs)} \label{TEM_8c_a111} \item \hypertarget{TEM_8c_a112}{ \index{TEM_temTrgsL1tTmrClr@{TEM\_\-temTrgsL1tTmrClr}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tTmrClr@{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Clr}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Tmr\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a112} \item \hypertarget{TEM_8c_a113}{ \index{TEM_temTrgsL1tTmrGet@{TEM\_\-temTrgsL1tTmrGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tTmrGet@{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Tmr\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Tmr)} \label{TEM_8c_a113} \item \hypertarget{TEM_8c_a114}{ \index{TEM_temTrgsL1tTmrSet@{TEM\_\-temTrgsL1tTmrSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tTmrSet@{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Set}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Tmr\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a114} \item \hypertarget{TEM_8c_a115}{ \index{TEM_temTrgsL1tTmrSupported@{TEM\_\-temTrgsL1tTmrSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tTmrSupported@{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Tmr\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a115} \item \hypertarget{TEM_8c_a116}{ \index{TEM_temTrgsL1tTmrWrite@{TEM\_\-temTrgsL1tTmrWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tTmrWrite@{TEM\_\-tem\-Trgs\-L1t\-Tmr\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Tmr\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int tmr\-Enbs)} \label{TEM_8c_a116} \item \hypertarget{TEM_8c_a117}{ \index{TEM_temTrgsTreqEnbClr@{TEM\_\-temTrgsTreqEnbClr}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsTreqEnbClr@{TEM\_\-tem\-Trgs\-Treq\-Enb\-Clr}} unsigned int {\bf TEM\_\-tem\-Trgs\-Treq\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a117} \item \hypertarget{TEM_8c_a118}{ \index{TEM_temTrgsTreqEnbGet@{TEM\_\-temTrgsTreqEnbGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsTreqEnbGet@{TEM\_\-tem\-Trgs\-Treq\-Enb\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-Treq\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$treq\-Enb)} \label{TEM_8c_a118} \item \hypertarget{TEM_8c_a119}{ \index{TEM_temTrgsTreqEnbSet@{TEM\_\-temTrgsTreqEnbSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsTreqEnbSet@{TEM\_\-tem\-Trgs\-Treq\-Enb\-Set}} unsigned int {\bf TEM\_\-tem\-Trgs\-Treq\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a119} \item \hypertarget{TEM_8c_a120}{ \index{TEM_temTrgsTreqEnbSupported@{TEM\_\-temTrgsTreqEnbSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsTreqEnbSupported@{TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported}} unsigned int {\bf TEM\_\-tem\-Trgs\-Treq\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a120} \item \hypertarget{TEM_8c_a121}{ \index{TEM_temTrgsTreqEnbWrite@{TEM\_\-temTrgsTreqEnbWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsTreqEnbWrite@{TEM\_\-tem\-Trgs\-Treq\-Enb\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-Treq\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int treq\-Enbs)} \label{TEM_8c_a121} \item \hypertarget{TEM_8c_a122}{ \index{TEM_temTrgsL1tInGet@{TEM\_\-temTrgsL1tInGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tInGet@{TEM\_\-tem\-Trgs\-L1t\-In\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-In\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-In)} \label{TEM_8c_a122} \item \hypertarget{TEM_8c_a123}{ \index{TEM_temTrgsL1tInWrite@{TEM\_\-temTrgsL1tInWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tInWrite@{TEM\_\-tem\-Trgs\-L1t\-In\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-In\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-In)} \label{TEM_8c_a123} \item \hypertarget{TEM_8c_a124}{ \index{TEM_temTrgsL1tOutGet@{TEM\_\-temTrgsL1tOutGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tOutGet@{TEM\_\-tem\-Trgs\-L1t\-Out\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Out\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$l1t\-Out)} \label{TEM_8c_a124} \item \hypertarget{TEM_8c_a125}{ \index{TEM_temTrgsL1tOutWrite@{TEM\_\-temTrgsL1tOutWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsL1tOutWrite@{TEM\_\-tem\-Trgs\-L1t\-Out\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-L1t\-Out\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int l1t\-Out)} \label{TEM_8c_a125} \item \hypertarget{TEM_8c_a126}{ \index{TEM_temTrgsExtTreqEnbClr@{TEM\_\-temTrgsExtTreqEnbClr}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsExtTreqEnbClr@{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Clr}} unsigned int {\bf TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a126} \item \hypertarget{TEM_8c_a127}{ \index{TEM_temTrgsExtTreqEnbGet@{TEM\_\-temTrgsExtTreqEnbGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsExtTreqEnbGet@{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$ext\-Treq)} \label{TEM_8c_a127} \item \hypertarget{TEM_8c_a128}{ \index{TEM_temTrgsExtTreqEnbSet@{TEM\_\-temTrgsExtTreqEnbSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsExtTreqEnbSet@{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Set}} unsigned int {\bf TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a128} \item \hypertarget{TEM_8c_a129}{ \index{TEM_temTrgsExtTreqEnbSupported@{TEM\_\-temTrgsExtTreqEnbSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsExtTreqEnbSupported@{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Supported}} unsigned int {\bf TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a129} \item \hypertarget{TEM_8c_a130}{ \index{TEM_temTrgsExtTreqEnbWrite@{TEM\_\-temTrgsExtTreqEnbWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsExtTreqEnbWrite@{TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-Ext\-Treq\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int ext\-Treq)} \label{TEM_8c_a130} \item \hypertarget{TEM_8c_a131}{ \index{TEM_temTrgsGblL1tArmClr@{TEM\_\-temTrgsGblL1tArmClr}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tArmClr@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Clr}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a131} \item \hypertarget{TEM_8c_a132}{ \index{TEM_temTrgsGblL1tArmGet@{TEM\_\-temTrgsGblL1tArmGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tArmGet@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$gbl\-L1t\-Arm)} \label{TEM_8c_a132} \item \hypertarget{TEM_8c_a133}{ \index{TEM_temTrgsGblL1tArmSet@{TEM\_\-temTrgsGblL1tArmSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tArmSet@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Set}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a133} \item \hypertarget{TEM_8c_a134}{ \index{TEM_temTrgsGblL1tArmSupported@{TEM\_\-temTrgsGblL1tArmSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tArmSupported@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Supported}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a134} \item \hypertarget{TEM_8c_a135}{ \index{TEM_temTrgsGblL1tArmWrite@{TEM\_\-temTrgsGblL1tArmWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tArmWrite@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Arm\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int gbl\-L1t\-Arm)} \label{TEM_8c_a135} \item \hypertarget{TEM_8c_a136}{ \index{TEM_temTrgsGblL1tEnbClr@{TEM\_\-temTrgsGblL1tEnbClr}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tEnbClr@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Clr}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Clr} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a136} \item \hypertarget{TEM_8c_a137}{ \index{TEM_temTrgsGblL1tEnbGet@{TEM\_\-temTrgsGblL1tEnbGet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tEnbGet@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Get}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Get} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int $\ast$gbl\-L1t\-Enb)} \label{TEM_8c_a137} \item \hypertarget{TEM_8c_a138}{ \index{TEM_temTrgsGblL1tEnbSet@{TEM\_\-temTrgsGblL1tEnbSet}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tEnbSet@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Set}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Set} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a138} \item \hypertarget{TEM_8c_a139}{ \index{TEM_temTrgsGblL1tEnbSupported@{TEM\_\-temTrgsGblL1tEnbSupported}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tEnbSupported@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Supported}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Supported} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List)} \label{TEM_8c_a139} \item \hypertarget{TEM_8c_a140}{ \index{TEM_temTrgsGblL1tEnbWrite@{TEM\_\-temTrgsGblL1tEnbWrite}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!TEM_temTrgsGblL1tEnbWrite@{TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Write}} unsigned int {\bf TEM\_\-tem\-Trgs\-Gbl\-L1t\-Enb\-Write} (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$tems, unsigned int tem\-List, unsigned int gbl\-L1t\-Enb)} \label{TEM_8c_a140} \end{CompactItemize} \subsection{Detailed Description} TEM Utility Routines, Implementation. \begin{Desc} \item[Author: ]\par JJRussell - \href{mailto:russell@slac.stanford.edu}{\tt russell@slac.stanford.edu}\end{Desc} This collection of routines allows one to perform generic actions of collections of TEMs and their FPGAs. One must first initialize a database with a description and location of the TEMs and their FPGAs. The facility breaks into 3 sub-facilities \footnotesize\begin{verbatim} TEM_tems - Routines that act on a collection of TEMs TEM_fpgas - Routines that act on a collection of FPGAs TEM_temInt - Routines that act on a collection of TEMs, addressing the interrupt structure. \end{verbatim}\normalsize \subsection{Define Documentation} \hypertarget{TEM_8c_a6}{ \index{TEM.c@{TEM.c}!BASE_M_VALID@{BASE\_\-M\_\-VALID}} \index{BASE_M_VALID@{BASE\_\-M\_\-VALID}!TEM.c@{TEM.c}} \subsubsection[BASE\_\-M\_\-VALID]{\setlength{\rightskip}{0pt plus 5cm}\#define BASE\_\-M\_\-VALID}} \label{TEM_8c_a6} {\bf Value:} \footnotesize\begin{verbatim}((1 << (0x60 >> BASE_K_SHIFT)) | \ (1 << (0x80 >> BASE_K_SHIFT)) | \ (1 << (0xA0 >> BASE_K_SHIFT)) | \ (1 << (0xC0 >> BASE_K_SHIFT)))\end{verbatim}\normalsize Used in verifying that a VME BASE INTERRUPT VECTOR is valid. These macros are used to determine whether a base interrupt vector is legitimate. Legitimate base interrupt vectors must be drawn from the set, 0x60, x080, 0x\-A0 and 0x\-C0. The verification routines first verify that the least significant 5 bits, are zero using BASE\_\-M\_\-MBZ\_\-BITS as a mask. After verifying this, these bits are shifted off and leaving the numbers 3,4,5,6. This number is converted to a bit mask and checked against BASE\_\-M\_\-VALID, which is a mask of all the valid numbers. \hypertarget{TEM_8c_a0}{ \index{TEM.c@{TEM.c}!OFFSET_OF@{OFFSET\_\-OF}} \index{OFFSET_OF@{OFFSET\_\-OF}!TEM.c@{TEM.c}} \subsubsection[OFFSET\_\-OF]{\setlength{\rightskip}{0pt plus 5cm}\#define OFFSET\_\-OF(\_\-type, \_\-member)}} \label{TEM_8c_a0} {\bf Value:} \footnotesize\begin{verbatim}((int) \ ((char *)&((_type *)0)->_member - (char *)(_type *)0))\end{verbatim}\normalsize Macro to get the byte offset of a structure member. \hypertarget{TEM_8c_a8}{ \index{TEM.c@{TEM.c}!TEM_M_EVT_NEVTS@{TEM\_\-M\_\-EVT\_\-NEVTS}} \index{TEM_M_EVT_NEVTS@{TEM\_\-M\_\-EVT\_\-NEVTS}!TEM.c@{TEM.c}} \subsubsection[TEM\_\-M\_\-EVT\_\-NEVTS]{\setlength{\rightskip}{0pt plus 5cm}\#define TEM\_\-M\_\-EVT\_\-NEVTS\ 0x7ff}} \label{TEM_8c_a8} Bit mask used to extract the number of events. The number of events field in all TEMs has 11 valid bits. What differs is the actual range of these bits. Some only count to 9 bits, others to 11 bits. However, in those that do not reach 11 bits, the unused bits are guaranteed to be 0. \hypertarget{TEM_8c_a2}{ \index{TEM.c@{TEM.c}!TEM_REGADR@{TEM\_\-REGADR}} \index{TEM_REGADR@{TEM\_\-REGADR}!TEM.c@{TEM.c}} \subsubsection[TEM\_\-REGADR]{\setlength{\rightskip}{0pt plus 5cm}\#define TEM\_\-REGADR(lcl, offset)\ (volatile unsigned int $\ast$)((char $\ast$)lcl+offset)}} \label{TEM_8c_a2} Converts a base address and offset to an address. Simple macro to get the address of a register from its base and offset. This really just hides all the ugly casting that's going on. \subsection{Typedef Documentation} \hypertarget{TEM_8c_a9}{ \index{TEM.c@{TEM.c}!ToggleAndCheckOpts@{ToggleAndCheckOpts}} \index{ToggleAndCheckOpts@{ToggleAndCheckOpts}!TEM.c@{TEM.c}} \subsubsection[ToggleAndCheckOpts]{\setlength{\rightskip}{0pt plus 5cm}Toggle\-And\-Check\-Opts}} \label{TEM_8c_a9} Typedef for enum \_\-Toggle\-And\-Check\-Opts. The \hyperlink{TEM_8c_a19}{toggle\-And\-Check}() is a low-performance but very convenient routine used to perform various operations on a TEM register. This enumerates all the possible actions. \subsection{Enumeration Type Documentation} \hypertarget{TEM_8c_a141}{ \index{TEM.c@{TEM.c}!_ToggleAndCheckOpts@{\_\-ToggleAndCheckOpts}} \index{_ToggleAndCheckOpts@{\_\-ToggleAndCheckOpts}!TEM.c@{TEM.c}} \subsubsection[\_\-ToggleAndCheckOpts]{\setlength{\rightskip}{0pt plus 5cm}enum \_\-Toggle\-And\-Check\-Opts}} \label{TEM_8c_a141} Enumerates all the action options to the \hyperlink{TEM_8c_a19}{toggle\-And\-Check}() routine. \begin{Desc} \item[Enumeration values:]\par \begin{description} \index{OPT_M_SET@{OPT\_\-M\_\-SET}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!OPT_M_SET@{OPT\_\-M\_\-SET}}\item[{\em \hypertarget{TEM_8c_a141a10}{ {\em OPT\_\-M\_\-SET}} \label{TEM_8c_a141a10} }]Perform only the set operation \index{OPT_M_CLR@{OPT\_\-M\_\-CLR}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!OPT_M_CLR@{OPT\_\-M\_\-CLR}}\item[{\em \hypertarget{TEM_8c_a141a11}{ {\em OPT\_\-M\_\-CLR}} \label{TEM_8c_a141a11} }]Perform only the clr operation \index{OPT_M_TOGGLE@{OPT\_\-M\_\-TOGGLE}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!OPT_M_TOGGLE@{OPT\_\-M\_\-TOGGLE}}\item[{\em \hypertarget{TEM_8c_a141a12}{ {\em OPT\_\-M\_\-TOGGLE}} \label{TEM_8c_a141a12} }]Perform only a toggle operation \index{OPT_M_CHECK@{OPT\_\-M\_\-CHECK}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!OPT_M_CHECK@{OPT\_\-M\_\-CHECK}}\item[{\em \hypertarget{TEM_8c_a141a13}{ {\em OPT\_\-M\_\-CHECK}} \label{TEM_8c_a141a13} }]Perform only a check operation \index{OPT_M_SET_AND_CHECK@{OPT\_\-M\_\-SET\_\-AND\_\-CHECK}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!OPT_M_SET_AND_CHECK@{OPT\_\-M\_\-SET\_\-AND\_\-CHECK}}\item[{\em \hypertarget{TEM_8c_a141a14}{ {\em OPT\_\-M\_\-SET\_\-AND\_\-CHECK}} \label{TEM_8c_a141a14} }]Perform a set and check operation \index{OPT_M_CLR_AND_CHECK@{OPT\_\-M\_\-CLR\_\-AND\_\-CHECK}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!OPT_M_CLR_AND_CHECK@{OPT\_\-M\_\-CLR\_\-AND\_\-CHECK}}\item[{\em \hypertarget{TEM_8c_a141a15}{ {\em OPT\_\-M\_\-CLR\_\-AND\_\-CHECK}} \label{TEM_8c_a141a15} }]Perform a clr and check operation \index{OPT_M_TOGGLE_AND_CHECK@{OPT\_\-M\_\-TOGGLE\_\-AND\_\-CHECK}!TEM.c@{TEM.c}}\index{TEM.c@{TEM.c}!OPT_M_TOGGLE_AND_CHECK@{OPT\_\-M\_\-TOGGLE\_\-AND\_\-CHECK}}\item[{\em \hypertarget{TEM_8c_a141a16}{ {\em OPT\_\-M\_\-TOGGLE\_\-AND\_\-CHECK}} \label{TEM_8c_a141a16} }]Perfrom a toggle and chk operation \end{description} \end{Desc} \subsection{Function Documentation} \hypertarget{TEM_8c_a20}{ \index{TEM.c@{TEM.c}!doFpgaAction@{doFpgaAction}} \index{doFpgaAction@{doFpgaAction}!TEM.c@{TEM.c}} \subsubsection[doFpgaAction]{\setlength{\rightskip}{0pt plus 5cm}unsigned int do\-Fpga\-Action (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpga}, unsigned int {\em fpga\-List}, \hyperlink{FPGA__vme_8h_a1}{FPGA\_\-vme\-Action} {\em action}, \hyperlink{TEM_8h_a4}{TEM\_\-fpga\-Log\-Id} {\em log\-Id})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a20} Performs simple actions on a set of FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of target FPGAs, expressed as a bit mask. Only FGPAs in this list will have the action performed on them. \item[{\em action}]A user supplied callback routine which performs the action. \item[{\em log\-Id}]The logging ID of the action. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A list of FPGAs on which the action failed. 0 indicates that the action was successful on all specified FPGAs\end{Desc} Routine to perform the simple actions on a set of FPGAs. A log of these actions are kept with the FPGA. \hypertarget{TEM_8c_a21}{ \index{TEM.c@{TEM.c}!fpgasAuxCtlGet@{fpgasAuxCtlGet}} \index{fpgasAuxCtlGet@{fpgasAuxCtlGet}!TEM.c@{TEM.c}} \subsubsection[fpgasAuxCtlGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Aux\-Ctl\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which}, unsigned int $\ast$ {\em ret\-List})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a21} Returns the state of the specified bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Aux\-Ctl\-Dsc structure. \item[{\em rdo\-List}]Returned as a bit mask of the state of the specified bit. one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the bit could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a22}{fpgas\-Aux\-Ctl\-Supported}(), to get a list of the FPGAs which support the bit and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8c_a22}{ \index{TEM.c@{TEM.c}!fpgasAuxCtlSupported@{fpgasAuxCtlSupported}} \index{fpgasAuxCtlSupported@{fpgasAuxCtlSupported}!TEM.c@{TEM.c}} \subsubsection[fpgasAuxCtlSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Aux\-Ctl\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a22} Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Aux\-Ctl\-Dsc structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support the specified bit. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports the bit. It does not in any way indicate that the bit can be set. For example, if the FPGA is not loaded, the bit cannot be set. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8c_a23}{ \index{TEM.c@{TEM.c}!fpgasAuxCtlWrite@{fpgasAuxCtlWrite}} \index{fpgasAuxCtlWrite@{fpgasAuxCtlWrite}!TEM.c@{TEM.c}} \subsubsection[fpgasAuxCtlWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Aux\-Ctl\-Write (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which}, unsigned int {\em list})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a23} Writes the bit for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to write the bit. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Aux\-Ctl\-Dsc structure. \item[{\em list}]The value of the bit to write, expressed as a bit mask, 1 bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a22}{fpgas\-Aux\-Ctl\-Supported}(), to get a list of the FPGAs which support the bit and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8c_a24}{ \index{TEM.c@{TEM.c}!fpgasCtlGet@{fpgasCtlGet}} \index{fpgasCtlGet@{fpgasCtlGet}!TEM.c@{TEM.c}} \subsubsection[fpgasCtlGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Ctl\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which}, unsigned int $\ast$ {\em ret\-List})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a24} Returns the state of the specified bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Ctl\-Dsc structure. \item[{\em rdo\-List}]Returned as a bit mask of the state of the specified bit. one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the bit could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a25}{fpgas\-Ctl\-Supported}(), to get a list of the FPGAs which support the bit and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8c_a25}{ \index{TEM.c@{TEM.c}!fpgasCtlSupported@{fpgasCtlSupported}} \index{fpgasCtlSupported@{fpgasCtlSupported}!TEM.c@{TEM.c}} \subsubsection[fpgasCtlSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Ctl\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a25} Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Ctl\-Dsc structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support the specified bit. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports the bit. It does not in any way indicate that the bit can be set. For example, if the FPGA is not loaded, the bit cannot be set. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8c_a26}{ \index{TEM.c@{TEM.c}!fpgasCtlWrite@{fpgasCtlWrite}} \index{fpgasCtlWrite@{fpgasCtlWrite}!TEM.c@{TEM.c}} \subsubsection[fpgasCtlWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Ctl\-Write (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which}, unsigned int {\em list})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a26} Writes the bit for the specified FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database. \item[{\em fpga\-List}]The list of FPGAs to write the bit. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Ctl\-Dsc structure. \item[{\em list}]The value of the bit to write, expressed as a bit mask, 1 bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target FPGAs, for which the operation failed. This is a proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. The most likely reason for the latter is that FPGA is not loaded. One should call \hyperlink{TEM_8c_a25}{fpgas\-Ctl\-Supported}(), to get a list of the FPGAs which support the bit and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8c_a27}{ \index{TEM.c@{TEM.c}!fpgasStatGet@{fpgasStatGet}} \index{fpgasStatGet@{fpgasStatGet}!TEM.c@{TEM.c}} \subsubsection[fpgasStatGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Stat\-Get (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which}, unsigned int $\ast$ {\em ret\-List})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a27} Returns the state of the specified bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs, expressed as a bit mask, to get. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Stat\-Dsc structure. \item[{\em ret\-List}]Returned as a bit mask of the state of the specified bit. one bit per FPGA. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The FPGAs for which the bit could not be read. This is proper subset of {\em fpga\-List}.\end{Desc} A non-0 return value indicates either the FPGA does not support the bit or it is incapable of returning it. One should call \hyperlink{TEM_8c_a28}{fpgas\-Stat\-Supported}(), to get a list of the FPGAs which support the bit and TEM\_\-fpgas\-Loaded() to get a list of the FPGAs which are loaded. \hypertarget{TEM_8c_a28}{ \index{TEM.c@{TEM.c}!fpgasStatSupported@{fpgasStatSupported}} \index{fpgasStatSupported@{fpgasStatSupported}!TEM.c@{TEM.c}} \subsubsection[fpgasStatSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int fpgas\-Stat\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List}, unsigned int {\em which})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a28} Returns a bit list indicating whether the FPGAs support the specified bit. FPGAs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-fpga\-Stat\-Dsc structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support the specified bit. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports the bit. It does not in any way indicate that the bit can be read. For example, if the FPGA is not loaded, the bit cannot be read. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8c_a17}{ \index{TEM.c@{TEM.c}!getMaxSize@{getMaxSize}} \index{getMaxSize@{getMaxSize}!TEM.c@{TEM.c}} \subsubsection[getMaxSize]{\setlength{\rightskip}{0pt plus 5cm}int get\-Max\-Size (\hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpga}, unsigned int {\em fpga\-List})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a17} Finds the maximum size of a set of FPGA download files. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpga}]The FPGA database. \item[{\em fpga\-List}]The target list of FPGAs.\end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The maximum buffer size needed in bytes.\end{Desc} This is used by TEM\_\-fpgas\-Load to find the maximum size of a group FPGA download files. This allows one to get the memory once for all downloads. \hypertarget{TEM_8c_a18}{ \index{TEM.c@{TEM.c}!initLogs@{initLogs}} \index{initLogs@{initLogs}!TEM.c@{TEM.c}} \subsubsection[initLogs]{\setlength{\rightskip}{0pt plus 5cm}void init\-Logs (\hyperlink{TEM_8h_a3}{TEM\_\-fpga\-Log} $\ast$ {\em log}, int {\em cnt})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a18} Initializes an array of TEM\_\-fpga\-Log structures. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em log}]The array of FPGA log structures to initialize. \item[{\em cnt}]The number of FPGA log structures to initialize.\end{description} \end{Desc} Initializes an array of TEM\_\-fpga\-Log structures. This is just a convenience routine to encapsulate the initialization details. \hypertarget{TEM_8c_a62}{ \index{TEM.c@{TEM.c}!TEM_fpgasHfullClrSupported@{TEM\_\-fpgasHfullClrSupported}} \index{TEM_fpgasHfullClrSupported@{TEM\_\-fpgasHfullClrSupported}!TEM.c@{TEM.c}} \subsubsection[TEM\_\-fpgasHfullClrSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Clr\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8c_a62} Returns which of the specified FPGAs support a FIFO Half Full Throttle Manual Clear mode. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support a FIFO Half Full Throttle Clear mode. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports a FIFO Half Full Throttle Manual Clear mode. It does not in any way indicate that the FIFO Half Full Throttle mode can be set. For example, if the FPGA is not loaded, the mode cannot be set. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8c_a67}{ \index{TEM.c@{TEM.c}!TEM_fpgasHfullEnbSupported@{TEM\_\-fpgasHfullEnbSupported}} \index{TEM_fpgasHfullEnbSupported@{TEM\_\-fpgasHfullEnbSupported}!TEM.c@{TEM.c}} \subsubsection[TEM\_\-fpgasHfullEnbSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int TEM\_\-fpgas\-Hfull\-Enb\-Supported (const \hyperlink{TEM_8h_a5}{TEM\_\-fpga} $\ast$ {\em fpgas}, unsigned int {\em fpga\-List})}} \label{TEM_8c_a67} Returns which of the specified FPGAs support a FIFO Half Full Throttle mode. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em fpgas}]The FPGA database \item[{\em fpga\-List}]The set of target FPGAs to check. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which FPGAs support a FIFO Half Full Throttle mode. This is a proper subset of {\em fpga\-List}.\end{Desc} Note that this is purely a static test of whether the FPGA supports a FIFO Half Full Throttle mode. It does not in any way indicate that the FIFO Half Full Throttle mode can be set. For example, if the FPGA is not loaded, the mode cannot be set. One should query TEM\_\-fpgas\-Unreadied () for a list of FPGAS which cannot be set. \hypertarget{TEM_8c_a29}{ \index{TEM.c@{TEM.c}!temTrgsCtlGet@{temTrgsCtlGet}} \index{temTrgsCtlGet@{temTrgsCtlGet}!TEM.c@{TEM.c}} \subsubsection[temTrgsCtlGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Ctl\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which}, unsigned int $\ast$ {\em ret\-List})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a29} Returns the state of the specified bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Ctl\-Dsc structure. \item[{\em ret\-List}]Returned as a bit mask of the state of the specified bit. one bit per TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the bit could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call tems\-Ctl\-Supported(), to get a list of the TEMs which support the bit and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8c_a30}{ \index{TEM.c@{TEM.c}!temTrgsCtlSupported@{temTrgsCtlSupported}} \index{temTrgsCtlSupported@{temTrgsCtlSupported}!TEM.c@{TEM.c}} \subsubsection[temTrgsCtlSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Ctl\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a30} Returns a bit list indicating whether the TEMs support the specified bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The set of target TEM s to check. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Ctl\-Reg\-Dsc structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which TEMs support the specified bit. This is a proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8c_a31}{ \index{TEM.c@{TEM.c}!temTrgsCtlWrite@{temTrgsCtlWrite}} \index{temTrgsCtlWrite@{temTrgsCtlWrite}!TEM.c@{TEM.c}} \subsubsection[temTrgsCtlWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Ctl\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which}, unsigned int {\em list})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a31} Writes the bit for the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The list of TEMs to write the bit. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Ctl\-Reg\-Dsc structure. \item[{\em list}]The value of the bit to write, expressed as a bit mask, 1 bit per TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target TEMs, for which the operation failed. This is a proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call tems\-Ctl\-Supported(), to get a list of the TEMs which support the bit and TEM\_\-tem\-Unreadied (), to get a list of the TEMs which are not ready. \hypertarget{TEM_8c_a32}{ \index{TEM.c@{TEM.c}!temTrgsMskGet@{temTrgsMskGet}} \index{temTrgsMskGet@{temTrgsMskGet}!TEM.c@{TEM.c}} \subsubsection[temTrgsMskGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Msk\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which}, unsigned int {\em width}, unsigned int {\em lmsk}, unsigned int $\ast$ {\em ret\-List})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a32} Returns the state of the specified msk. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Ctl\-Dsc structure. \item[{\em width}]The width of the bit field to extract. \item[{\em lmsk}]The valid bits in the bit field. \item[{\em list}]Returned as a bit mask of the state of the specified mask, densely packed, {\em width} bits per TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the mask could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call tems\-Ctl\-Supported(), to get a list of the TEMs which support the bit and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8c_a33}{ \index{TEM.c@{TEM.c}!temTrgsMskSupported@{temTrgsMskSupported}} \index{temTrgsMskSupported@{temTrgsMskSupported}!TEM.c@{TEM.c}} \subsubsection[temTrgsMskSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Msk\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a33} Returns a bit list indicating whether the TEMs support the specified bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The set of target TEM s to check. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Msk\-Reg\-Dsc structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which TEMs support the specified bit. This is a proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8c_a34}{ \index{TEM.c@{TEM.c}!temTrgsMskWrite@{temTrgsMskWrite}} \index{temTrgsMskWrite@{temTrgsMskWrite}!TEM.c@{TEM.c}} \subsubsection[temTrgsMskWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Msk\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which}, unsigned int {\em width}, unsigned int {\em lmsk}, unsigned int {\em list})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a34} Writes the bit for the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The list of TEMs to write the bit. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Ctl\-Reg\-Dsc structure. \item[{\em width}]The width of the bit field to write. \item[{\em lmsk}]The valid bits in the bit field. \item[{\em list}]The value of the bit to write, expressed as a bit mask, 1 bit per TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target TEMs, for which the operation failed. This is a proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call tems\-Ctl\-Supported(), to get a list of the TEMs which support the bit and TEM\_\-tem\-Unreadied (), to get a list of the TEMs which are not ready. \hypertarget{TEM_8c_a35}{ \index{TEM.c@{TEM.c}!temTrgsTstGet@{temTrgsTstGet}} \index{temTrgsTstGet@{temTrgsTstGet}!TEM.c@{TEM.c}} \subsubsection[temTrgsTstGet]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Tst\-Get (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which}, unsigned int {\em width}, unsigned int {\em lmsk}, unsigned int $\ast$ {\em ret\-List})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a35} Returns the state of the specified msk. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The set of target TEMs, expressed as a bit mask, to get. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Tst\-Dsc structure. \item[{\em width}]The width of the bit field to extract. \item[{\em lmsk}]The valid bits in the bit field. \item[{\em list}]Returned as a bit mask of the state of the specified mask, densely packed, {\em width} bits per TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The TEMs for which the mask could not be read. This is proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call tems\-Ctl\-Supported(), to get a list of the TEMs which support the bit and \hyperlink{TEM_8h_a42}{TEM\_\-tems\-Unreadied}() to get a list of the TEMs which are not active. \hypertarget{TEM_8c_a36}{ \index{TEM.c@{TEM.c}!temTrgsTstSupported@{temTrgsTstSupported}} \index{temTrgsTstSupported@{temTrgsTstSupported}!TEM.c@{TEM.c}} \subsubsection[temTrgsTstSupported]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Tst\-Supported (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a36} Returns a bit list indicating whether the TEMs support the specified bit. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database \item[{\em tem\-List}]The set of target TEM s to check. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Tst\-Reg\-Dsc structure. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par Returned as a bit mask of which TEMs support the specified bit. This is a proper subset of {\em tem\-List}.\end{Desc} Note that this is purely a static test of whether the TEM supports the bit. It does not in any way indicate that the bit can be set. For example, if the TEM is not loaded, the bit cannot be set. One should query TEM\_\-tems\-Unreadied () for a list of TEMs which cannot be set. \hypertarget{TEM_8c_a37}{ \index{TEM.c@{TEM.c}!temTrgsTstWrite@{temTrgsTstWrite}} \index{temTrgsTstWrite@{temTrgsTstWrite}!TEM.c@{TEM.c}} \subsubsection[temTrgsTstWrite]{\setlength{\rightskip}{0pt plus 5cm}unsigned int tem\-Trgs\-Tst\-Write (const \hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tems}, unsigned int {\em tem\-List}, unsigned int {\em which}, unsigned int {\em width}, unsigned int {\em lmsk}, unsigned int {\em list})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a37} Writes the bit for the specified TEMs. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tems}]The TEM database. \item[{\em tem\-List}]The list of TEMs to write the bit. \item[{\em which}]Which bit to get. This is expressed as an offset from the beginning of the TEM\_\-tem\-Trg\-Tst\-Reg\-Dsc structure. \item[{\em width}]The width of the bit field to write. \item[{\em lmsk}]The valid bits in the bit field. \item[{\em list}]The value of the bit to write, expressed as a bit mask, 1 bit per TEM. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par The set of target TEMs, for which the operation failed. This is a proper subset of {\em tem\-List}.\end{Desc} A non-0 return value indicates either the TEM does not support the bit or it is incapable of returning it. The most likely reason for the latter is that TEM is not loaded. One should call tems\-Ctl\-Supported(), to get a list of the TEMs which support the bit and TEM\_\-tem\-Unreadied (), to get a list of the TEMs which are not ready. \hypertarget{TEM_8c_a19}{ \index{TEM.c@{TEM.c}!toggleAndCheck@{toggleAndCheck}} \index{toggleAndCheck@{toggleAndCheck}!TEM.c@{TEM.c}} \subsubsection[toggleAndCheck]{\setlength{\rightskip}{0pt plus 5cm}unsigned int toggle\-And\-Check (\hyperlink{TEM_8h_a2}{TEM\_\-tem} $\ast$ {\em tem}, unsigned int {\em tem\-List}, unsigned int {\em capabilities}, \hyperlink{TEM__temDsc_8h_a5}{TEM\_\-tem\-Action\-Id} {\em which}, \hyperlink{TEM_8c_a9}{Toggle\-And\-Check\-Opts} {\em opts}, \hyperlink{TEM_8h_a0}{TEM\_\-tem\-State} {\em new\-State})\hspace{0.3cm}{\tt \mbox{[}static\mbox{]}}}} \label{TEM_8c_a19} Sets, clears, toggles or checks some bits in the TEM registers. \begin{Desc} \item[Parameters: ]\par \begin{description} \item[{\em tem}]The TEM database. \item[{\em tem\-List}]Which TEMs to perform the operation on, expressed as a bit mask. \item[{\em capabilities}]List of capabilities necessary to perform this test, expressed as a bit mask. \item[{\em which}]An index to the target action. \item[{\em opts}]An options mask, one of either the specific function to be performed. Examples are OPT\_\-M\_\-TOGGLE, OPT\_\-M\_\-CHECK or OPT\_\-M\_\-TOGGLE\_\-AND\_\-CHECK. \item[{\em new\-State}]Record this as the new TEM state. This will be done iff this state is not TEM\_\-C\_\-TEM\_\-STATE\_\-IGNORE. \end{description} \end{Desc} \begin{Desc} \item[Returns: ]\par A bit mask indicating which TEMs failed to respond properly.\end{Desc} This is the generic workhorse routine used to set, clear, toggle or check some bits (or an combination thereof). A typical usage would be to toggles some bits, then check to see if the toggling accomplished its goal. Typically this is to implement a reset function.